ARM: shmobile: Lager memory map update
Subsystems (2)
PATCH v2 1/1 ARM: shmobile: Lager memory map update
From: Magnus Damm <[email protected]>
Update the Lager DTS to make use of the new unified legacy memory map where the legacy window on Lager and Koelsch have the same size.
With this change in place the code gets aligned with the documentation.
After update the Lager board has the following map:
Bank0: 1GiB RAM (Legacy 32-bit: 0x40000000->0x7fffffff)
Bank1: 3GiB RAM (LPAE area: 0x140000000->0x1ffffffff)
Before the update the old map looked like this:
Bank0: 2GiB RAM (Legacy 32-bit: 0x40000000->0xbfffffff)
Bank1: 2GiB RAM (LPAE area: 0x180000000->0x1ffffffff)
Tested with and without LPAE on r8a7790 Lager.
---
Written against renesas-devel-v3.15-rc8-20140605
Changes since V1:
- Updated commit log to include reason
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7790-lager.dts +2 -2
@@ -29,12 +29,12 @@ memory@40000000 { device_type = "memory"; - reg = <0 0x40000000 0 0x80000000>; + reg = <0 0x40000000 0 0x40000000>; }; memory@180000000 { device_type = "memory"; - reg = <1 0x80000000 0 0x80000000>; + reg = <1 0x40000000 0 0xc0000000>; }; lbsc {
Quoted 13 lines · Magnus Damm
From: Magnus Damm <[email protected]>
Update the Lager DTS to make use of the new unified legacy memory map where the legacy window on Lager and Koelsch have the same size.
With this change in place the code gets aligned with the documentation.
After update the Lager board has the following map:
Bank0: 1GiB RAM (Legacy 32-bit: 0x40000000->0x7fffffff)
Bank1: 3GiB RAM (LPAE area: 0x140000000->0x1ffffffff)
Quoted 7 lines
Before the update the old map looked like this:
Bank0: 2GiB RAM (Legacy 32-bit: 0x40000000->0xbfffffff)
Bank1: 2GiB RAM (LPAE area: 0x180000000->0x1ffffffff)Tested with and without LPAE on r8a7790 Lager.
Signed-off-by Magnus Damm <[email protected]>
Thanks, I have queued this up.