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ARM: save/restore diagnostic register on ARMv7 suspend/resume

PATCH New Shawn Guo 4 participants 6 messages Jun 18, 2014 Arm (32-bit)

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Shawn Guo

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#0 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

---
 arch/arm/mm/proc-v7.S | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
arch/arm/mm/proc-v7.S +5 -3
index 3db2c2f04a30..4de98a65a4ea 100644
@@ -92,13 +92,14 @@ ENDPROC(cpu_v7_dcache_clean_area)
 
 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
 .globl	cpu_v7_suspend_size
-.equ	cpu_v7_suspend_size, 4 * 9
+.equ	cpu_v7_suspend_size, 4 * 10
 #ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v7_do_suspend)
 	stmfd	sp!, {r4 - r10, lr}
 	mrc	p15, 0, r4, c13, c0, 0	@ FCSE/PID
 	mrc	p15, 0, r5, c13, c0, 3	@ User r/o thread ID
 	stmia	r0!, {r4 - r5}
+	mrc	p15, 0, r4, c15, c0, 1	@ Diagnostic register
 #ifdef CONFIG_MMU
 	mrc	p15, 0, r6, c3, c0, 0	@ Domain ID
 #ifdef CONFIG_ARM_LPAE
@@ -111,7 +112,7 @@ ENTRY(cpu_v7_do_suspend)
 	mrc	p15, 0, r8, c1, c0, 0	@ Control register
 	mrc	p15, 0, r9, c1, c0, 1	@ Auxiliary control register
 	mrc	p15, 0, r10, c1, c0, 2	@ Co-processor access control
-	stmia	r0, {r5 - r11}
+	stmia	r0, {r4 - r11}
 	ldmfd	sp!, {r4 - r10, pc}
 ENDPROC(cpu_v7_do_suspend)
 
@@ -122,7 +123,8 @@ ENTRY(cpu_v7_do_resume)
 	ldmia	r0!, {r4 - r5}
 	mcr	p15, 0, r4, c13, c0, 0	@ FCSE/PID
 	mcr	p15, 0, r5, c13, c0, 3	@ User r/o thread ID
-	ldmia	r0, {r5 - r11}
+	ldmia	r0, {r4 - r11}
+	mcr	p15, 0, r4, c15, c0, 1	@ Diagnostic register
 #ifdef CONFIG_MMU
 	mcr	p15, 0, ip, c8, c7, 0	@ invalidate TLBs
 	mcr	p15, 0, r6, c3, c0, 0	@ Domain ID
Signature · 1 line
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#1 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

Quoted 4 lines · Shawn Guo

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

This should be conditional on Cortex-A9, since this register is certainly not architected.

Will

author
#2 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

Quoted 8 lines · Will Deacon
Quoted 4 lines · Shawn Guo

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

This should be conditional on Cortex-A9, since this register is certainly not architected.

Ah, yes. In that case, I should probably handle it at platform level to avoid messing up generic ARMv7 suspend/resume routines.

Shawn

#3 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

Quoted 7 lines · Shawn Guo
Quoted 6 lines · Will Deacon
Quoted 4 lines · Shawn Guo

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

Quoted 5 lines
Quoted 2 lines

This should be conditional on Cortex-A9, since this register is certainly not architected.

Ah, yes. In that case, I should probably handle it at platform level to avoid messing up generic ARMv7 suspend/resume routines.

We don't need more platform code repeating this kind of stuff...

All Cortex-A9 which have these work-arounds enabled may need this and as the generic kernel already fiddles with this, it's something that should not be platform specific - indeed, some of these workarounds are supposed to be in place before the MMU is enabled.

So, it's being done at the preferred place in the kernel... just not in a way that results in only Cortex A9 being affected.

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#4 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

In reply to Shawn Guo
Quoted 7 lines · Shawn Guo
Quoted 6 lines · Will Deacon
Quoted 4 lines · Shawn Guo

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

Quoted 5 lines
Quoted 2 lines

This should be conditional on Cortex-A9, since this register is certainly not architected.

Ah, yes. In that case, I should probably handle it at platform level to avoid messing up generic ARMv7 suspend/resume routines.

Please don't do that.

You may look at commit 16c79a3776 and do something similar for Cortex-A9.

Nicolas

author
#5 lore raw

PATCH 1/1 ARM: save/restore diagnostic register on ARMv7 suspend/resume

Quoted 12 lines · Nicolas Pitre
Quoted 10 lines · Shawn Guo
Quoted 8 lines · Will Deacon
Quoted 4 lines · Shawn Guo

The CP15 diagnostic register holds ARM errata bits on ARMv7, so it needs to be saved/restored on suspend/resume. Otherwise, the effectiveness of errata workaround gets lost together with diagnostic register bit across suspend/resume cycle.

This should be conditional on Cortex-A9, since this register is certainly not architected.

Quoted 7 lines
Quoted 2 lines

Ah, yes. In that case, I should probably handle it at platform level to avoid messing up generic ARMv7 suspend/resume routines.

Please don't do that.

You may look at commit 16c79a3776 and do something similar for Cortex-A9.

Okay. Thanks for the hint, Nico. Will work out a V2 patch soon.

Shawn