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arm: Add basic support for Mediatek Cortex-A7 SoCs

PATCH Superseded Matthias Brugger 4 participants 11 messages Jun 20, 2014 – Jul 7, 2014

Subsystems (4)

v9 of 10 Superseded Latest is v10 →

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Matthias Brugger

author maintainer
#0 lore raw

v9 cover arm: Add basic support for Mediatek Cortex-A7 SoCs

This patch series includes just the patches for the timer driver. They are rebased against tip/timers/core from the tip repository [0].

The only change applied are line shifts in the OF patch.

I will send the rest of the series as a pull-request.

[0] git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git

Matthias Brugger (3):
of: Provide function to request and map memory
clocksource: Add support for the Mediatek SoCs
dt-bindings: add mtk-timer bindings

 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++
 drivers/clocksource/Kconfig                        |    5 +
 drivers/clocksource/Makefile                       |    1 +
 drivers/clocksource/mtk_timer.c                    |  261 ++++++++++++++++++++
 drivers/of/address.c                               |   29 +++
 include/linux/of_address.h                         |    8 +
 6 files changed, 322 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
 create mode 100644 drivers/clocksource/mtk_timer.c
Signature · 1 line
1.7.9.5
author maintainer
#1 lore raw

PATCH v9 1/3 of: Provide function to request and map memory

From: Matthias Brugger <[email protected]>

A call to of_iomap does not request the memory region. This patch adds the function of_io_request_and_map which requests the memory region before mapping it.

---
 drivers/of/address.c       |   29 +++++++++++++++++++++++++++++
 include/linux/of_address.h |    8 ++++++++
 2 files changed, 37 insertions(+)
drivers/of/address.c +29 -0
index cb4242a..09074ba 100644
@@ -721,3 +721,32 @@ void __iomem *of_iomap(struct device_node *np, int index)
 	return ioremap(res.start, resource_size(&res));
 }
 EXPORT_SYMBOL(of_iomap);
+
+/*
+ * of_io_request_and_map - Requests a resource and maps the memory mapped IO
+ *			   for a given device_node
+ * @device:	the device whose io range will be mapped
+ * @index:	index of the io range
+ * @name:	name of the resource
+ *
+ * Returns a pointer to the requested and mapped memory
+ */
+void __iomem *of_io_request_and_map(struct device_node *np, int index,
+					char *name)
+{
+	struct resource res;
+	void __iomem *mem;
+
+	if (of_address_to_resource(np, index, &res))
+		return NULL;
+
+	if (!request_mem_region(res.start, resource_size(&res), name))
+		return NULL;
+
+	mem = ioremap(res.start, resource_size(&res));
+	if (!mem)
+		release_mem_region(res.start, resource_size(&res));
+
+	return mem;
+}
+EXPORT_SYMBOL(of_io_request_and_map);
include/linux/of_address.h +8 -0
index 5f6ed6b..725b875 100644
@@ -96,6 +96,8 @@ static inline struct of_pci_range *of_pci_range_parser_one(
 extern int of_address_to_resource(struct device_node *dev, int index,
 				  struct resource *r);
 void __iomem *of_iomap(struct device_node *node, int index);
+void __iomem *of_io_request_and_map(struct device_node *device,
+					int index, char *name);
 #else
 static inline int of_address_to_resource(struct device_node *dev, int index,
 					 struct resource *r)
@@ -107,6 +109,12 @@ static inline void __iomem *of_iomap(struct device_node *device, int index)
 {
 	return NULL;
 }
+
+static inline void __iomem *of_io_request_and_map(struct device_node *device,
+					int index, char *name)
+{
+	return NULL;
+}
 #endif
 
 #if defined(CONFIG_OF_ADDRESS) && defined(CONFIG_PCI)
Signature · 1 line
1.7.9.5
author maintainer
#2 lore raw

PATCH 1/1 of: Provide function to request and map memory

A call to of_iomap does not request the memory region. This patch adds the function of_io_request_and_map which requests the memory region before mapping it.

---
Changes for v9.1:
- fixed the Author email address

 drivers/of/address.c       |   29 +++++++++++++++++++++++++++++
 include/linux/of_address.h |    8 ++++++++
 2 files changed, 37 insertions(+)
drivers/of/address.c +29 -0
index cb4242a..09074ba 100644
@@ -721,3 +721,32 @@ void __iomem *of_iomap(struct device_node *np, int index)
 	return ioremap(res.start, resource_size(&res));
 }
 EXPORT_SYMBOL(of_iomap);
+
+/*
+ * of_io_request_and_map - Requests a resource and maps the memory mapped IO
+ *			   for a given device_node
+ * @device:	the device whose io range will be mapped
+ * @index:	index of the io range
+ * @name:	name of the resource
+ *
+ * Returns a pointer to the requested and mapped memory
+ */
+void __iomem *of_io_request_and_map(struct device_node *np, int index,
+					char *name)
+{
+	struct resource res;
+	void __iomem *mem;
+
+	if (of_address_to_resource(np, index, &res))
+		return NULL;
+
+	if (!request_mem_region(res.start, resource_size(&res), name))
+		return NULL;
+
+	mem = ioremap(res.start, resource_size(&res));
+	if (!mem)
+		release_mem_region(res.start, resource_size(&res));
+
+	return mem;
+}
+EXPORT_SYMBOL(of_io_request_and_map);
include/linux/of_address.h +8 -0
index 5f6ed6b..725b875 100644
@@ -96,6 +96,8 @@ static inline struct of_pci_range *of_pci_range_parser_one(
 extern int of_address_to_resource(struct device_node *dev, int index,
 				  struct resource *r);
 void __iomem *of_iomap(struct device_node *node, int index);
+void __iomem *of_io_request_and_map(struct device_node *device,
+					int index, char *name);
 #else
 static inline int of_address_to_resource(struct device_node *dev, int index,
 					 struct resource *r)
@@ -107,6 +109,12 @@ static inline void __iomem *of_iomap(struct device_node *device, int index)
 {
 	return NULL;
 }
+
+static inline void __iomem *of_io_request_and_map(struct device_node *device,
+					int index, char *name)
+{
+	return NULL;
+}
 #endif
 
 #if defined(CONFIG_OF_ADDRESS) && defined(CONFIG_PCI)
Signature · 1 line
1.7.9.5
#3 lore raw

Re: [PATCH v9.1] of: Provide function to request and map memory

Quoted 14 lines · Matthias Brugger
drivers/of/address.c +14 -0
+/*
+ * of_io_request_and_map - Requests a resource and maps the memory mapped IO
+ *			   for a given device_node
+ * @device:	the device whose io range will be mapped
+ * @index:	index of the io range
+ * @name:	name of the resource
+ *
+ * Returns a pointer to the requested and mapped memory
+ */
+void __iomem *of_io_request_and_map(struct device_node *np, int index,
+					char *name)
+{
+	struct resource res;
+	void __iomem *mem;

drivers/of/address.c void __iomem *of_iomap(struct device_node *np, int index) · line 748

Quoted 10 lines
drivers/of/address.c +10 -0
+
+	if (of_address_to_resource(np, index, &res))
+		return NULL;
+
+	if (!request_mem_region(res.start, resource_size(&res), name))
+		return NULL;
+
+	mem = ioremap(res.start, resource_size(&res));
+	if (!mem)
+		release_mem_region(res.start, resource_size(&res));

We did this "return NULL" approach for devm_request_and_ioremap(), and ended up not liking the number of drivers returning random error codes on failure (despite the proper return code being documented.) It's worth reading the commit text for the commit introducing devm_ioremap_resource() which replaces devm_request_and_ioremap():

commit 75096579c3ac39ddc2f8b0d9a8924eba31f4d920

Author: Thierry Reding <[email protected]>
Date:   Mon Jan 21 11:08:54 2013 +0100

lib: devres: Introduce devm_ioremap_resource()

which may help avoid repeating the same mistakes here.

Signature · 2 lines
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
author maintainer
#4 lore raw

PATCH v9 2/3 clocksource: Add support for the Mediatek SoCs

In reply to Matthias Brugger

This patch adds a clock source and clock event for the timer found on the Mediatek SoCs.

The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer.

Two 32 bit timers are used by this driver:
TIMER1: clock events supporting periodic and oneshot events
TIMER2: clock source configured as a free running counter

The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider.

The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores.

---
 drivers/clocksource/Kconfig     |    5 +
 drivers/clocksource/Makefile    |    1 +
 drivers/clocksource/mtk_timer.c |  261 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 267 insertions(+)
 create mode 100644 drivers/clocksource/mtk_timer.c
drivers/clocksource/Kconfig +5 -0
index 0437767..c1ec81a 100644
@@ -149,6 +149,11 @@ config VF_PIT_TIMER
 config SYS_SUPPORTS_SH_CMT
         bool
 
+config MTK_TIMER
+	select CLKSRC_OF
+	select CLKSRC_MMIO
+	bool
+
 config SYS_SUPPORTS_SH_MTU2
         bool
 
drivers/clocksource/Makefile +1 -0
index 0770916..4256ab7 100644
@@ -34,6 +34,7 @@ obj-$(CONFIG_CLKSRC_SAMSUNG_PWM)	+= samsung_pwm_timer.o
 obj-$(CONFIG_FSL_FTM_TIMER)	+= fsl_ftm_timer.o
 obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)	+= qcom-timer.o
+obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER)		+= arm_global_timer.o
drivers/clocksource/mtk_timer.c new file +261 -0

261 lines not on this page · raw message

Signature · 1 line
1.7.9.5
author maintainer
#5 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

In reply to Matthias Brugger

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +18 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two
+	clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
+	timer at 10008000 {
+		compatible = "mediatek,mt6577-timer";
+		reg = <0x10008000 0x80>;
+		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&system_clk>, <&rtc_clk>;
+		clock-names = "system-clk", "rtc-clk";
+	};
Signature · 1 line
1.7.9.5
#6 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

Quoted 24 lines · Matthias Brugger

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +7 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt line 17

Quoted 10 lines
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +10 -0
+	clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
+	timer at 10008000 {
+		compatible = "mediatek,mt6577-timer";
+		reg = <0x10008000 0x80>;
+		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&system_clk>, <&rtc_clk>;
+		clock-names = "system-clk", "rtc-clk";

These names should be mentioned above, or removed.

This looks fine otherwise.

Mark.

author maintainer
#7 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

2014-06-20 14:36 GMT+02:00 Mark Rutland <[email protected]>:

Quoted 29 lines · Matthias Brugger
Quoted 28 lines

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +11 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two
+     clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
Quoted 8 lines

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt line 17

Quoted 6 lines
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +6 -0
+     timer at 10008000 {
+             compatible = "mediatek,mt6577-timer";
+             reg = <0x10008000 0x80>;
+             interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+             clocks = <&system_clk>, <&rtc_clk>;
+             clock-names = "system-clk", "rtc-clk";

These names should be mentioned above, or removed.

I added the clock-names to make it the clock order clearer, as it is done in the arm sp,804 [1].
But I think it is clear enough through the phandle names and the description of the clocks property.
So I will delete the clock-names in the v10 round.

Cheers,
Matthias

[1] http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/timer/arm,sp804.txt

Quoted 9 lines

This looks fine otherwise.

Mark.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Signature · 1 line
motzblog.wordpress.com
#8 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

Quoted 39 lines · Matthias Brugger

2014-06-20 14:36 GMT+02:00 Mark Rutland <[email protected]>:

Quoted 29 lines · Matthias Brugger
Quoted 28 lines

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +11 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two
+     clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
Quoted 8 lines

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt line 17

Quoted 6 lines
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +6 -0
+     timer at 10008000 {
+             compatible = "mediatek,mt6577-timer";
+             reg = <0x10008000 0x80>;
+             interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+             clocks = <&system_clk>, <&rtc_clk>;
+             clock-names = "system-clk", "rtc-clk";

These names should be mentioned above, or removed.

Quoted 5 lines

I added the clock-names to make it the clock order clearer, as it is done in the arm sp,804 [1].
But I think it is clear enough through the phandle names and the description of the clocks property.
So I will delete the clock-names in the v10 round.

I think I originally advocated for adding those names. And my argument was that the names in the dts are probably not clearly identifying the timer IP's clock inputs since they refer to SOC names for the clocks. We had this argument for a while now and it doesn't seem to get better than this. But to explain why I try to get IP vs. SOC clock names in here is, that I had such a case with Zynq's Ethernet core. That IP has quite a few clock inputs and luckily the mainline driver for that IP used the proper names from the IP data sheet for the clocks instead of the SOC names. That made it relatively easy to match things with the Zynq integration of that IP. Had that driver used SOC clock names, things would have been more difficult.

S?ren

author maintainer
#9 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

2014-07-01 20:00 GMT+02:00 S?ren Brinkmann <[email protected]>:

Quoted 46 lines · Matthias Brugger
Quoted 39 lines

2014-06-20 14:36 GMT+02:00 Mark Rutland <[email protected]>:

Quoted 29 lines · Matthias Brugger
Quoted 28 lines

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +11 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two
+     clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
Quoted 8 lines

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt line 17

Quoted 6 lines
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +6 -0
+     timer at 10008000 {
+             compatible = "mediatek,mt6577-timer";
+             reg = <0x10008000 0x80>;
+             interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+             clocks = <&system_clk>, <&rtc_clk>;
+             clock-names = "system-clk", "rtc-clk";

These names should be mentioned above, or removed.

Quoted 5 lines

I added the clock-names to make it the clock order clearer, as it is done in the arm sp,804 [1].
But I think it is clear enough through the phandle names and the description of the clocks property.
So I will delete the clock-names in the v10 round.

Quoted 11 lines

I think I originally advocated for adding those names. And my argument was that the names in the dts are probably not clearly identifying the timer IP's clock inputs since they refer to SOC names for the clocks. We had this argument for a while now and it doesn't seem to get better than this. But to explain why I try to get IP vs. SOC clock names in here is, that I had such a case with Zynq's Ethernet core. That IP has quite a few clock inputs and luckily the mainline driver for that IP used the proper names from the IP data sheet for the clocks instead of the SOC names. That made it relatively easy to match things with the Zynq integration of that IP. Had that driver used SOC clock names, things would have been more difficult.

S?ren, I get the point. The problem is, that we don't have any documentation other then the SoC datasheet for the timer. Anyway the clock-names property does not help us in this at all. As I already mentioned, the clock-names property was to illustrate the clock order, but as I think, with the comment for the clocks property, the order is clear enough.

Shall I delete your ack, when I resend the patch without the clock-names property?

Regards,
Matthias

Quoted 2 lines

S?ren

Signature · 1 line
motzblog.wordpress.com
#10 lore raw

PATCH v9 3/3 dt-bindings: add mtk-timer bindings

Quoted 66 lines · Matthias Brugger

2014-07-01 20:00 GMT+02:00 S?ren Brinkmann <[email protected]>:

Quoted 46 lines · Matthias Brugger
Quoted 39 lines

2014-06-20 14:36 GMT+02:00 Mark Rutland <[email protected]>:

Quoted 29 lines · Matthias Brugger
Quoted 28 lines

Add binding documentation for the General Porpose Timer driver of the Mediatek SoCs.

---
 .../bindings/timer/mediatek,mtk-timer.txt          |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +11 -0
new file mode 100644
index 0000000..10b7e09
@@ -0,0 +1,18 @@
+Mediatek MT6577, MT6572 and MT6589 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mt6577-timer"
+- reg: Should contain location and length for timers register.
+- clocks: Clocks driving the timer hardware. This list should include two
+     clocks. The order is system clock and as second clock the RTC clock.
+
+Examples:
+
Quoted 8 lines

Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt line 17

Quoted 6 lines
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt new file +6 -0
+     timer at 10008000 {
+             compatible = "mediatek,mt6577-timer";
+             reg = <0x10008000 0x80>;
+             interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+             clocks = <&system_clk>, <&rtc_clk>;
+             clock-names = "system-clk", "rtc-clk";

These names should be mentioned above, or removed.

Quoted 5 lines

I added the clock-names to make it the clock order clearer, as it is done in the arm sp,804 [1].
But I think it is clear enough through the phandle names and the description of the clocks property.
So I will delete the clock-names in the v10 round.

Quoted 11 lines

I think I originally advocated for adding those names. And my argument was that the names in the dts are probably not clearly identifying the timer IP's clock inputs since they refer to SOC names for the clocks. We had this argument for a while now and it doesn't seem to get better than this. But to explain why I try to get IP vs. SOC clock names in here is, that I had such a case with Zynq's Ethernet core. That IP has quite a few clock inputs and luckily the mainline driver for that IP used the proper names from the IP data sheet for the clocks instead of the SOC names. That made it relatively easy to match things with the Zynq integration of that IP. Had that driver used SOC clock names, things would have been more difficult.

S?ren, I get the point. The problem is, that we don't have any documentation other then the SoC datasheet for the timer. Anyway the clock-names property does not help us in this at all. As I already mentioned, the clock-names property was to illustrate the clock order, but as I think, with the comment for the clocks property, the order is clear enough.

Quoted 2 lines

Shall I delete your ack, when I resend the patch without the clock-names property?

No, it's fine.

S?ren