ARM: i.MX27: Introduce DT include for clock provider
Subsystems (6)
PATCH 1/2 ARM: i.MX27: Introduce DT include for clock provider
Use clock defines in order to make devicetrees more human readable. Additional changes included in this patch (imx27.dtsi):
- Fix IPG clock for UART6.
- Use EMI_AHB_GATE clock for WEIM.
- Added GPIO_IPG_GATE clock for GPIO nodes. Currently this clock is not used by the driver, but it can be added in the future.
--- .../devicetree/bindings/clock/imx27-clock.txt | 127 +------- arch/arm/boot/dts/imx27-pdk.dts | 2 +- arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 2 +- arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi | 2 +- arch/arm/boot/dts/imx27.dtsi | 115 ++++--- arch/arm/mach-imx/clk-imx27.c | 347 ++++++++++----------- include/dt-bindings/clock/imx27-clock.h | 107 +++++++ 7 files changed, 362 insertions(+), 340 deletions(-) create mode 100644 include/dt-bindings/clock/imx27-clock.h
Documentation/devicetree/bindings/clock/imx27-clock.txt +16 -111
@@ -7,117 +7,22 @@ Required properties: - #clock-cells: Should be <1> The clock consumer should specify the desired clock by having the clock -ID in its "clocks" phandle cell. The following is a full list of i.MX27 -clocks and IDs. - - Clock ID - ----------------------- - dummy 0 - ckih 1 - ckil 2 - mpll 3 - spll 4 - mpll_main2 5 - ahb 6 - ipg 7 - nfc_div 8 - per1_div 9 - per2_div 10 - per3_div 11 - per4_div 12 - vpu_sel 13 - vpu_div 14 - usb_div 15 - cpu_sel 16 - clko_sel 17 - cpu_div 18 - clko_div 19 - ssi1_sel 20 - ssi2_sel 21 - ssi1_div 22 - ssi2_div 23 - clko_en 24 - ssi2_ipg_gate 25 - ssi1_ipg_gate 26 - slcdc_ipg_gate 27 - sdhc3_ipg_gate 28 - sdhc2_ipg_gate 29 - sdhc1_ipg_gate 30 - scc_ipg_gate 31 - sahara_ipg_gate 32 - rtc_ipg_gate 33 - pwm_ipg_gate 34 - owire_ipg_gate 35 - lcdc_ipg_gate 36 - kpp_ipg_gate 37 - iim_ipg_gate 38 - i2c2_ipg_gate 39 - i2c1_ipg_gate 40 - gpt6_ipg_gate 41 - gpt5_ipg_gate 42 - gpt4_ipg_gate 43 - gpt3_ipg_gate 44 - gpt2_ipg_gate 45 - gpt1_ipg_gate 46 - gpio_ipg_gate 47 - fec_ipg_gate 48 - emma_ipg_gate 49 - dma_ipg_gate 50 - cspi3_ipg_gate 51 - cspi2_ipg_gate 52 - cspi1_ipg_gate 53 - nfc_baud_gate 54 - ssi2_baud_gate 55 - ssi1_baud_gate 56 - vpu_baud_gate 57 - per4_gate 58 - per3_gate 59 - per2_gate 60 - per1_gate 61 - usb_ahb_gate 62 - slcdc_ahb_gate 63 - sahara_ahb_gate 64 - lcdc_ahb_gate 65 - vpu_ahb_gate 66 - fec_ahb_gate 67 - emma_ahb_gate 68 - emi_ahb_gate 69 - dma_ahb_gate 70 - csi_ahb_gate 71 - brom_ahb_gate 72 - ata_ahb_gate 73 - wdog_ipg_gate 74 - usb_ipg_gate 75 - uart6_ipg_gate 76 - uart5_ipg_gate 77 - uart4_ipg_gate 78 - uart3_ipg_gate 79 - uart2_ipg_gate 80 - uart1_ipg_gate 81 - ckih_div1p5 82 - fpm 83 - mpll_osc_sel 84 - mpll_sel 85 - spll_gate 86 - mshc_div 87 - rtic_ipg_gate 88 - mshc_ipg_gate 89 - rtic_ahb_gate 90 - mshc_baud_gate 91 +ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h +for the full list of i.MX27 clock IDs. Examples: + clks: ccm at 10027000{ + compatible = "fsl,imx27-ccm"; + reg = <0x10027000 0x1000>; + #clock-cells = <1>; + }; -clks: ccm at 10027000{ - compatible = "fsl,imx27-ccm"; - reg = <0x10027000 0x1000>; - #clock-cells = <1>; -}; - -uart1: serial at 1000a000 { - compatible = "fsl,imx27-uart", "fsl,imx21-uart"; - reg = <0x1000a000 0x1000>; - interrupts = <20>; - clocks = <&clks 81>, <&clks 61>; - clock-names = "ipg", "per"; - status = "disabled"; -}; + uart1: serial at 1000a000 { + compatible = "fsl,imx27-uart", "fsl,imx21-uart"; + reg = <0x1000a000 0x1000>; + interrupts = <20>; + clocks = <&clks IMX27_CLK_UART1_IPG_GATE>, + <&clks IMX27_CLK_PER1_GATE>; + clock-names = "ipg", "per"; + status = "disabled"; + };
arch/arm/boot/dts/imx27-pdk.dts +1 -1
@@ -28,7 +28,7 @@ usbphy0: usbphy at 0 { compatible = "usb-nop-xceiv"; reg = <0>; - clocks = <&clks 0>; + clocks = <&clks IMX27_CLK_DUMMY>; clock-names = "main_clk"; }; };
arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +1 -1
@@ -61,7 +61,7 @@ compatible = "usb-nop-xceiv"; reg = <2>; vcc-supply = <®_5v0>; - clocks = <&clks 0>; + clocks = <&clks IMX27_CLK_DUMMY>; clock-names = "main_clk"; }; };
arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi +1 -1
@@ -51,7 +51,7 @@ compatible = "usb-nop-xceiv"; reg = <0>; vcc-supply = <&sw3_reg>; - clocks = <&clks 0>; + clocks = <&clks IMX27_CLK_DUMMY>; clock-names = "main_clk"; }; };
arch/arm/boot/dts/imx27.dtsi +74 -41
399 lines not on this page · raw message
arch/arm/mach-imx/clk-imx27.c +162 -185
382 lines not on this page · raw message
include/dt-bindings/clock/imx27-clock.h new file +107 -0
107 lines not on this page · raw message
Signature · 1 line
1.8.5.5
PATCH 2/2 ARM: i.MX27 clk: Remove unused definitions
This patch removes definitions which not used anywhere in the driver.
--- arch/arm/mach-imx/clk-imx27.c | 25 ------------------------- 1 file changed, 25 deletions(-)
arch/arm/mach-imx/clk-imx27.c +0 -25
@@ -18,36 +18,11 @@ static void __iomem *ccm __initdata;#define CCM_MPCTL1 (ccm + 0x08)#define CCM_SPCTL0 (ccm + 0x0c)#define CCM_SPCTL1 (ccm + 0x10) -#define CCM_OSC26MCTL (ccm + 0x14)#define CCM_PCDR0 (ccm + 0x18)#define CCM_PCDR1 (ccm + 0x1c)#define CCM_PCCR0 (ccm + 0x20)#define CCM_PCCR1 (ccm + 0x24)#define CCM_CCSR (ccm + 0x28) -#define CCM_PMCTL (ccm + 0x2c) -#define CCM_PMCOUNT (ccm + 0x30) -#define CCM_WKGDCTL (ccm + 0x34) - -#define CCM_CSCR_UPDATE_DIS (1 << 31) -#define CCM_CSCR_SSI2 (1 << 23) -#define CCM_CSCR_SSI1 (1 << 22) -#define CCM_CSCR_VPU (1 << 21) -#define CCM_CSCR_MSHC (1 << 20) -#define CCM_CSCR_SPLLRES (1 << 19) -#define CCM_CSCR_MPLLRES (1 << 18) -#define CCM_CSCR_SP (1 << 17) -#define CCM_CSCR_MCU (1 << 16) -#define CCM_CSCR_OSC26MDIV (1 << 4) -#define CCM_CSCR_OSC26M (1 << 3) -#define CCM_CSCR_FPM (1 << 2) -#define CCM_CSCR_SPEN (1 << 1) -#define CCM_CSCR_MPEN (1 << 0) - -/* i.MX27 TO 2+ */ -#define CCM_CSCR_ARM_SRC (1 << 15) - -#define CCM_SPCTL1_LF (1 << 15) -#define CCM_SPCTL1_BRMO (1 << 6)static const char *vpu_sel_clks[] = {"spll" ,"mpll_main2" , };static const char *cpu_sel_clks[] = {"mpll_main2" ,"mpll" , };
Signature · 1 line
1.8.5.5
Sascha Hauer
maintainerPATCH 1/2 ARM: i.MX27: Introduce DT include for clock provider
In reply to Alexander ShiyanQuoted 8 lines · Alexander Shiyan
Use clock defines in order to make devicetrees more human readable. Additional changes included in this patch (
imx27.dtsi):
- Fix IPG clock for UART6.
- UseEMI_AHB_GATEclock for WEIM.
- AddedGPIO_IPG_GATEclock for GPIO nodes. Currently this clock is not used by the driver, but it can be added in the future.Signed-off-by Alexander Shiyan <[email protected]>
Looks good to me. Both:
Sascha
Signature · 4 lines
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PATCH 1/2 ARM: i.MX27: Introduce DT include for clock provider
In reply to Alexander ShiyanQuoted 8 lines · Alexander Shiyan
Use clock defines in order to make devicetrees more human readable. Additional changes included in this patch (
imx27.dtsi):
- Fix IPG clock for UART6.
- UseEMI_AHB_GATEclock for WEIM.
- AddedGPIO_IPG_GATEclock for GPIO nodes. Currently this clock is not used by the driver, but it can be added in the future.Signed-off-by Alexander Shiyan <[email protected]>
Quoted 10 lines
--- .../devicetree/bindings/clock/imx27-clock.txt | 127 +------- arch/arm/boot/dts/imx27-pdk.dts | 2 +- arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 2 +- arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi | 2 +- arch/arm/boot/dts/imx27.dtsi | 115 ++++--- arch/arm/mach-imx/clk-imx27.c | 347 ++++++++++----------- include/dt-bindings/clock/imx27-clock.h | 107 +++++++ 7 files changed, 362 insertions(+), 340 deletions(-) create mode 100644 include/dt-bindings/clock/imx27-clock.h
Please split all the dts files into a second patch.
Shawn