iMX6 SATA configuration
Subsystems (3)
cover iMX6 SATA configuration
Another round of these patches. I've integrated Shawn's patch to split the documentation into this series so I can add the DT documentation on top of it.
.../devicetree/bindings/ata/ahci-platform.txt | 6 - Documentation/devicetree/bindings/ata/imx-sata.txt | 36 ++++ arch/arm/boot/dts/imx6q-cubox-i.dts | 4 + drivers/ata/ahci_imx.c | 184 ++++++++++++++++++++- 4 files changed, 216 insertions(+), 14 deletions(-)
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FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly improving, and getting towards what was expected from it.
PATCH v3 1/8 dt-bindings: ata: create bindings for imx sata controller
From: Shawn Guo <[email protected]>
To: Tejun Heo <[email protected]>,linux-ide at vger.kernel.org
The Freescale i.MX SATA controller mostly conforms to the AHCI interface, but there are some special extensions at integration level like clocks settings and hardware parameters.
Let's create a separate bindings doc for imx sata controller, so that more imx specific properties can be added later without messing up the generic ahci-platform bindings.
--- .../devicetree/bindings/ata/ahci-platform.txt | 6 ----- Documentation/devicetree/bindings/ata/imx-sata.txt | 26 ++++++++++++++++++++++ 2 files changed, 26 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/imx-sata.txt
Documentation/devicetree/bindings/ata/ahci-platform.txt +0 -6
@@ -6,8 +6,6 @@ Each SATA controller should have its own node. Required properties: - compatible : compatible string, one of: - "allwinner,sun4i-a10-ahci" - - "fsl,imx53-ahci" - - "fsl,imx6q-ahci" - "hisilicon,hisi-ahci" - "ibm,476gtr-ahci" - "marvell,armada-380-ahci"
@@ -22,10 +20,6 @@ Each SATA controller should have its own node. - clocks : a list of phandle + clock specifier pairs - target-supply : regulator for SATA target power -"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties: -- clocks : must contain the sata, sata_ref and ahb clocks -- clock-names : must contain "ahb" for the ahb clock - Examples: sata at ffe08000 { compatible = "snps,spear-ahci";
Documentation/devicetree/bindings/ata/imx-sata.txt new file +26 -0
@@ -0,0 +1,26 @@ +* Freescale i.MX AHCI SATA Controller + +The Freescale i.MX SATA controller mostly conforms to the AHCI interface +with some special extensions at integration level. + +Required properties: +- compatible : should be one of the following: + - "fsl,imx53-ahci" for i.MX53 SATA controller + - "fsl,imx6q-ahci" for i.MX6Q SATA controller +- interrupts : interrupt mapping for SATA IRQ +- reg : registers mapping +- clocks : list of clock specifiers, must contain an entry for each + required entry in clock-names +- clock-names : should include "sata", "sata_ref" and "ahb" entries + +Examples: + +sata at 02200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_SATA>, + <&clks IMX6QDL_CLK_SATA_REF_100M>, + <&clks IMX6QDL_CLK_AHB>; + clock-names = "sata", "sata_ref", "ahb"; +};
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1.8.3.1
PATCH v3 2/8 ata: ahci_imx: warn when disabling ahci link
In reply to Russell King - ARM LinuxWhen the AHCI link is disabled, it can't be re-enabled except by resetting the entire SoC. Rather than doing this silently print some kernel messages to inform the user, along with how to avoid this.
--- drivers/ata/ahci_imx.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/ata/ahci_imx.c +4 -0
@@ -324,6 +324,10 @@ static void ahci_imx_error_handler(struct ata_port *ap)writel (reg_val |IMX_P0PHYCR_TEST_PDDQ , mmio +IMX_P0PHYCR );imx_sata_disable (hpriv); imxpriv->no_device = true; + +dev_info (ap->dev,"no device found, disabling link.\n" ); +dev_info (ap->dev,"pass " MODULE_PARAM_PREFIX +".hotplug=1 to enable hotplug\n" ); } static int ahci_imx_softreset(struct ata_link *link, unsigned int *class,
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1.8.3.1
PATCH v3 2/8 ata: ahci_imx: warn when disabling ahci link
Quoted 6 lines · Russell King
When the AHCI link is disabled, it can't be re-enabled except by resetting the entire SoC. Rather than doing this silently print some kernel messages to inform the user, along with how to avoid this.
Signed-off-by Russell King <[email protected]>
The same patch from an earlier posting got applied to libata/for-3.16-fixes.
Thanks.
Signature · 1 line
tejun
PATCH v3 3/8 ata: ahci_imx: allow hardware parameters to be specified in DT
In reply to Russell King - ARM LinuxVarious SATA phy parameters are board specific, and therefore need to be configured.
--- drivers/ata/ahci_imx.c | 168 ++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 160 insertions(+), 8 deletions(-)
drivers/ata/ahci_imx.c +160 -8
@@ -62,6 +62,7 @@ struct imx_ahci_priv {struct regmap *gpr;bool no_device;bool first_time; +u32 phy_params; };static int ahci_imx_hotplug;
@@ -246,14 +247,7 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)IMX6Q_GPR13_SATA_TX_LVL_MASK |IMX6Q_GPR13_SATA_MPLL_CLK_EN |IMX6Q_GPR13_SATA_TX_EDGE_RATE , -IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB | -IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M | -IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F | -IMX6Q_GPR13_SATA_SPD_MODE_3P0G | -IMX6Q_GPR13_SATA_MPLL_SS_EN | -IMX6Q_GPR13_SATA_TX_ATTEN_9_16 | -IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB | - IMX6Q_GPR13_SATA_TX_LVL_1_025_V); + imxpriv->phy_params);regmap_update_bits (imxpriv->gpr,IOMUXC_GPR13 ,IMX6Q_GPR13_SATA_MPLL_CLK_EN ,IMX6Q_GPR13_SATA_MPLL_CLK_EN );
@@ -368,6 +362,152 @@ static const struct of_device_id imx_ahci_of_match[] = { };MODULE_DEVICE_TABLE (of, imx_ahci_of_match); +struct reg_value { +u32 of_value; +u32 reg_value; +}; + +struct reg_property { +const char *name; +const struct reg_value *values; +size_t num_values; +u32 def_value; +}; + +static const struct reg_value gpr13_tx_level[] = { + {937 ,IMX6Q_GPR13_SATA_TX_LVL_0_937_V }, + {947 ,IMX6Q_GPR13_SATA_TX_LVL_0_947_V }, + {957 ,IMX6Q_GPR13_SATA_TX_LVL_0_957_V }, + {966 ,IMX6Q_GPR13_SATA_TX_LVL_0_966_V }, + {976 ,IMX6Q_GPR13_SATA_TX_LVL_0_976_V }, + {986 ,IMX6Q_GPR13_SATA_TX_LVL_0_986_V }, + {996 ,IMX6Q_GPR13_SATA_TX_LVL_0_996_V }, + {1005 ,IMX6Q_GPR13_SATA_TX_LVL_1_005_V }, + {1015 ,IMX6Q_GPR13_SATA_TX_LVL_1_015_V }, + {1025 ,IMX6Q_GPR13_SATA_TX_LVL_1_025_V }, + {1035 ,IMX6Q_GPR13_SATA_TX_LVL_1_035_V }, + {1045 ,IMX6Q_GPR13_SATA_TX_LVL_1_045_V }, + {1054 ,IMX6Q_GPR13_SATA_TX_LVL_1_054_V }, + {1064 ,IMX6Q_GPR13_SATA_TX_LVL_1_064_V }, + {1074 ,IMX6Q_GPR13_SATA_TX_LVL_1_074_V }, + {1084 ,IMX6Q_GPR13_SATA_TX_LVL_1_084_V }, + {1094 ,IMX6Q_GPR13_SATA_TX_LVL_1_094_V }, + {1104 ,IMX6Q_GPR13_SATA_TX_LVL_1_104_V }, + {1113 ,IMX6Q_GPR13_SATA_TX_LVL_1_113_V }, + {1123 ,IMX6Q_GPR13_SATA_TX_LVL_1_123_V }, + {1133 ,IMX6Q_GPR13_SATA_TX_LVL_1_133_V }, + {1143 ,IMX6Q_GPR13_SATA_TX_LVL_1_143_V }, + {1152 ,IMX6Q_GPR13_SATA_TX_LVL_1_152_V }, + {1162 ,IMX6Q_GPR13_SATA_TX_LVL_1_162_V }, + {1172 ,IMX6Q_GPR13_SATA_TX_LVL_1_172_V }, + {1182 ,IMX6Q_GPR13_SATA_TX_LVL_1_182_V }, + {1191 ,IMX6Q_GPR13_SATA_TX_LVL_1_191_V }, + {1201 ,IMX6Q_GPR13_SATA_TX_LVL_1_201_V }, + {1211 ,IMX6Q_GPR13_SATA_TX_LVL_1_211_V }, + {1221 ,IMX6Q_GPR13_SATA_TX_LVL_1_221_V }, + {1230 ,IMX6Q_GPR13_SATA_TX_LVL_1_230_V }, + {1240 ,IMX6Q_GPR13_SATA_TX_LVL_1_240_V } +}; + +static const struct reg_value gpr13_tx_boost[] = { + {0 ,IMX6Q_GPR13_SATA_TX_BOOST_0_00_DB }, + {370 ,IMX6Q_GPR13_SATA_TX_BOOST_0_37_DB }, + {740 ,IMX6Q_GPR13_SATA_TX_BOOST_0_74_DB }, + {1110 ,IMX6Q_GPR13_SATA_TX_BOOST_1_11_DB }, + {1480 ,IMX6Q_GPR13_SATA_TX_BOOST_1_48_DB }, + {1850 ,IMX6Q_GPR13_SATA_TX_BOOST_1_85_DB }, + {2220 ,IMX6Q_GPR13_SATA_TX_BOOST_2_22_DB }, + {2590 ,IMX6Q_GPR13_SATA_TX_BOOST_2_59_DB }, + {2960 ,IMX6Q_GPR13_SATA_TX_BOOST_2_96_DB }, + {3330 ,IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB }, + {3700 ,IMX6Q_GPR13_SATA_TX_BOOST_3_70_DB }, + {4070 ,IMX6Q_GPR13_SATA_TX_BOOST_4_07_DB }, + {4440 ,IMX6Q_GPR13_SATA_TX_BOOST_4_44_DB }, + {4810 ,IMX6Q_GPR13_SATA_TX_BOOST_4_81_DB }, + {5280 ,IMX6Q_GPR13_SATA_TX_BOOST_5_28_DB }, + {5750 ,IMX6Q_GPR13_SATA_TX_BOOST_5_75_DB } +}; + +static const struct reg_value gpr13_tx_atten[] = { + {8 ,IMX6Q_GPR13_SATA_TX_ATTEN_8_16 }, + {9 ,IMX6Q_GPR13_SATA_TX_ATTEN_9_16 }, + {10 ,IMX6Q_GPR13_SATA_TX_ATTEN_10_16 }, + {12 ,IMX6Q_GPR13_SATA_TX_ATTEN_12_16 }, + {14 ,IMX6Q_GPR13_SATA_TX_ATTEN_14_16 }, + {16 ,IMX6Q_GPR13_SATA_TX_ATTEN_16_16 }, +}; + +static const struct reg_value gpr13_rx_eq[] = { + {500 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_0_5_DB }, + {1000 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_1_0_DB }, + {1500 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_1_5_DB }, + {2000 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_2_0_DB }, + {2500 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_2_5_DB }, + {3000 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB }, + {3500 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_3_5_DB }, + {4000 ,IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB }, +}; + +static const struct reg_property gpr13_props[] = { + { + .name ="fsl,transmit-level-mV" , + .values = gpr13_tx_level, + .num_values =ARRAY_SIZE (gpr13_tx_level), + .def_value =IMX6Q_GPR13_SATA_TX_LVL_1_025_V , + }, { + .name ="fsl,transmit-boost-mdB" , + .values = gpr13_tx_boost, + .num_values =ARRAY_SIZE (gpr13_tx_boost), + .def_value =IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB , + }, { + .name ="fsl,transmit-atten-16ths" , + .values = gpr13_tx_atten, + .num_values =ARRAY_SIZE (gpr13_tx_atten), + .def_value =IMX6Q_GPR13_SATA_TX_ATTEN_9_16 , + }, { + .name ="fsl,receive-eq-mdB" , + .values = gpr13_rx_eq, + .num_values =ARRAY_SIZE (gpr13_rx_eq), + .def_value =IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB , + }, +}; + +static u32 imx_ahci_parse_props (struct device *dev, +const struct reg_property *prop,size_t num) +{ +struct device_node *np = dev->of_node; +u32 reg_value =0 ; +int i, j; + +for (i =0 ; i < num; i++, prop++) { +u32 of_val; + +if (of_property_read_u32 (np, prop->name, &of_val)) { +dev_info (dev,"%s not specified, using %08x\n" , + prop->name, prop->def_value); + reg_value |= prop->def_value; +continue ; + } + +for (j =0 ; j < prop->num_values; j++) { +if (prop->values[j].of_value == of_val) { +dev_info (dev,"%s value %u, using %08x\n" , + prop->name, of_val, prop->values[j].reg_value); + reg_value |= prop->values[j].reg_value; +break ; + } + } + +if (j == prop->num_values) { +dev_err (dev,"DT property %s is not a valid value\n" , + prop->name); + reg_value |= prop->def_value; + } + } + +return reg_value; +} +static int imx_ahci_probe (struct platform_device *pdev) {struct device *dev = &pdev->dev;
@@ -396,6 +536,8 @@ static int imx_ahci_probe(struct platform_device *pdev) }if (imxpriv->type ==AHCI_IMX6Q ) { +u32 reg_value; + imxpriv->gpr =syscon_regmap_lookup_by_compatible ("fsl,imx6q-iomuxc-gpr" );if (IS_ERR (imxpriv->gpr)) {
@@ -403,6 +545,16 @@ static int imx_ahci_probe(struct platform_device *pdev) "failed to find fsl,imx6q-iomux-gpr regmap\n");return PTR_ERR (imxpriv->gpr); } + + reg_value =imx_ahci_parse_props (dev, gpr13_props, +ARRAY_SIZE (gpr13_props)); + + imxpriv->phy_params = +IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M | +IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F | +IMX6Q_GPR13_SATA_SPD_MODE_3P0G | +IMX6Q_GPR13_SATA_MPLL_SS_EN | + reg_value; } hpriv =ahci_platform_get_resources (pdev);
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1.8.3.1
PATCH v3 4/8 dt-bindings: ata: add ahci_imx electrical properties
In reply to Russell King - ARM LinuxAdd the documentation for the electrical properties for the iMX SATA controller. There are many values for these, and listing them would be error prone. Refer readers to the device documentation and driver source code for these details.
--- Documentation/devicetree/bindings/ata/imx-sata.txt | 8 ++++++++ 1 file changed, 8 insertions(+)
Documentation/devicetree/bindings/ata/imx-sata.txt +8 -0
@@ -13,6 +13,14 @@ with some special extensions at integration level. required entry in clock-names - clock-names : should include "sata", "sata_ref" and "ahb" entries +Optional properties: +- fsl,transmit-level-mV : transmit voltage level, in millivolts. +- fsl,transmit-boost-mdB : transmit boost level, in milli-decibels +- fsl,transmit-atten-16ths : transmit attenuation, in 16ths +- fsl,receive-eq-mdB : receive equalisation, in milli-decibels + Please refer to the technical documentation or the driver source code + for the list of legal values for these options. + Examples: sata at 02200000 {
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1.8.3.1
PATCH v3 5/8 ata: ahci_imx: add disable for spread-spectrum
In reply to Russell King - ARM LinuxSpread-spectrum doesn't work with Cubox-i hardware, so we have to disable this feature. Add a DT property so that platforms can indicate that this feature should not be enabled.
Having it as a negative property keeps existing DT files working.
--- drivers/ata/ahci_imx.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
drivers/ata/ahci_imx.c +13 -1
@@ -372,6 +372,7 @@ struct reg_property {const struct reg_value *values;size_t num_values;u32 def_value; +u32 set_value; };static const struct reg_value gpr13_tx_level[] = {
@@ -469,6 +470,10 @@ static const struct reg_property gpr13_props[] = { .values = gpr13_rx_eq, .num_values = ARRAY_SIZE(gpr13_rx_eq), .def_value = IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB, + }, { + .name = "fsl,no-spread-spectrum", + .def_value = IMX6Q_GPR13_SATA_MPLL_SS_EN, + .set_value = 0, }, };
@@ -482,6 +487,14 @@ static u32 imx_ahci_parse_props(struct device *dev,for (i =0 ; i < num; i++, prop++) {u32 of_val; +if (prop->num_values ==0 ) { +if (of_property_read_bool (np, prop->name)) + reg_value |= prop->set_value; +else + reg_value |= prop->def_value; +continue ; + } +if (of_property_read_u32 (np, prop->name, &of_val)) {dev_info (dev,"%s not specified, using %08x\n" , prop->name, prop->def_value);
@@ -553,7 +566,6 @@ static int imx_ahci_probe(struct platform_device *pdev)IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |IMX6Q_GPR13_SATA_SPD_MODE_3P0G | -IMX6Q_GPR13_SATA_MPLL_SS_EN | reg_value; }
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1.8.3.1
PATCH v3 6/8 dt-bindings: ata: document ability to disable spread-spectrum clock
In reply to Russell King - ARM LinuxAdd documentation of the fsl,no-spread-spectrum option.
--- Documentation/devicetree/bindings/ata/imx-sata.txt | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/ata/imx-sata.txt +2 -0
@@ -20,6 +20,8 @@ with some special extensions at integration level. - fsl,receive-eq-mdB : receive equalisation, in milli-decibels Please refer to the technical documentation or the driver source code for the list of legal values for these options. +- fsl,no-spread-spectrum : disable spread-spectrum clocking on the SATA + link. Examples:
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1.8.3.1
PATCH v3 7/8 ARM: dts: cubox-i: add eSATA DT configuration
In reply to Russell King - ARM LinuxAdd the transmit level, boost and attenuation parameters necessary for the eSATA interface on Cubox-i to work.
--- arch/arm/boot/dts/imx6q-cubox-i.dts | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/boot/dts/imx6q-cubox-i.dts +3 -0
@@ -13,4 +13,7 @@ &sata { status = "okay"; + fsl,transmit-level-mV = <1104>; + fsl,transmit-boost-mdB = <0>; + fsl,transmit-atten-16ths = <9>; };
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1.8.3.1
PATCH v3 7/8 ARM: dts: cubox-i: add eSATA DT configuration
Quoted 4 lines · Russell King
Add the transmit level, boost and attenuation parameters necessary for the eSATA interface on Cubox-i to work.
Signed-off-by Russell King <[email protected]>
Applied #7 and #8, thanks.
PATCH v3 8/8 ARM: dts: cubox-i: disable spread-spectrum for Cubox-i eSATA
In reply to Russell King - ARM LinuxSpread-spectrum doesn't work with Cubox-i hardware. eSATA devices are detected, but then fail on normal IO. Therefore, disable this feature.
--- arch/arm/boot/dts/imx6q-cubox-i.dts | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/imx6q-cubox-i.dts +1 -0
@@ -16,4 +16,5 @@ fsl,transmit-level-mV = <1104>; fsl,transmit-boost-mdB = <0>; fsl,transmit-atten-16ths = <9>; + fsl,no-spread-spectrum; };
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1.8.3.1
cover iMX6 SATA configuration
In reply to Russell King - ARM LinuxQuoted 9 lines · Russell King - ARM Linux
Another round of these patches. I've integrated Shawn's patch to split the documentation into this series so I can add the DT documentation on top of it.
.../devicetree/bindings/ata/ahci-platform.txt | 6 - Documentation/devicetree/bindings/ata/imx-sata.txt | 36 ++++ arch/arm/boot/dts/imx6q-cubox-i.dts | 4 + drivers/ata/ahci_imx.c | 184 ++++++++++++++++++++- 4 files changed, 216 insertions(+), 14 deletions(-)
For patches 1, 4, and 6:
Rob
cover iMX6 SATA configuration
In reply to Russell King - ARM LinuxQuoted 9 lines · Russell King - ARM Linux
Another round of these patches. I've integrated Shawn's patch to split the documentation into this series so I can add the DT documentation on top of it.
.../devicetree/bindings/ata/ahci-platform.txt | 6 - Documentation/devicetree/bindings/ata/imx-sata.txt | 36 ++++ arch/arm/boot/dts/imx6q-cubox-i.dts | 4 + drivers/ata/ahci_imx.c | 184 ++++++++++++++++++++- 4 files changed, 216 insertions(+), 14 deletions(-)
Patches look good to me. Shawn, can you please review the ahci_imx portion? How should the patches be routed? Should I pick only the ata parts or apply the whole thing?
Thanks.
Signature · 1 line
tejun
cover iMX6 SATA configuration
Quoted 5 lines · Tejun Heo
Quoted 4 lines · Russell King - ARM Linux
Another round of these patches. I've integrated Shawn's patch to split the documentation into this series so I can add the DT documentation on top of it.
Quoted 8 lines
Quoted 5 lines
.../devicetree/bindings/ata/ahci-platform.txt | 6 - Documentation/devicetree/bindings/ata/imx-sata.txt | 36 ++++ arch/arm/boot/dts/imx6q-cubox-i.dts | 4 + drivers/ata/ahci_imx.c | 184 ++++++++++++++++++++- 4 files changed, 216 insertions(+), 14 deletions(-)Patches look good to me. Shawn, can you please review the
ahci_imxportion?
I also tested the series on imx6q-sabresd board and nothing breaks regarding SATA support on the board.
Quoted 2 lines
How should the patches be routed? Should I pick only the ata parts or apply the whole thing?
I will apply the last two dts patches via IMX tree, and please apply the first 6 patches through your tree.
Shawn
cover iMX6 SATA configuration
Quoted 2 lines · Shawn Guo
I will apply the last two dts patches via IMX tree, and please apply the first 6 patches through your tree.
Alright, applied the rest to libata/for-3.17.
Thanks.
Signature · 1 line
tejun