Add Marvell Armada XP MV78460 SoC support
Subsystems (12)
cover Add Marvell Armada XP MV78460 SoC support
This patch series adds support for the Marvell Armada XP SoC's. Specifically the MV78460.
Basic support for the db-78460-bp evaluation board is added. Supporting the following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)
While doing this port, I tried to consolidate common Marvell code into the arch/arm/mvebu-common directory. This directory should be used to collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370, Armada 380, Armada XP). I started with Kirkwood and some of its interfaces. Dove is definitely a candidate to move some of its code into thise directory as well.
Because of the renaming of some functions from kirkwood to mvebu (to make them better usable on other MVEBU SoCs), this patch series not only touches the ARM SoC specific files (in arch/arm/...). But also some device drivers (e.g. SPI, I2C). Separating these driver specific patches into different patches that are not depending on this ARM patch series seems hard if not impossible. Thats why I would really like to get this patch series to get applied completely be one custodian. Not sure if this could / should go through Tom directly? Only if all the subsystem custodians have given their "Acked-by ..." of course.
Testing on Kirkwood based boards would be greatly appreciated. So anyone with access to some of those board, please give this patch series a try. I really hope that I didn't break anything while merging some of the code into the common mvebu directory.
Please note that this Armada XP port still requires the "Binary Header" (bin_hdr) from the Marvell U-Boot tree to be included as a binary blob into the resulting image (u-boot.kwb) that can be booted by the MVEBU BootROM. This binary bin_hdr is usually responsible for the DDR3 controller configuration and the DDR3 training. One way to extract this bin_hdr binary from an existing Marvell boot image right now is to use the "kwbimage" tool from Barebox. Please refer to the documentation thats available there for more details.
Thanks,
Stefan
Stefan Roese (25):
sf: Add M25PX64 SPI NOR flash ID
arm: kirkwood: spi.h: Add some missing parenthesis
spi: kirkwood_spi.c: Some fixes and cleanup
spi: kirkwood_spi.c: Make global variable static
spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
arm: marvell: Move arch/kirkwood.h to arch/soc.h
arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
arm: marvell: Rework timer.c to make it usable for other MVEBU
platforms
arm: mvebu: Add common mbus functions to use on Marvell SoCs
spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
arm: marvell: Extract kirkwood gpio functions into new common file
gpio.c
spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
arm: kirkwood: Change naming of dram functions from km_foo() to
mvebu_foo()
net: mvneta.c: Add support for the ethernet controller of the Marvell
Armada XP SoC
net: phy.h: Make PHY autonegotiation timeout configurable
i2c: mvtwsi: Add support for Marvell Armada XP
arm: armada-xp: Add basic support for Marvell Armada XP SoC
arm: armada-xp: Add basic support for the Marvell DB-78460-BP board
arm: kirkwood: Remove some dead code from cpu.c
arm: kirkwood: Use mvebu new common mbus API
tools/kwboot: Sync with latest barebox version to support Armada XP
tools: Compile kwboot for Marvell Armada XP as those SoCs are now
supported
tools: kwbimage: Add image version 1 support for Armada XP / 370
Makefile: Add CONFIG_BUILD_TARGET to automatically build an special
image
Makefile | 9 +
README | 8 +
arch/arm/cpu/arm926ejs/kirkwood/Makefile | 4 +-
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 174 +--
arch/arm/cpu/arm926ejs/kirkwood/mpp.c | 2 +-
arch/arm/cpu/armv7/armada-xp/Makefile | 7 +
arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++
arch/arm/include/asm/arch-armada-xp/config.h | 80 +
arch/arm/include/asm/arch-armada-xp/cpu.h | 103 ++
arch/arm/include/asm/arch-armada-xp/soc.h | 57 +
arch/arm/include/asm/arch-kirkwood/config.h | 2 +-
arch/arm/include/asm/arch-kirkwood/cpu.h | 71 +-
arch/arm/include/asm/arch-kirkwood/gpio.h | 16 +-
.../asm/arch-kirkwood/{kirkwood.h => soc.h} | 25 +-
.../asm/{arch-kirkwood => arch-mvebu}/spi.h | 8 +-
arch/arm/mvebu-common/Makefile | 12 +
.../arm926ejs/kirkwood => mvebu-common}/dram.c | 63 +-
arch/arm/mvebu-common/gpio.c | 30 +
arch/arm/mvebu-common/mbus.c | 477 ++++++
.../arm926ejs/kirkwood => mvebu-common}/timer.c | 92 +-
board/LaCie/net2big_v2/net2big_v2.c | 8 +-
board/LaCie/netspace_v2/netspace_v2.c | 8 +-
board/LaCie/wireless_space/wireless_space.c | 8 +-
board/Marvell/db-78460-bp/Makefile | 7 +
board/Marvell/db-78460-bp/db-78460-bp.c | 120 ++
board/Marvell/db-78460-bp/kwbimage.cfg | 12 +
board/Marvell/dreamplug/dreamplug.c | 10 +-
board/Marvell/guruplug/guruplug.c | 10 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 10 +-
board/Marvell/openrd/openrd.c | 10 +-
board/Marvell/rd6281a/rd6281a.c | 10 +-
board/Marvell/sheevaplug/sheevaplug.c | 10 +-
board/Seagate/dockstar/dockstar.c | 12 +-
board/Seagate/goflexhome/goflexhome.c | 12 +-
board/buffalo/lsxl/lsxl.c | 10 +-
board/cloudengines/pogo_e02/pogo_e02.c | 10 +-
board/d-link/dns325/dns325.c | 8 +-
board/iomega/iconnect/iconnect.c | 10 +-
board/karo/tk71/tk71.c | 10 +-
board/keymile/km_arm/km_arm.c | 10 +-
board/raidsonic/ib62x0/ib62x0.c | 10 +-
boards.cfg | 1 +
drivers/block/mvsata_ide.c | 2 +-
drivers/gpio/kw_gpio.c | 2 +-
drivers/i2c/mvtwsi.c | 4 +-
drivers/mtd/nand/kirkwood_nand.c | 2 +-
drivers/mtd/spi/sf_params.c | 1 +
drivers/net/Makefile | 1 +
drivers/net/mvgbe.c | 2 +-
drivers/net/mvneta.c | 1653 ++++++++++++++++++++
drivers/rtc/mvrtc.h | 2 +-
drivers/spi/kirkwood_spi.c | 44 +-
drivers/usb/host/ehci-marvell.c | 45 +-
include/configs/db-78460-bp.h | 67 +
include/linux/mbus.h | 61 +
include/netdev.h | 1 +
include/phy.h | 2 +
tools/Makefile | 1 +
tools/kwbimage.c | 1050 +++++++++----
tools/kwboot.c | 97 +-
60 files changed, 4056 insertions(+), 723 deletions(-)
create mode 100644 arch/arm/cpu/armv7/armada-xp/Makefile
create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c
create mode 100644 arch/arm/include/asm/arch-armada-xp/config.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/cpu.h
create mode 100644 arch/arm/include/asm/arch-armada-xp/soc.h
rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h => soc.h} (74%)
rename arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h (90%)
create mode 100644 arch/arm/mvebu-common/Makefile
rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/dram.c (57%)
create mode 100644 arch/arm/mvebu-common/gpio.c
create mode 100644 arch/arm/mvebu-common/mbus.c
rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/timer.c (63%)
create mode 100644 board/Marvell/db-78460-bp/Makefile
create mode 100644 board/Marvell/db-78460-bp/db-78460-bp.c
create mode 100644 board/Marvell/db-78460-bp/kwbimage.cfg
create mode 100644 drivers/net/mvneta.c
create mode 100644 include/configs/db-78460-bp.h
create mode 100644 include/linux/mbus.hSignature · 1 line
2.0.1
PATCH 1/25 sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
---
drivers/mtd/spi/sf_params.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/spi/sf_params.c +1 -0
@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = { {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0}, {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0}, {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0}, + {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, 0, SECT_4K}, {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
Signature · 1 line
2.0.1
PATCH 1/25 sf: Add M25PX64 SPI NOR flash ID
Quoted 30 lines · Stefan Roese
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/mtd/spi/sf_params.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/spi/sf_params.c +1
-1@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = { {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0}, {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0}, {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0}, + {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, 0, SECT_4K}, {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, --2.0.1
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Jagan.
PATCH 1/25 sf: Add M25PX64 SPI NOR flash ID
Quoted 14 lines · Jagan Teki
Reviewed-by Jagannadha Sutradharudu Teki <[email protected]>Quoted 11 lines · Stefan Roese
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/mtd/spi/sf_params.c | 1 + 1 file changed, 1 insertion(+)
Quoted 15 lines
Quoted 13 lines
drivers/mtd/spi/sf_params.c +1
-1@@ -71,6 +71,7 @@ const struct spi_flash_params spi_flash_params_table[] = { {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0}, {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0}, {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0}, + {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, 0, SECT_4K}, {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, --Quoted 2 lines
2.0.1
Applied 01/25 to 05/25 to u-boot-spi/master
thanks!
Signature · 1 line
Jagan.
PATCH 2/25 arm: kirkwood: spi.h: Add some missing parenthesis
In reply to Stefan Roese---
arch/arm/include/asm/arch-kirkwood/spi.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/include/asm/arch-kirkwood/spi.h +4 -4
@@ -43,10 +43,10 @@ struct kwspi_registers {#define KWSPI_XFERLEN_2BYTE (1 << 5)#define KWSPI_XFERLEN_MASK (1 << 5)#define KWSPI_ADRLEN_1BYTE 0 -#define KWSPI_ADRLEN_2BYTE 1 << 8 -#define KWSPI_ADRLEN_3BYTE 2 << 8 -#define KWSPI_ADRLEN_4BYTE 3 << 8 -#define KWSPI_ADRLEN_MASK 3 << 8 +#define KWSPI_ADRLEN_2BYTE (1 << 8) +#define KWSPI_ADRLEN_3BYTE (2 << 8) +#define KWSPI_ADRLEN_4BYTE (3 << 8) +#define KWSPI_ADRLEN_MASK (3 << 8)#define KWSPI_TIMEOUT 10000#endif /* __KW_SPI_H__ */
Signature · 1 line
2.0.1
PATCH 2/25 arm: kirkwood: spi.h: Add some missing parenthesis
Quoted 33 lines · Stefan Roese
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
arch/arm/include/asm/arch-kirkwood/spi.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)arch/arm/include/asm/arch-kirkwood/spi.h +4
-5@@ -43,10 +43,10 @@ struct kwspi_registers {#define KWSPI_XFERLEN_2BYTE (1 << 5)#define KWSPI_XFERLEN_MASK (1 << 5)#define KWSPI_ADRLEN_1BYTE 0 -#define KWSPI_ADRLEN_2BYTE 1 << 8 -#define KWSPI_ADRLEN_3BYTE 2 << 8 -#define KWSPI_ADRLEN_4BYTE 3 << 8 -#define KWSPI_ADRLEN_MASK 3 << 8 +#define KWSPI_ADRLEN_2BYTE (1 << 8) +#define KWSPI_ADRLEN_3BYTE (2 << 8) +#define KWSPI_ADRLEN_4BYTE (3 << 8) +#define KWSPI_ADRLEN_MASK (3 << 8)#define KWSPI_TIMEOUT 10000#endif /* __KW_SPI_H__ */ --2.0.1
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Jagan.
PATCH 3/25 spi: kirkwood_spi.c: Some fixes and cleanup
In reply to Stefan RoeseThis patch introduces the clrsetbits_le32() accessor functions in the kirkwood SPI driver. Note that it also includes a fix:
- writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+ writel(KWSPI_SMEMRDY, &spireg->ctrl);
Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead 0xfffffffe is written into this control register. This is the main reason to use the clrsetbits() functions now. As they make clearing bits much less error prone.
Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and spi_cs_deactivate() any more. Its the wrong macro but has the same value as the correct one (KWSPI_CSN_ACT).
This is in preparation for use of this driver on the Marvell Armada XP platform as well.
---
drivers/spi/kirkwood_spi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
drivers/spi/kirkwood_spi.c +5 -6
@@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,if (!slave)return NULL ; -writel (~KWSPI_CSN_ACT |KWSPI_SMEMRDY , &spireg->ctrl); +writel (KWSPI_SMEMRDY , &spireg->ctrl);/* calculate spi clock prescaller using max_hz */ data = ((CONFIG_SYS_TCLK /2 ) / max_hz) +0x10 ;
@@ -137,12 +137,12 @@ void spi_init(void)void spi_cs_activate (struct spi_slave *slave) { -writel (readl (&spireg->ctrl) |KWSPI_IRQUNMASK , &spireg->ctrl); +setbits_le32 (&spireg->ctrl,KWSPI_CSN_ACT ); }void spi_cs_deactivate (struct spi_slave *slave) { -writel (readl (&spireg->ctrl) &KWSPI_IRQMASK , &spireg->ctrl); +clrbits_le32 (&spireg->ctrl,KWSPI_CSN_ACT ); } int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
@@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,* handle data in 8-bit chunks * TBD: 2byte xfer mode to be enabled */ -writel (((readl (&spireg->cfg) & ~KWSPI_XFERLEN_MASK ) | -KWSPI_XFERLEN_1BYTE ), &spireg->cfg); +clrsetbits_le32 (&spireg->cfg,KWSPI_XFERLEN_MASK ,KWSPI_XFERLEN_1BYTE );while (bitlen >4 ) {debug ("loopstart bitlen %d\n" , bitlen);
@@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,if (dout) tmpdout = *(u32 *) dout &0x0ff ; -writel (~KWSPI_SMEMRDIRQ , &spireg->irq_cause); +clrbits_le32 (&spireg->irq_cause,KWSPI_SMEMRDIRQ );writel (tmpdout, &spireg->dout);/* Write the data out */ debug ("*** spi_xfer: ... %08x written, bitlen %d\n" , tmpdout, bitlen);
Signature · 1 line
2.0.1
PATCH 3/25 spi: kirkwood_spi.c: Some fixes and cleanup
Quoted 79 lines · Stefan Roese
This patch introduces the
clrsetbits_le32()accessor functions in the kirkwood SPI driver. Note that it also includes a fix:drivers/spi/kirkwood_spi.c +1
-1-writel (~KWSPI_CSN_ACT |KWSPI_SMEMRDY , &spireg->ctrl); +writel (KWSPI_SMEMRDY , &spireg->ctrl);Here the bit
KWSPI_CSN_ACT(0x1) should have been cleared. Instead0xfffffffeis written into this control register. This is the main reason to use theclrsetbits()functions now. As they make clearing bits much less error prone.Additionally
KWSPI_IRQUNMASKis not used inspi_cs_activate()andspi_cs_deactivate()any more. Its the wrong macro but has the same value as the correct one (KWSPI_CSN_ACT).This is in preparation for use of this driver on the Marvell Armada XP platform as well.
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/spi/kirkwood_spi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)drivers/spi/kirkwood_spi.c +5
-7@@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,if (!slave)return NULL ; -writel (~KWSPI_CSN_ACT |KWSPI_SMEMRDY , &spireg->ctrl); +writel (KWSPI_SMEMRDY , &spireg->ctrl);/* calculate spi clock prescaller using max_hz */ data = ((CONFIG_SYS_TCLK /2 ) / max_hz) +0x10 ;@@ -137,12 +137,12 @@ void spi_init(void)void spi_cs_activate (struct spi_slave *slave) { -writel (readl (&spireg->ctrl) |KWSPI_IRQUNMASK , &spireg->ctrl); +setbits_le32 (&spireg->ctrl,KWSPI_CSN_ACT ); }void spi_cs_deactivate (struct spi_slave *slave) { -writel (readl (&spireg->ctrl) &KWSPI_IRQMASK , &spireg->ctrl); +clrbits_le32 (&spireg->ctrl,KWSPI_CSN_ACT ); } int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,@@ -161,8 +161,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,* handle data in 8-bit chunks * TBD: 2byte xfer mode to be enabled */ -writel (((readl (&spireg->cfg) & ~KWSPI_XFERLEN_MASK ) | -KWSPI_XFERLEN_1BYTE ), &spireg->cfg); +clrsetbits_le32 (&spireg->cfg,KWSPI_XFERLEN_MASK ,KWSPI_XFERLEN_1BYTE );while (bitlen >4 ) {debug ("loopstart bitlen %d\n" , bitlen);@@ -172,7 +171,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,if (dout) tmpdout = *(u32 *) dout &0x0ff ; -writel (~KWSPI_SMEMRDIRQ , &spireg->irq_cause); +clrbits_le32 (&spireg->irq_cause,KWSPI_SMEMRDIRQ );writel (tmpdout, &spireg->dout);/* Write the data out */ debug ("*** spi_xfer: ... %08x written, bitlen %d\n" , tmpdout, bitlen); --2.0.1
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Jagan.
PATCH 4/25 spi: kirkwood_spi.c: Make global variable static
In reply to Stefan Roese---
drivers/spi/kirkwood_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/spi/kirkwood_spi.c +1 -1
@@ -18,7 +18,7 @@static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; -u32 cs_spi_mpp_back[2 ]; +static u32 cs_spi_mpp_back[2 ];struct spi_slave *spi_setup_slave (unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode)
Signature · 1 line
2.0.1
PATCH 4/25 spi: kirkwood_spi.c: Make global variable static
May possible to include in different patch.
Quoted 27 lines · Stefan Roese
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/spi/kirkwood_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/spi/kirkwood_spi.c +1
-2@@ -18,7 +18,7 @@static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; -u32 cs_spi_mpp_back[2 ]; +static u32 cs_spi_mpp_back[2 ];struct spi_slave *spi_setup_slave (unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode) --2.0.1
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Jagan.
PATCH 5/25 spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
In reply to Stefan Roese---
drivers/spi/kirkwood_spi.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-)
drivers/spi/kirkwood_spi.c +6 -8
@@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,/* program spi clock prescaller using max_hz */ writel (KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); -debug ("data = 0x%08x \n" , data); +debug ("data = 0x%08x\n" , data);writel (KWSPI_SMEMRDIRQ , &spireg->irq_cause);writel (KWSPI_IRQMASK , &spireg->irq_mask);
@@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave)/* set new spi mpp and save current mpp config */ kirkwood_mpp_conf (spi_mpp_config, spi_mpp_backup); -#endif return board_spi_claim_bus (slave);
@@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave)*/ int spi_cs_is_valid (unsigned int bus,unsigned int cs) { -return (bus ==0 && (cs ==0 || cs ==1 )); +return bus ==0 && (cs ==0 || cs ==1 ); }#endif
@@ -169,7 +168,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,/* Shift data so it's msb-justified */ if (dout) - tmpdout = *(u32 *) dout &0x0ff ; + tmpdout = *(u32 *)dout &0xff ;clrbits_le32 (&spireg->irq_cause,KWSPI_SMEMRDIRQ );writel (tmpdout, &spireg->dout);/* Write the data out */
@@ -185,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,if (readl (&spireg->irq_cause) &KWSPI_SMEMRDIRQ ) { isread =1 ; tmpdin =readl (&spireg->din); -debug - ("spi_xfer: din %p..%08x read\n" , - din, tmpdin); +debug ("spi_xfer: din %p..%08x read\n" , + din, tmpdin);if (din) { - *((u8 *) din) = (u8 ) tmpdin; + *((u8 *)din) = (u8 )tmpdin; din +=1 ; }if (dout)
Signature · 1 line
2.0.1
PATCH 5/25 spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Quoted 69 lines · Stefan Roese
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/spi/kirkwood_spi.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-)drivers/spi/kirkwood_spi.c +6
-9@@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,/* program spi clock prescaller using max_hz */ writel (KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); -debug ("data = 0x%08x \n" , data); +debug ("data = 0x%08x\n" , data);writel (KWSPI_SMEMRDIRQ , &spireg->irq_cause);writel (KWSPI_IRQMASK , &spireg->irq_mask);@@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave)/* set new spi mpp and save current mpp config */ kirkwood_mpp_conf (spi_mpp_config, spi_mpp_backup); -#endif return board_spi_claim_bus (slave);@@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave)*/ int spi_cs_is_valid (unsigned int bus,unsigned int cs) { -return (bus ==0 && (cs ==0 || cs ==1 )); +return bus ==0 && (cs ==0 || cs ==1 ); }#endif @@ -169,7 +168,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,/* Shift data so it's msb-justified */ if (dout) - tmpdout = *(u32 *) dout &0x0ff ; + tmpdout = *(u32 *)dout &0xff ;clrbits_le32 (&spireg->irq_cause,KWSPI_SMEMRDIRQ );writel (tmpdout, &spireg->dout);/* Write the data out */ @@ -185,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,if (readl (&spireg->irq_cause) &KWSPI_SMEMRDIRQ ) { isread =1 ; tmpdin =readl (&spireg->din); -debug - ("spi_xfer: din %p..%08x read\n" , - din, tmpdin); +debug ("spi_xfer: din %p..%08x read\n" , + din, tmpdin);if (din) { - *((u8 *) din) = (u8 ) tmpdin; + *((u8 *)din) = (u8 )tmpdin; din +=1 ; }if (dout) --2.0.1
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Signature · 1 line
Jagan.
PATCH 6/25 arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
In reply to Stefan RoeseBy moving some kirkwood files into a Marvell common directory, those files can be used by other Marvell platforms as well. The name mvebu is taken from the Linux kernel source tree. It has been chosen there to represent the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's currently are:
Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x
This will be used by the upcoming Armada XP (MV78460) platform support.
---
Makefile | 4 ++++
arch/arm/cpu/arm926ejs/kirkwood/Makefile | 4 +---
arch/arm/mvebu-common/Makefile | 10 ++++++++++
arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/dram.c | 8 +++++++-
arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/timer.c | 0
5 files changed, 22 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mvebu-common/Makefile
rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/dram.c (91%)
rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu-common}/timer.c (100%)Makefile +4 -0
@@ -636,6 +636,10 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610)) libs-y += arch/$(ARCH)/imx-common/ endif +ifneq (,$(filter $(SOC), kirkwood)) +libs-y += arch/$(ARCH)/mvebu-common/ +endif + libs-$(CONFIG_ARM) += arch/arm/cpu/ libs-$(CONFIG_PPC) += arch/powerpc/cpu/
arch/arm/cpu/arm926ejs/kirkwood/Makefile +1 -3
@@ -7,7 +7,5 @@ # obj-y = cpu.o -obj-y += dram.o -obj-y += mpp.o -obj-y += timer.o obj-y += cache.o +obj-y += mpp.o
arch/arm/mvebu-common/Makefile new file +10 -0
@@ -0,0 +1,10 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = dram.o +obj-y += timer.o
arch/arm/mvebu-common/dram.c renamed from arch/arm/cpu/arm926ejs/kirkwood/dram.c +7 -1
@@ -110,7 +110,13 @@ int dram_init(void)if (gd->bd->bi_dram[i].start != gd->ram_size)break ; - gd->ram_size += gd->bd->bi_dram[i].size; +/* +* Don't report more than 3GiB of SDRAM, otherwise there is no +* address space left for the internal registers etc. +*/ +if ((gd->ram_size + gd->bd->bi_dram[i].size !=0 ) && + (gd->ram_size + gd->bd->bi_dram[i].size <= (3 <<30 ))) + gd->ram_size += gd->bd->bi_dram[i].size; }
arch/arm/mvebu-common/timer.c renamed from arch/arm/cpu/arm926ejs/kirkwood/timer.c +0 -0
Signature · 1 line
2.0.1
PATCH 7/25 arm: marvell: Move arch/kirkwood.h to arch/soc.h
In reply to Stefan RoeseThis move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms.
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 2 +-
arch/arm/cpu/arm926ejs/kirkwood/mpp.c | 2 +-
arch/arm/include/asm/arch-kirkwood/config.h | 2 +-
arch/arm/include/asm/arch-kirkwood/{kirkwood.h => soc.h} | 0
arch/arm/mvebu-common/dram.c | 2 +-
arch/arm/mvebu-common/timer.c | 2 +-
board/LaCie/net2big_v2/net2big_v2.c | 2 +-
board/LaCie/netspace_v2/netspace_v2.c | 2 +-
board/LaCie/wireless_space/wireless_space.c | 2 +-
board/Marvell/dreamplug/dreamplug.c | 2 +-
board/Marvell/guruplug/guruplug.c | 2 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +-
board/Marvell/openrd/openrd.c | 2 +-
board/Marvell/rd6281a/rd6281a.c | 2 +-
board/Marvell/sheevaplug/sheevaplug.c | 2 +-
board/Seagate/dockstar/dockstar.c | 2 +-
board/Seagate/goflexhome/goflexhome.c | 2 +-
board/buffalo/lsxl/lsxl.c | 2 +-
board/cloudengines/pogo_e02/pogo_e02.c | 2 +-
board/d-link/dns325/dns325.c | 2 +-
board/iomega/iconnect/iconnect.c | 2 +-
board/karo/tk71/tk71.c | 2 +-
board/keymile/km_arm/km_arm.c | 2 +-
board/raidsonic/ib62x0/ib62x0.c | 2 +-
drivers/block/mvsata_ide.c | 2 +-
drivers/gpio/kw_gpio.c | 2 +-
drivers/i2c/mvtwsi.c | 2 +-
drivers/mtd/nand/kirkwood_nand.c | 2 +-
drivers/net/mvgbe.c | 2 +-
drivers/rtc/mvrtc.h | 2 +-
drivers/spi/kirkwood_spi.c | 2 +-
drivers/usb/host/ehci-marvell.c | 2 +-
32 files changed, 31 insertions(+), 31 deletions(-)
rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h => soc.h} (100%)arch/arm/cpu/arm926ejs/kirkwood/cpu.c +1 -1
@@ -12,7 +12,7 @@#include <u-boot/md5.h> #include <asm/io.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #define BUFLEN 16
arch/arm/cpu/arm926ejs/kirkwood/mpp.c +1 -1
@@ -12,7 +12,7 @@#include <common.h> #include <asm/io.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> static u32 kirkwood_variant (void )
arch/arm/include/asm/arch-kirkwood/config.h +1 -1
@@ -23,7 +23,7 @@#error "SOC Name not defined"#endif /* CONFIG_KW88F6281 */ -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #define CONFIG_ARM926EJS 1/* Basic Architecture */ #define CONFIG_SYS_CACHELINE_SIZE 32/* default Dcache Line length for kirkwood */
arch/arm/include/asm/arch-kirkwood/soc.h renamed from arch/arm/include/asm/arch-kirkwood/kirkwood.h +0 -0
arch/arm/mvebu-common/dram.c +1 -1
@@ -10,7 +10,7 @@#include <common.h> #include <asm/io.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> DECLARE_GLOBAL_DATA_PTR ;
arch/arm/mvebu-common/timer.c +1 -1
@@ -7,7 +7,7 @@#include <common.h> #include <asm/io.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #define UBOOT_CNTR 0/* counter to use for uboot timer */
board/LaCie/net2big_v2/net2big_v2.c +1 -1
@@ -13,7 +13,7 @@#include <command.h> #include <i2c.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/gpio.h>
board/LaCie/netspace_v2/netspace_v2.c +1 -1
@@ -12,7 +12,7 @@#include <common.h> #include <command.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/gpio.h>
board/LaCie/wireless_space/wireless_space.c +1 -1
@@ -12,7 +12,7 @@#include <common.h> #include <command.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/gpio.h>
board/Marvell/dreamplug/dreamplug.c +1 -1
@@ -12,7 +12,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "dreamplug.h"
board/Marvell/guruplug/guruplug.c +1 -1
@@ -9,7 +9,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "guruplug.h"
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +1 -1
@@ -11,7 +11,7 @@#include <common.h> #include <netdev.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "mv88f6281gtw_ge.h"
board/Marvell/openrd/openrd.c +1 -1
@@ -14,7 +14,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "openrd.h"
board/Marvell/rd6281a/rd6281a.c +1 -1
@@ -10,7 +10,7 @@#include <miiphy.h> #include <netdev.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "rd6281a.h"
board/Marvell/sheevaplug/sheevaplug.c +1 -1
@@ -9,7 +9,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "sheevaplug.h"
board/Seagate/dockstar/dockstar.c +1 -1
@@ -11,7 +11,7 @@#include <common.h> #include <miiphy.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/cpu.h> #include <asm/io.h>
board/Seagate/goflexhome/goflexhome.c +1 -1
@@ -14,7 +14,7 @@#include <common.h> #include <miiphy.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/cpu.h> #include <asm/io.h>
board/buffalo/lsxl/lsxl.c +1 -1
@@ -13,7 +13,7 @@#include <malloc.h> #include <netdev.h> #include <miiphy.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/cpu.h> #include <asm/arch/mpp.h> #include <asm/arch/gpio.h>
board/cloudengines/pogo_e02/pogo_e02.c +1 -1
@@ -13,7 +13,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "pogo_e02.h"
board/d-link/dns325/dns325.c +1 -1
@@ -14,7 +14,7 @@#include <miiphy.h> #include <netdev.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/arch/gpio.h> #include "dns325.h"
board/iomega/iconnect/iconnect.c +1 -1
@@ -9,7 +9,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "iconnect.h"
board/karo/tk71/tk71.c +1 -1
@@ -8,7 +8,7 @@#include <common.h> #include <miiphy.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include <asm/io.h>
board/keymile/km_arm/km_arm.c +1 -1
@@ -20,7 +20,7 @@#include <spi.h> #include <asm/io.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "../common/common.h"
board/raidsonic/ib62x0/ib62x0.c +1 -1
@@ -11,7 +11,7 @@#include <miiphy.h> #include <asm/io.h> #include <asm/arch/cpu.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/mpp.h> #include "ib62x0.h"
drivers/block/mvsata_ide.c +1 -1
@@ -12,7 +12,7 @@#if defined(CONFIG_ORION5X )#include <asm/arch/orion5x.h> #elif defined(CONFIG_KIRKWOOD ) -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #endif /* SATA port registers */
drivers/gpio/kw_gpio.c +1 -1
@@ -16,7 +16,7 @@#include <common.h> #include <asm/bitops.h> #include <asm/io.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/gpio.h> static unsigned long gpio_valid_input[BITS_TO_LONGS (GPIO_MAX )];
drivers/i2c/mvtwsi.c +1 -1
@@ -21,7 +21,7 @@#if defined(CONFIG_ORION5X )#include <asm/arch/orion5x.h> #elif defined(CONFIG_KIRKWOOD ) -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #else #error Driver mvtwsi not supported by SoC or board#endif
drivers/mtd/nand/kirkwood_nand.c +1 -1
@@ -8,7 +8,7 @@#include <common.h> #include <asm/io.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <nand.h> /* NAND Flash Soc registers */
drivers/net/mvgbe.c +1 -1
@@ -24,7 +24,7 @@#include <asm/arch/cpu.h> #if defined(CONFIG_KIRKWOOD ) -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #elif defined(CONFIG_ORION5X )#include <asm/arch/orion5x.h> #elif defined(CONFIG_DOVE )
drivers/rtc/mvrtc.h +1 -1
@@ -12,7 +12,7 @@#ifndef _MVRTC_H_#define _MVRTC_H_ -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <compiler.h> /* RTC registers */
drivers/spi/kirkwood_spi.c +1 -1
@@ -12,7 +12,7 @@#include <malloc.h> #include <spi.h> #include <asm/io.h> -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #include <asm/arch/spi.h> #include <asm/arch/mpp.h>
drivers/usb/host/ehci-marvell.c +1 -1
@@ -13,7 +13,7 @@#include <asm/arch/cpu.h> #if defined(CONFIG_KIRKWOOD ) -#include <asm/arch/kirkwood.h> +#include <asm/arch/soc.h> #elif defined(CONFIG_ORION5X )#include <asm/arch/orion5x.h> #endif
Signature · 1 line
2.0.1
PATCH 8/25 arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
In reply to Stefan RoeseThis move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP support.
---
arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h | 0
drivers/spi/kirkwood_spi.c | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h (100%)arch/arm/include/asm/arch-mvebu/spi.h renamed from arch/arm/include/asm/arch-kirkwood/spi.h +0 -0
drivers/spi/kirkwood_spi.c +1 -1
@@ -13,8 +13,8 @@#include <spi.h> #include <asm/io.h> #include <asm/arch/soc.h> -#include <asm/arch/spi.h> #include <asm/arch/mpp.h> +#include <asm/arch-mvebu/spi.h> static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ;
Signature · 1 line
2.0.1
PATCH 8/25 arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
Quoted 21 lines · Stefan Roese
This move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP support.
Signed-off-by Stefan Roese <[email protected]>---
arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h | 0 drivers/spi/kirkwood_spi.c | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h (100%)arch/arm/include/asm/arch-mvebu/spi.h renamed from arch/arm/include/asm/arch-kirkwood/spi.h +0
-0drivers/spi/kirkwood_spi.c +0
-0
drivers/spi/kirkwood_spi.c line 20
Quoted 9 lines
drivers/spi/kirkwood_spi.c +1
-1@@ -13,8 +13,8 @@#include <spi.h> #include <asm/io.h> #include <asm/arch/soc.h> -#include <asm/arch/spi.h> #include <asm/arch/mpp.h> +#include <asm/arch-mvebu/spi.h> static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ;
thanks!
Signature · 1 line
Jagan.
PATCH 9/25 arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
In reply to Stefan RoeseThis patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
---
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +- arch/arm/mvebu-common/timer.c | 90 ++++++++++++++------------------ 2 files changed, 41 insertions(+), 51 deletions(-)
arch/arm/include/asm/arch-kirkwood/soc.h +1 -1
@@ -33,7 +33,7 @@#define KW_SPI_BASE (KW_REGISTER(0x10600))#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))#define KW_CPU_REG_BASE (KW_REGISTER(0x20100)) -#define KW_TIMER_BASE (KW_REGISTER(0x20300)) +#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))#define KW_USB20_BASE (KW_REGISTER(0x50000))#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
arch/arm/mvebu-common/timer.c +40 -50
133 lines not on this page · raw message
Signature · 1 line
2.0.1
PATCH 10/25 arm: mvebu: Add common mbus functions to use on Marvell SoCs
In reply to Stefan RoeseThese mbus functions are ported from Barebox. The Barebox version is ported from Linux. These functions will be first used by the upcoming Armada XP support. Later other Marvell SoC's will be adopted to use these functions as well (Kirkwood, Orion).
---
arch/arm/mvebu-common/Makefile | 1 + arch/arm/mvebu-common/mbus.c | 477 +++++++++++++++++++++++++++++++++++++++++ include/linux/mbus.h | 61 ++++++ 3 files changed, 539 insertions(+) create mode 100644 arch/arm/mvebu-common/mbus.c create mode 100644 include/linux/mbus.h
arch/arm/mvebu-common/Makefile +1 -0
@@ -7,4 +7,5 @@ # obj-y = dram.o +obj-$(CONFIG_ARMADA_XP) += mbus.o obj-y += timer.o
arch/arm/mvebu-common/mbus.c new file +477 -0
477 lines not on this page · raw message
include/linux/mbus.h new file +61 -0
61 lines not on this page · raw message
Signature · 1 line
2.0.1
PATCH 11/25 spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
In reply to Stefan RoeseCompile the pin multiplexing only on Kirkwood platforms. As the Armada XP doesn't need it.
---
drivers/spi/kirkwood_spi.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
drivers/spi/kirkwood_spi.c +10 -0
@@ -13,22 +13,28 @@#include <spi.h> #include <asm/io.h> #include <asm/arch/soc.h> +#ifdef CONFIG_KIRKWOOD #include <asm/arch/mpp.h> +#endif #include <asm/arch-mvebu/spi.h> static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; +#ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2 ]; +#endif struct spi_slave *spi_setup_slave (unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode) {struct spi_slave *slave;u32 data; +#ifdef CONFIG_KIRKWOOD static const u32 kwspi_mpp_config[2 ][2 ] = { { MPP0_SPI_SCn,0 },/* if cs == 0 */ { MPP7_SPI_SCn,0 }/* if cs != 0 */ }; +#endif if (!spi_cs_is_valid (bus, cs))return NULL ;
@@ -51,15 +57,19 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,writel (KWSPI_SMEMRDIRQ , &spireg->irq_cause);writel (KWSPI_IRQMASK , &spireg->irq_mask); +#ifdef CONFIG_KIRKWOOD /* program mpp registers to select SPI_CSn */ kirkwood_mpp_conf (kwspi_mpp_config[cs ?1 :0 ], cs_spi_mpp_back); +#endif return slave; }void spi_free_slave (struct spi_slave *slave) { +#ifdef CONFIG_KIRKWOOD kirkwood_mpp_conf (cs_spi_mpp_back,NULL ); +#endif free (slave); }
Signature · 1 line
2.0.1
PATCH 11/25 spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
Quoted 52 lines · Stefan Roese
Compile the pin multiplexing only on Kirkwood platforms. As the Armada XP doesn't need it.
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
drivers/spi/kirkwood_spi.c | 10 ++++++++++ 1 file changed, 10 insertions(+)drivers/spi/kirkwood_spi.c +8
-0@@ -13,22 +13,28 @@#include <spi.h> #include <asm/io.h> #include <asm/arch/soc.h> +#ifdef CONFIG_KIRKWOOD #include <asm/arch/mpp.h> +#endif #include <asm/arch-mvebu/spi.h> static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; +#ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2 ]; +#endif struct spi_slave *spi_setup_slave (unsigned int bus,unsigned int cs,unsigned int max_hz,unsigned int mode) {struct spi_slave *slave;u32 data; +#ifdef CONFIG_KIRKWOOD static const u32 kwspi_mpp_config[2 ][2 ] = { { MPP0_SPI_SCn,0 },/* if cs == 0 */ { MPP7_SPI_SCn,0 }/* if cs != 0 */ }; +#endif if (!spi_cs_is_valid (bus, cs))return NULL ;@@ -51,15 +57,19 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,writel (KWSPI_SMEMRDIRQ , &spireg->irq_cause);writel (KWSPI_IRQMASK , &spireg->irq_mask); +#ifdef CONFIG_KIRKWOOD /* program mpp registers to select SPI_CSn */ kirkwood_mpp_conf (kwspi_mpp_config[cs ?1 :0 ], cs_spi_mpp_back); +#endif
drivers/spi/kirkwood_spi.c struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, · line 74
Quoted 10 lines
drivers/spi/kirkwood_spi.c +2
-0return slave; }void spi_free_slave (struct spi_slave *slave) { +#ifdef CONFIG_KIRKWOOD kirkwood_mpp_conf (cs_spi_mpp_back,NULL ); +#endif free (slave); }
thanks!
Signature · 1 line
Jagan.
PATCH 12/25 arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
In reply to Stefan RoeseThis makes is possible to use those gpio functions from other MVEBU SoC's as well.
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 17 -------------- arch/arm/include/asm/arch-kirkwood/cpu.h | 2 +- arch/arm/include/asm/arch-kirkwood/gpio.h | 16 ++++++------- arch/arm/include/asm/arch-kirkwood/soc.h | 4 ++-- arch/arm/mvebu-common/Makefile | 1 + arch/arm/mvebu-common/gpio.c | 30 +++++++++++++++++++++++++ board/LaCie/net2big_v2/net2big_v2.c | 4 ++-- board/LaCie/netspace_v2/netspace_v2.c | 4 ++-- board/LaCie/wireless_space/wireless_space.c | 4 ++-- board/Marvell/dreamplug/dreamplug.c | 6 ++--- board/Marvell/guruplug/guruplug.c | 6 ++--- board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 6 ++--- board/Marvell/openrd/openrd.c | 6 ++--- board/Marvell/rd6281a/rd6281a.c | 6 ++--- board/Marvell/sheevaplug/sheevaplug.c | 6 ++--- board/Seagate/dockstar/dockstar.c | 8 +++---- board/Seagate/goflexhome/goflexhome.c | 8 +++---- board/buffalo/lsxl/lsxl.c | 6 ++--- board/cloudengines/pogo_e02/pogo_e02.c | 6 ++--- board/d-link/dns325/dns325.c | 4 ++-- board/iomega/iconnect/iconnect.c | 6 ++--- board/karo/tk71/tk71.c | 6 ++--- board/keymile/km_arm/km_arm.c | 4 ++-- board/raidsonic/ib62x0/ib62x0.c | 6 ++--- 24 files changed, 93 insertions(+), 79 deletions(-) create mode 100644 arch/arm/mvebu-common/gpio.c
arch/arm/cpu/arm926ejs/kirkwood/cpu.c +0 -17
@@ -139,23 +139,6 @@ int kw_config_adr_windows(void) }/* -* kw_config_gpio - GPIO configuration -*/ -void kw_config_gpio (u32 gpp0_oe_val,u32 gpp1_oe_val,u32 gpp0_oe,u32 gpp1_oe) -{ -struct kwgpio_registers *gpio0reg = - (struct kwgpio_registers *)KW_GPIO0_BASE ; -struct kwgpio_registers *gpio1reg = - (struct kwgpio_registers *)KW_GPIO1_BASE ; - -/* Init GPIOS to default values as per board requirement */ -writel (gpp0_oe_val, &gpio0reg->dout); -writel (gpp1_oe_val, &gpio1reg->dout); -writel (gpp0_oe, &gpio0reg->oe); -writel (gpp1_oe, &gpio1reg->oe); -} - -/* * kw_config_mpp - Multi-Purpose Pins Functionality configuration * * Each MPP can be configured to different functionality through
arch/arm/include/asm/arch-kirkwood/cpu.h +1 -1
@@ -144,7 +144,7 @@ unsigned int kw_sdram_bar(enum memory_bank bank);unsigned int kw_sdram_bs (enum memory_bank bank);void kw_sdram_size_adjust (enum memory_bank bank);int kw_config_adr_windows (void ); -void kw_config_gpio (unsigned int gpp0_oe_val,unsigned int gpp1_oe_val, +void mvebu_config_gpio (unsigned int gpp0_oe_val,unsigned int gpp1_oe_val,unsigned int gpp0_oe,unsigned int gpp1_oe); int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15, unsigned int mpp16_23, unsigned int mpp24_31,
arch/arm/include/asm/arch-kirkwood/gpio.h +8 -8
@@ -21,14 +21,14 @@#define GPIO_MAX 50#define GPIO_OFF (pin) (((pin) >> 5) ? 0x0040 : 0x0000) -#define GPIO_OUT (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00) -#define GPIO_IO_CONF (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04) -#define GPIO_BLINK_EN (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x08) -#define GPIO_IN_POL (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x0c) -#define GPIO_DATA_IN (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x10) -#define GPIO_EDGE_CAUSE (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x14) -#define GPIO_EDGE_MASK (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x18) -#define GPIO_LEVEL_MASK (pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x1c) +#define GPIO_OUT (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00) +#define GPIO_IO_CONF (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04) +#define GPIO_BLINK_EN (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08) +#define GPIO_IN_POL (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c) +#define GPIO_DATA_IN (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10) +#define GPIO_EDGE_CAUSE (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14) +#define GPIO_EDGE_MASK (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18) +#define GPIO_LEVEL_MASK (pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)/* * Kirkwood-specific GPIO API
arch/arm/include/asm/arch-kirkwood/soc.h +2 -2
@@ -26,8 +26,8 @@#define KW_UART0_BASE (KW_REGISTER(0x12000))#define KW_UART1_BASE (KW_REGISTER(0x12100))#define KW_MPP_BASE (KW_REGISTER(0x10000)) -#define KW_GPIO0_BASE (KW_REGISTER(0x10100)) -#define KW_GPIO1_BASE (KW_REGISTER(0x10140)) +#define MVEBU_GPIO0_BASE (KW_REGISTER(0x10100)) +#define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140))#define KW_RTC_BASE (KW_REGISTER(0x10300))#define KW_NANDF_BASE (KW_REGISTER(0x10418))#define KW_SPI_BASE (KW_REGISTER(0x10600))
arch/arm/mvebu-common/Makefile +1 -0
@@ -7,5 +7,6 @@ # obj-y = dram.o +obj-y += gpio.o obj-$(CONFIG_ARMADA_XP) += mbus.o obj-y += timer.o
arch/arm/mvebu-common/gpio.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* (C) Copyright 2009 +* Marvell Semiconductor <www.marvell.com> +* Written-by: Prafulla Wadaskar <[email protected]> +* +* SPDX-License-Identifier: GPL-2.0+ +*/ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> + +/* +* mvebu_config_gpio - GPIO configuration +*/ +void mvebu_config_gpio (u32 gpp0_oe_val,u32 gpp1_oe_val, +u32 gpp0_oe,u32 gpp1_oe) +{ +struct kwgpio_registers *gpio0reg = + (struct kwgpio_registers *)MVEBU_GPIO0_BASE ; +struct kwgpio_registers *gpio1reg = + (struct kwgpio_registers *)MVEBU_GPIO1_BASE ; + +/* Init GPIOS to default values as per board requirement */ +writel (gpp0_oe_val, &gpio0reg->dout); +writel (gpp1_oe_val, &gpio1reg->dout); +writel (gpp0_oe, &gpio0reg->oe); +writel (gpp1_oe, &gpio1reg->oe); +}
board/LaCie/net2big_v2/net2big_v2.c +2 -2
@@ -26,8 +26,8 @@ DECLARE_GLOBAL_DATA_PTR;int board_early_init_f (void ) {/* GPIO configuration */ -kw_config_gpio (NET2BIG_V2_OE_VAL_LOW ,NET2BIG_V2_OE_VAL_HIGH , -NET2BIG_V2_OE_LOW ,NET2BIG_V2_OE_HIGH ); +mvebu_config_gpio (NET2BIG_V2_OE_VAL_LOW ,NET2BIG_V2_OE_VAL_HIGH , +NET2BIG_V2_OE_LOW ,NET2BIG_V2_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/LaCie/netspace_v2/netspace_v2.c +2 -2
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;int board_early_init_f (void ) {/* Gpio configuration */ -kw_config_gpio (NETSPACE_V2_OE_VAL_LOW ,NETSPACE_V2_OE_VAL_HIGH , -NETSPACE_V2_OE_LOW ,NETSPACE_V2_OE_HIGH ); +mvebu_config_gpio (NETSPACE_V2_OE_VAL_LOW ,NETSPACE_V2_OE_VAL_HIGH , +NETSPACE_V2_OE_LOW ,NETSPACE_V2_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/LaCie/wireless_space/wireless_space.c +2 -2
@@ -97,8 +97,8 @@ struct mv88e61xx_config swcfg = {int board_early_init_f (void ) {/* Gpio configuration */ -kw_config_gpio (WIRELESS_SPACE_OE_VAL_LOW ,WIRELESS_SPACE_OE_VAL_HIGH , -WIRELESS_SPACE_OE_LOW ,WIRELESS_SPACE_OE_HIGH ); +mvebu_config_gpio (WIRELESS_SPACE_OE_VAL_LOW ,WIRELESS_SPACE_OE_VAL_HIGH , +WIRELESS_SPACE_OE_LOW ,WIRELESS_SPACE_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ kirkwood_mpp_conf (kwmpp_config,NULL );
board/Marvell/dreamplug/dreamplug.c +3 -3
@@ -25,9 +25,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (DREAMPLUG_OE_VAL_LOW , -DREAMPLUG_OE_VAL_HIGH , -DREAMPLUG_OE_LOW ,DREAMPLUG_OE_HIGH ); +mvebu_config_gpio (DREAMPLUG_OE_VAL_LOW , +DREAMPLUG_OE_VAL_HIGH , +DREAMPLUG_OE_LOW ,DREAMPLUG_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Marvell/guruplug/guruplug.c +3 -3
@@ -22,9 +22,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (GURUPLUG_OE_VAL_LOW , -GURUPLUG_OE_VAL_HIGH , -GURUPLUG_OE_LOW ,GURUPLUG_OE_HIGH ); +mvebu_config_gpio (GURUPLUG_OE_VAL_LOW , +GURUPLUG_OE_VAL_HIGH , +GURUPLUG_OE_LOW ,GURUPLUG_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +3 -3
@@ -24,9 +24,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (MV88F6281GTW_GE_OE_VAL_LOW , -MV88F6281GTW_GE_OE_VAL_HIGH , -MV88F6281GTW_GE_OE_LOW ,MV88F6281GTW_GE_OE_HIGH ); +mvebu_config_gpio (MV88F6281GTW_GE_OE_VAL_LOW , +MV88F6281GTW_GE_OE_VAL_HIGH , +MV88F6281GTW_GE_OE_LOW ,MV88F6281GTW_GE_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Marvell/openrd/openrd.c +3 -3
@@ -27,9 +27,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (OPENRD_OE_VAL_LOW , -OPENRD_OE_VAL_HIGH , -OPENRD_OE_LOW ,OPENRD_OE_HIGH ); +mvebu_config_gpio (OPENRD_OE_VAL_LOW , +OPENRD_OE_VAL_HIGH , +OPENRD_OE_LOW ,OPENRD_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Marvell/rd6281a/rd6281a.c +3 -3
@@ -23,9 +23,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (RD6281A_OE_VAL_LOW , -RD6281A_OE_VAL_HIGH , -RD6281A_OE_LOW ,RD6281A_OE_HIGH ); +mvebu_config_gpio (RD6281A_OE_VAL_LOW , +RD6281A_OE_VAL_HIGH , +RD6281A_OE_LOW ,RD6281A_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Marvell/sheevaplug/sheevaplug.c +3 -3
@@ -22,9 +22,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (SHEEVAPLUG_OE_VAL_LOW , -SHEEVAPLUG_OE_VAL_HIGH , -SHEEVAPLUG_OE_LOW ,SHEEVAPLUG_OE_HIGH ); +mvebu_config_gpio (SHEEVAPLUG_OE_VAL_LOW , +SHEEVAPLUG_OE_VAL_HIGH , +SHEEVAPLUG_OE_LOW ,SHEEVAPLUG_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/Seagate/dockstar/dockstar.c +4 -4
@@ -26,9 +26,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (DOCKSTAR_OE_VAL_LOW , -DOCKSTAR_OE_VAL_HIGH , -DOCKSTAR_OE_LOW ,DOCKSTAR_OE_HIGH ); +mvebu_config_gpio (DOCKSTAR_OE_VAL_LOW , +DOCKSTAR_OE_VAL_HIGH , +DOCKSTAR_OE_LOW ,DOCKSTAR_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
@@ -143,7 +143,7 @@ void reset_phy(void)static void set_leds (u32 leds,u32 blinking) { -struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE ; +struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE ;u32 oe =readl (&r->oe) |BOTH_LEDS ;writel (oe & ~leds, &r->oe);/* active low */ u32 bl =readl (&r->blink_en) & ~BOTH_LEDS ;
board/Seagate/goflexhome/goflexhome.c +4 -4
@@ -83,9 +83,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (GOFLEXHOME_OE_VAL_LOW , -GOFLEXHOME_OE_VAL_HIGH , -GOFLEXHOME_OE_LOW ,GOFLEXHOME_OE_HIGH ); +mvebu_config_gpio (GOFLEXHOME_OE_VAL_LOW , +GOFLEXHOME_OE_VAL_HIGH , +GOFLEXHOME_OE_LOW ,GOFLEXHOME_OE_HIGH );kirkwood_mpp_conf (kwmpp_config,NULL );return 0 ; }
@@ -149,7 +149,7 @@ static void set_leds(u32 leds, u32 blinking)u32 oe;u32 bl; - r = (struct kwgpio_registers *)KW_GPIO1_BASE ; + r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE ; oe =readl (&r->oe) |BOTH_LEDS ;writel (oe & ~leds, &r->oe);/* active low */ bl =readl (&r->blink_en) & ~BOTH_LEDS ;
board/buffalo/lsxl/lsxl.c +3 -3
@@ -51,9 +51,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (LSXL_OE_VAL_LOW , -LSXL_OE_VAL_HIGH , -LSXL_OE_LOW ,LSXL_OE_HIGH ); +mvebu_config_gpio (LSXL_OE_VAL_LOW , +LSXL_OE_VAL_HIGH , +LSXL_OE_LOW ,LSXL_OE_HIGH );/* * Multi-Purpose Pins Functionality configuration
board/cloudengines/pogo_e02/pogo_e02.c +3 -3
@@ -26,9 +26,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (POGO_E02_OE_VAL_LOW , -POGO_E02_OE_VAL_HIGH , -POGO_E02_OE_LOW ,POGO_E02_OE_HIGH ); +mvebu_config_gpio (POGO_E02_OE_VAL_LOW , +POGO_E02_OE_VAL_HIGH , +POGO_E02_OE_LOW ,POGO_E02_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/d-link/dns325/dns325.c +2 -2
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;int board_early_init_f (void ) {/* Gpio configuration */ -kw_config_gpio (DNS325_OE_VAL_LOW ,DNS325_OE_VAL_HIGH , -DNS325_OE_LOW ,DNS325_OE_HIGH ); +mvebu_config_gpio (DNS325_OE_VAL_LOW ,DNS325_OE_VAL_HIGH , +DNS325_OE_LOW ,DNS325_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/iomega/iconnect/iconnect.c +3 -3
@@ -22,9 +22,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (ICONNECT_OE_VAL_LOW , -ICONNECT_OE_VAL_HIGH , -ICONNECT_OE_LOW ,ICONNECT_OE_HIGH ); +mvebu_config_gpio (ICONNECT_OE_VAL_LOW , +ICONNECT_OE_VAL_HIGH , +ICONNECT_OE_LOW ,ICONNECT_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/karo/tk71/tk71.c +3 -3
@@ -26,9 +26,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (TK71_OE_VAL_LOW , -TK71_OE_VAL_HIGH , -TK71_OE_LOW ,TK71_OE_HIGH ); +mvebu_config_gpio (TK71_OE_VAL_LOW , +TK71_OE_VAL_HIGH , +TK71_OE_LOW ,TK71_OE_HIGH );/* Multi-Purpose Pins Functionality configuration */ static const u32 kwmpp_config[] = {
board/keymile/km_arm/km_arm.c +2 -2
@@ -222,8 +222,8 @@ int board_early_init_f(void)u32 tmp;/* set the 2 bitbang i2c pins as output gpios */ - tmp =readl (KW_GPIO0_BASE +4 ); -writel (tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS ) ,KW_GPIO0_BASE +4 ); + tmp =readl (MVEBU_GPIO0_BASE +4 ); +writel (tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS ) ,MVEBU_GPIO0_BASE +4 );#endif /* adjust SDRAM size for bank 0 */ kw_sdram_size_adjust (0 );
board/raidsonic/ib62x0/ib62x0.c +3 -3
@@ -24,9 +24,9 @@ int board_early_init_f(void)* There are maximum 64 gpios controlled through 2 sets of registers * the below configuration configures mainly initial LED status */ -kw_config_gpio (IB62x0_OE_VAL_LOW, - IB62x0_OE_VAL_HIGH, - IB62x0_OE_LOW, IB62x0_OE_HIGH); +mvebu_config_gpio (IB62x0_OE_VAL_LOW, + IB62x0_OE_VAL_HIGH, + IB62x0_OE_LOW, IB62x0_OE_HIGH);/* Set SATA activity LEDs to default off */ writel (MVSATAHC_LED_POLARITY_CTRL ,MVSATAHC_LED_CONF_REG );
Signature · 1 line
2.0.1
PATCH 13/25 spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
In reply to Stefan RoeseThis makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do.
---
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +- drivers/spi/kirkwood_spi.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-kirkwood/soc.h +1 -1
@@ -30,7 +30,7 @@#define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140))#define KW_RTC_BASE (KW_REGISTER(0x10300))#define KW_NANDF_BASE (KW_REGISTER(0x10418)) -#define KW_SPI_BASE (KW_REGISTER(0x10600)) +#define MVEBU_SPI_BASE (KW_REGISTER(0x10600))#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))
drivers/spi/kirkwood_spi.c +2 -1
@@ -18,7 +18,8 @@#endif #include <asm/arch-mvebu/spi.h> -static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; +static struct kwspi_registers *spireg = + (struct kwspi_registers *)MVEBU_SPI_BASE ;#ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2 ];
Signature · 1 line
2.0.1
PATCH 13/25 spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
Quoted 29 lines · Stefan Roese
This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do.
Signed-off-by Stefan Roese <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>---
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +- drivers/spi/kirkwood_spi.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-)arch/arm/include/asm/arch-kirkwood/soc.h +1
-1@@ -30,7 +30,7 @@#define MVEBU_GPIO1_BASE (KW_REGISTER(0x10140))#define KW_RTC_BASE (KW_REGISTER(0x10300))#define KW_NANDF_BASE (KW_REGISTER(0x10418)) -#define KW_SPI_BASE (KW_REGISTER(0x10600)) +#define MVEBU_SPI_BASE (KW_REGISTER(0x10600))#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))drivers/spi/kirkwood_spi.c +0
-0
drivers/spi/kirkwood_spi.c
Quoted 10 lines
drivers/spi/kirkwood_spi.c +2
-2@@ -18,7 +18,8 @@#endif #include <asm/arch-mvebu/spi.h> -static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE ; +static struct kwspi_registers *spireg = + (struct kwspi_registers *)MVEBU_SPI_BASE ;#ifdef CONFIG_KIRKWOOD static u32 cs_spi_mpp_back[2 ]; --
thanks!
Signature · 1 line
Jagan.
PATCH 14/25 arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()
In reply to Stefan RoeseAdditionally the SDRAM address decoding register address is not hard coded in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
---
arch/arm/include/asm/arch-kirkwood/cpu.h | 6 +-- arch/arm/include/asm/arch-kirkwood/soc.h | 1 + arch/arm/mvebu-common/dram.c | 53 +++++++++++++------------ board/LaCie/net2big_v2/net2big_v2.c | 2 +- board/LaCie/netspace_v2/netspace_v2.c | 2 +- board/LaCie/wireless_space/wireless_space.c | 2 +- board/Marvell/dreamplug/dreamplug.c | 2 +- board/Marvell/guruplug/guruplug.c | 2 +- board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 2 +- board/Marvell/openrd/openrd.c | 2 +- board/Marvell/rd6281a/rd6281a.c | 2 +- board/Marvell/sheevaplug/sheevaplug.c | 2 +- board/Seagate/dockstar/dockstar.c | 2 +- board/Seagate/goflexhome/goflexhome.c | 2 +- board/buffalo/lsxl/lsxl.c | 2 +- board/cloudengines/pogo_e02/pogo_e02.c | 2 +- board/d-link/dns325/dns325.c | 2 +- board/iomega/iconnect/iconnect.c | 2 +- board/karo/tk71/tk71.c | 2 +- board/keymile/km_arm/km_arm.c | 4 +- board/raidsonic/ib62x0/ib62x0.c | 2 +- 21 files changed, 50 insertions(+), 48 deletions(-)
arch/arm/include/asm/arch-kirkwood/cpu.h +3 -3
@@ -140,9 +140,9 @@ struct kwgpio_registers {* functions */ unsigned char get_random_hex (void ); -unsigned int kw_sdram_bar (enum memory_bank bank); -unsigned int kw_sdram_bs (enum memory_bank bank); -void kw_sdram_size_adjust (enum memory_bank bank); +unsigned int mvebu_sdram_bar (enum memory_bank bank); +unsigned int mvebu_sdram_bs (enum memory_bank bank); +void mvebu_sdram_size_adjust (enum memory_bank bank);int kw_config_adr_windows (void );void mvebu_config_gpio (unsigned int gpp0_oe_val,unsigned int gpp1_oe_val,unsigned int gpp0_oe,unsigned int gpp1_oe);
arch/arm/include/asm/arch-kirkwood/soc.h +1 -0
@@ -22,6 +22,7 @@#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478)) +#define MVEBU_SDRAM_BASE (KW_REGISTER(0x1500))#define KW_TWSI_BASE (KW_REGISTER(0x11000))#define KW_UART0_BASE (KW_REGISTER(0x12000))#define KW_UART1_BASE (KW_REGISTER(0x12100))
arch/arm/mvebu-common/dram.c +27 -26
108 lines not on this page · raw message
board/LaCie/net2big_v2/net2big_v2.c +1 -1
@@ -77,7 +77,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_NET2BIG_V2 ;/* Boot parameters address */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/LaCie/netspace_v2/netspace_v2.c +1 -1
@@ -73,7 +73,7 @@ int board_init(void) gd->bd->bi_arch_number =CONFIG_MACH_TYPE ;/* Boot parameters address */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/LaCie/wireless_space/wireless_space.c +1 -1
@@ -112,7 +112,7 @@ int board_init(void) gd->bd->bi_arch_number =CONFIG_MACH_TYPE ;/* Boot parameters address */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/dreamplug/dreamplug.c +1 -1
@@ -90,7 +90,7 @@ int board_early_init_f(void)int board_init (void ) {/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/guruplug/guruplug.c +1 -1
@@ -92,7 +92,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_GURUPLUG ;/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c +1 -1
@@ -94,7 +94,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_MV88F6281GTW_GE ;/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/openrd/openrd.c +1 -1
@@ -104,7 +104,7 @@ int board_init(void)#endif /* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/rd6281a/rd6281a.c +1 -1
@@ -93,7 +93,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_RD88F6281 ;/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Marvell/sheevaplug/sheevaplug.c +1 -1
@@ -92,7 +92,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_SHEEVAPLUG ;/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Seagate/dockstar/dockstar.c +1 -1
@@ -96,7 +96,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_DOCKSTAR ;/* address of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/Seagate/goflexhome/goflexhome.c +1 -1
@@ -98,7 +98,7 @@ int board_init(void) gd->bd->bi_arch_number =MACH_TYPE_GOFLEXHOME ;/* address of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/buffalo/lsxl/lsxl.c +1 -1
@@ -167,7 +167,7 @@ static void set_led(int state)int board_init (void ) {/* address of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;set_led (LED_POWER_BLINKING );
board/cloudengines/pogo_e02/pogo_e02.c +1 -1
@@ -64,7 +64,7 @@ int board_early_init_f(void)int board_init (void ) {/* Boot parameters address */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/d-link/dns325/dns325.c +1 -1
@@ -92,7 +92,7 @@ int board_early_init_f(void)int board_init (void ) {/* Boot parameters address */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/iomega/iconnect/iconnect.c +1 -1
@@ -87,7 +87,7 @@ int board_early_init_f(void)int board_init (void ) {/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/karo/tk71/tk71.c +1 -1
@@ -97,7 +97,7 @@ int board_init(void) gd->bd->bi_arch_number =CONFIG_MACH_TYPE ;/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
board/keymile/km_arm/km_arm.c +2 -2
@@ -226,7 +226,7 @@ int board_early_init_f(void)writel (tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS ) ,MVEBU_GPIO0_BASE +4 );#endif /* adjust SDRAM size for bank 0 */ -kw_sdram_size_adjust (0 ); +mvebu_sdram_size_adjust (0 );kirkwood_mpp_conf (kwmpp_config,NULL );return 0 ; }
@@ -234,7 +234,7 @@ int board_early_init_f(void)int board_init (void ) {/* address of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;/* * The KM_FLASH_GPIO_PIN switches between using a
board/raidsonic/ib62x0/ib62x0.c +1 -1
@@ -62,7 +62,7 @@ int board_early_init_f(void)int board_init (void ) {/* adress of boot parameters */ - gd->bd->bi_boot_params =kw_sdram_bar (0 ) +0x100 ; + gd->bd->bi_boot_params =mvebu_sdram_bar (0 ) +0x100 ;return 0 ; }
Signature · 1 line
2.0.1
PATCH 15/25 net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC
In reply to Stefan RoeseThis patch adds support for the NETA ethernet controller which is integrated in the Marvell Armada XP SoC's. This port is based on the Linux driver which has been stripped of the in U-Boot unused portions.
Tested on the Marvell MV78460 eval board db-78460-bp.
---
drivers/net/Makefile | 1 + drivers/net/mvneta.c | 1653 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/netdev.h | 1 + 3 files changed, 1655 insertions(+) create mode 100644 drivers/net/mvneta.c
drivers/net/Makefile +1 -0
@@ -39,6 +39,7 @@ obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o obj-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o obj-$(CONFIG_MVGBE) += mvgbe.o +obj-$(CONFIG_MVNETA) += mvneta.o obj-$(CONFIG_NATSEMI) += natsemi.o obj-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
drivers/net/mvneta.c new file +1653 -0
1,653 lines not on this page · raw message
include/netdev.h +1 -0
@@ -64,6 +64,7 @@ int mpc512x_fec_initialize(bd_t *bis);int mpc5xxx_fec_initialize (bd_t *bis);int mpc82xx_scc_enet_initialize (bd_t *bis);int mvgbe_initialize (bd_t *bis); +int mvneta_initialize (bd_t *bis,int base_addr,int devnum,int phy_addr);int natsemi_initialize (bd_t *bis);int ne2k_register (void );int npe_initialize (bd_t *bis);
Signature · 1 line
2.0.1
PATCH 16/25 net: phy.h: Make PHY autonegotiation timeout configurable
In reply to Stefan RoeseThe Marvell MV78460 eval board DB-78460-BP seems to need a longer PHY autonegotiation timeout than the "standard" 4 seconds. So lets make this timeout configurable. If not defined in the board config header the original 4000ms is used.
---
include/phy.h | 2 ++ 1 file changed, 2 insertions(+)
include/phy.h +2 -0
@@ -32,7 +32,9 @@#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \ SUPPORTED_10000baseT_Full) +#ifndef PHY_ANEG_TIMEOUT #define PHY_ANEG_TIMEOUT 4000 +#endif typedef enum {
Signature · 1 line
2.0.1
PATCH 17/25 i2c: mvtwsi: Add support for Marvell Armada XP
In reply to Stefan RoeseTo support the Armada XP SoC, we just need to include the correct header.
---
drivers/i2c/mvtwsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/i2c/mvtwsi.c +1 -1
@@ -20,7 +20,7 @@#if defined(CONFIG_ORION5X )#include <asm/arch/orion5x.h> -#elif defined(CONFIG_KIRKWOOD ) +#elif (defined(CONFIG_KIRKWOOD ) || defined(CONFIG_ARMADA_XP ))#include <asm/arch/soc.h> #else #error Driver mvtwsi not supported by SoC or board
Signature · 1 line
2.0.1
PATCH 17/25 i2c: mvtwsi: Add support for Marvell Armada XP
Hello Stefan,
Am 27.06.2014 11:55, schrieb Stefan Roese:
Quoted 8 lines
To support the Armada XP SoC, we just need to include the correct header.
Signed-off-by Stefan Roese<[email protected]>Cc Heiko Schocher<[email protected]>---
drivers/i2c/mvtwsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
bye,
Heiko
Signature · 2 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
PATCH 18/25 arm: armada-xp: Add basic support for Marvell Armada XP SoC
In reply to Stefan RoeseThis basic support for the Marvell Armada XP is base on the existing kirkwood support. Which has been generatized by moving some common files into common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
---
Makefile | 2 +- arch/arm/cpu/armv7/armada-xp/Makefile | 7 + arch/arm/cpu/armv7/armada-xp/cpu.c | 186 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-armada-xp/config.h | 80 ++++++++++++ arch/arm/include/asm/arch-armada-xp/cpu.h | 103 +++++++++++++++ arch/arm/include/asm/arch-armada-xp/soc.h | 57 ++++++++ 6 files changed, 434 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/armada-xp/Makefile create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c create mode 100644 arch/arm/include/asm/arch-armada-xp/config.h create mode 100644 arch/arm/include/asm/arch-armada-xp/cpu.h create mode 100644 arch/arm/include/asm/arch-armada-xp/soc.h
Makefile +1 -1
@@ -636,7 +636,7 @@ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610)) libs-y += arch/$(ARCH)/imx-common/ endif -ifneq (,$(filter $(SOC), kirkwood)) +ifneq (,$(filter $(SOC), armada-xp kirkwood)) libs-y += arch/$(ARCH)/mvebu-common/ endif
arch/arm/cpu/armv7/armada-xp/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = cpu.o
arch/arm/cpu/armv7/armada-xp/cpu.c new file +186 -0
186 lines not on this page · raw message
arch/arm/include/asm/arch-armada-xp/config.h new file +80 -0
80 lines not on this page · raw message
arch/arm/include/asm/arch-armada-xp/cpu.h new file +103 -0
103 lines not on this page · raw message
arch/arm/include/asm/arch-armada-xp/soc.h new file +57 -0
57 lines not on this page · raw message
Signature · 1 line
2.0.1
PATCH 19/25 arm: armada-xp: Add basic support for the Marvell DB-78460-BP board
In reply to Stefan RoeseThis patch adds basic support for the Marvell DB-78460-BP evaulation board. This is the first board that uses the recently created Armada XP 78460 SoC support.
---
board/Marvell/db-78460-bp/Makefile | 7 ++ board/Marvell/db-78460-bp/db-78460-bp.c | 120 ++++++++++++++++++++++++++++++++ board/Marvell/db-78460-bp/kwbimage.cfg | 12 ++++ boards.cfg | 1 + include/configs/db-78460-bp.h | 67 ++++++++++++++++++ 5 files changed, 207 insertions(+) create mode 100644 board/Marvell/db-78460-bp/Makefile create mode 100644 board/Marvell/db-78460-bp/db-78460-bp.c create mode 100644 board/Marvell/db-78460-bp/kwbimage.cfg create mode 100644 include/configs/db-78460-bp.h
board/Marvell/db-78460-bp/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# Copyright (C) 2014 Stefan Roese <[email protected]> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := db-78460-bp.o
board/Marvell/db-78460-bp/db-78460-bp.c new file +120 -0
120 lines not on this page · raw message
board/Marvell/db-78460-bp/kwbimage.cfg new file +12 -0
@@ -0,0 +1,12 @@ +# +# Copyright (C) 2014 Stefan Roese <[email protected]> +# + +# Armada XP uses version 1 image format +VERSION 1 + +# Boot Media configurations +BOOT_FROM spi + +# Binary Header (bin_hdr) with DDR3 training code +BINARY board/Marvell/db-78460-bp/binary.0 0000005b 00000068
boards.cfg +1 -0
@@ -247,6 +247,7 @@ Active arm arm946es - armltd integrator Active arm armv7 - armltd vexpress vexpress_ca15_tc2 - - Active arm armv7 - armltd vexpress vexpress_ca5x2 - Matt Waddel <[email protected]> Active arm armv7 - armltd vexpress vexpress_ca9x4 - Matt Waddel <[email protected]> +Active arm armv7 armada-xp Marvell - db-78460-bp - Stefan Roese <[email protected]> Active arm armv7 am33xx BuR kwb kwb kwb:SERIAL1,CONS_INDEX=1 Hannes Petermaier <[email protected]> Active arm armv7 am33xx BuR tseries tseries_mmc tseries:SERIAL1,CONS_INDEX=1,EMMC_BOOT Hannes Petermaier <[email protected]> Active arm armv7 am33xx BuR tseries tseries_nand tseries:SERIAL1,CONS_INDEX=1,NAND Hannes Petermaier <[email protected]>
include/configs/db-78460-bp.h new file +67 -0
67 lines not on this page · raw message
Signature · 1 line
2.0.1
PATCH 20/25 arm: kirkwood: Remove some dead code from cpu.c
In reply to Stefan RoeseAll those functions removed with this patch are not accessed at all. So lets remove them.
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ----------------------------------- 1 file changed, 55 deletions(-)
arch/arm/cpu/arm926ejs/kirkwood/cpu.c +0 -55
@@ -9,13 +9,10 @@#include <common.h> #include <netdev.h> #include <asm/cache.h> -#include <u-boot/md5.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> -#define BUFLEN 16 -void reset_cpu (unsigned long ignored) { struct kwcpu_registers *cpureg =
@@ -29,31 +26,6 @@ void reset_cpu(unsigned long ignored) }/* -* Generates Ramdom hex number reading some time varient system registers -* and using md5 algorithm -*/ -unsigned char get_random_hex (void ) -{ -int i; -u32 inbuf[BUFLEN ]; -u8 outbuf[BUFLEN ]; - -/* -* in case of 88F6281/88F6282/88F6192 A0, -* Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470 -* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are -* reserved regs and does not have names at this moment -* (no errata available) -*/ -writel (readl (KW_REG_UNDOC_0x1478) & ~(1 <<7 ), KW_REG_UNDOC_0x1478); -for (i =0 ; i <BUFLEN ; i++) { - inbuf[i] =readl (KW_REG_UNDOC_0x1470); - } -md5 ((u8 *) inbuf, (BUFLEN *sizeof (u32)), outbuf); -return outbuf[outbuf[7 ] %0x0f ]; -} - -/* * Window Size * Used with the Base register to set the address window size and location. * Must be programmed from LSB to MSB as sequence of ones followed by
@@ -139,33 +111,6 @@ int kw_config_adr_windows(void) }/* -* kw_config_mpp - Multi-Purpose Pins Functionality configuration -* -* Each MPP can be configured to different functionality through -* MPP control register, ref (sec 6.1 of kirkwood h/w specification) -* -* There are maximum 64 Multi-Pourpose Pins on Kirkwood -* Each MPP functionality can be configuration by a 4bit value -* of MPP control reg, the value and associated functionality depends -* upon used SoC varient -*/ -int kw_config_mpp (u32 mpp0_7,u32 mpp8_15,u32 mpp16_23,u32 mpp24_31, -u32 mpp32_39,u32 mpp40_47,u32 mpp48_55) -{ -u32 *mppreg = (u32 *)KW_MPP_BASE ; - -/* program mpp registers */ -writel (mpp0_7, &mppreg[0 ]); -writel (mpp8_15, &mppreg[1 ]); -writel (mpp16_23, &mppreg[2 ]); -writel (mpp24_31, &mppreg[3 ]); -writel (mpp32_39, &mppreg[4 ]); -writel (mpp40_47, &mppreg[5 ]); -writel (mpp48_55, &mppreg[6 ]); -return 0 ; -} - -/* * SYSRSTn Duration Counter Support * * Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
Signature · 1 line
2.0.1
PATCH 20/25 arm: kirkwood: Remove some dead code from cpu.c
Quoted 8 lines · Stefan Roese
All those functions removed with this patch are not accessed at all. So lets remove them.
Signed-off-by Stefan Roese <[email protected]>---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ----------------------------------- 1 file changed, 55 deletions(-)
Up until this patch I have tested the series without problems on ib62x0. This is the last patch that I can apply and still boot the board. That said, for this patch and those before it:
After the next patch in series is applied uboot does not come up - there is no output on the console. I've used kwboot in testing:
$ sudo ./tools/kwboot -t -p -B 115200 -b u-boot.kwb /dev/ttyUSB0
Unrelated to this series I am going to mail a couple of kirkwood patches. Those can be applied without conflicts before or after this series.
Luka
PATCH 21/25 arm: kirkwood: Use mvebu new common mbus API
In reply to Stefan RoeseNow that the new common mvebu mbus API is available, lets use it on kirkwood as well. This includes a small change in the kirkwood EHCI driver. Making it more similar to the Linux driver from which it is ported.
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 102 ++++++------------------------- arch/arm/include/asm/arch-kirkwood/cpu.h | 63 ++++++++++--------- arch/arm/include/asm/arch-kirkwood/soc.h | 16 ++--- arch/arm/mvebu-common/Makefile | 2 +- drivers/usb/host/ehci-marvell.c | 43 ++++--------- 5 files changed, 74 insertions(+), 152 deletions(-)
arch/arm/cpu/arm926ejs/kirkwood/cpu.c +19 -83
@@ -13,101 +13,37 @@#include <asm/arch/cpu.h> #include <asm/arch/soc.h> -void reset_cpu (unsigned long ignored) -{ -struct kwcpu_registers *cpureg = - (struct kwcpu_registers *)KW_CPU_REG_BASE ; - -writel (readl (&cpureg->rstoutn_mask) | (1 <<2 ), - &cpureg->rstoutn_mask); -writel (readl (&cpureg->sys_soft_rst) |1 , - &cpureg->sys_soft_rst); -while (1 ) ; -} - -/* -* Window Size -* Used with the Base register to set the address window size and location. -* Must be programmed from LSB to MSB as sequence of ones followed by -* sequence of zeros. The number of ones specifies the size of the window in -* 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte). -* NOTE: A value of 0x0 specifies 64-KByte size. -*/ -unsigned int kw_winctrl_calcsize (unsigned int sizeval) -{ -int i; -unsigned int j =0 ; -u32 val = sizeval >>1 ; - -for (i =0 ; val >=0x10000 ; i++) { - j |= (1 << i); - val = val >>1 ; - } -return (0x0000ffff & j); -} - -/* -* kw_config_adr_windows - Configure address Windows -* -* There are 8 address windows supported by Kirkwood Soc to addess different -* devices. Each window can be configured for size, BAR and remap addr -* Below configuration is standard for most of the cases -* -* If remap function not used, remap_lo must be set as base -* -* Reference Documentation: -* Mbus-L to Mbus Bridge Registers Configuration. -* (Sec 25.1 and 25.3 of Datasheet) -*/ -int kw_config_adr_windows (void ) -{ -struct kwwin_registers *winregs = - (struct kwwin_registers *)KW_CPU_WIN_BASE ; - +static struct mbus_win windows[] = {/* Window 0: PCIE MEM address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *1024 *256 ,KWCPU_TARGET_PCIE , -KWCPU_ATTR_PCIE_MEM ,KWCPU_WIN_ENABLE ), &winregs[0 ].ctrl); - -writel (KW_DEFADR_PCI_MEM , &winregs[0 ].base); -writel (KW_DEFADR_PCI_MEM , &winregs[0 ].remap_lo); -writel (0x0 , &winregs[0 ].remap_hi); + {DEFADR_PCI_MEM ,256 <<20 ,CPU_TARGET_PCIE ,CPU_ATTR_PCIE_MEM },/* Window 1: PCIE IO address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *64 ,KWCPU_TARGET_PCIE , -KWCPU_ATTR_PCIE_IO ,KWCPU_WIN_ENABLE ), &winregs[1 ].ctrl); -writel (KW_DEFADR_PCI_IO , &winregs[1 ].base); -writel (KW_DEFADR_PCI_IO_REMAP , &winregs[1 ].remap_lo); -writel (0x0 , &winregs[1 ].remap_hi); + {DEFADR_PCI_IO ,64 <<10 ,CPU_TARGET_PCIE ,CPU_ATTR_PCIE_IO },/* Window 2: NAND Flash address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *1024 *128 ,KWCPU_TARGET_MEMORY , -KWCPU_ATTR_NANDFLASH ,KWCPU_WIN_ENABLE ), &winregs[2 ].ctrl); -writel (KW_DEFADR_NANDF , &winregs[2 ].base); -writel (KW_DEFADR_NANDF , &winregs[2 ].remap_lo); -writel (0x0 , &winregs[2 ].remap_hi); + {DEFADR_NANDF ,128 <<20 ,CPU_TARGET_MEMORY ,CPU_ATTR_NANDFLASH },/* Window 3: SPI Flash address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *1024 *128 ,KWCPU_TARGET_MEMORY , -KWCPU_ATTR_SPIFLASH ,KWCPU_WIN_ENABLE ), &winregs[3 ].ctrl); -writel (KW_DEFADR_SPIF , &winregs[3 ].base); -writel (KW_DEFADR_SPIF , &winregs[3 ].remap_lo); -writel (0x0 , &winregs[3 ].remap_hi); + {DEFADR_SPIF ,128 <<20 ,CPU_TARGET_MEMORY ,CPU_ATTR_SPIFLASH },/* Window 4: BOOT Memory address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *1024 *128 ,KWCPU_TARGET_MEMORY , -KWCPU_ATTR_BOOTROM ,KWCPU_WIN_ENABLE ), &winregs[4 ].ctrl); -writel (KW_DEFADR_BOOTROM , &winregs[4 ].base); + {DEFADR_BOOTROM ,128 <<20 ,CPU_TARGET_MEMORY ,CPU_ATTR_BOOTROM },/* Window 5: Security SRAM address space */ -writel (KWCPU_WIN_CTRL_DATA (1024 *64 ,KWCPU_TARGET_SASRAM , -KWCPU_ATTR_SASRAM ,KWCPU_WIN_ENABLE ), &winregs[5 ].ctrl); -writel (KW_DEFADR_SASRAM , &winregs[5 ].base); + {DEFADR_SASRAM ,64 <<10 ,CPU_TARGET_SASRAM ,CPU_ATTR_SASRAM }, +}; -/* Window 6-7: Disabled */ -writel (KWCPU_WIN_DISABLE , &winregs[6 ].ctrl); -writel (KWCPU_WIN_DISABLE , &winregs[7 ].ctrl); +void reset_cpu (unsigned long ignored) +{ +struct kwcpu_registers *cpureg = + (struct kwcpu_registers *)KW_CPU_REG_BASE ; -return 0 ; +writel (readl (&cpureg->rstoutn_mask) | (1 <<2 ), + &cpureg->rstoutn_mask); +writel (readl (&cpureg->sys_soft_rst) |1 , + &cpureg->sys_soft_rst); +while (1 ) + ; }/*
@@ -223,7 +159,7 @@ int arch_cpu_init(void)writel (readl (&cpureg->l2_cfg) |0x18 , &cpureg->l2_cfg);invalidate_l2_cache (); -kw_config_adr_windows (); +mvebu_mbus_probe (windows,ARRAY_SIZE (windows));#ifdef CONFIG_KIRKWOOD_RGMII_PAD_1V8 /*
arch/arm/include/asm/arch-kirkwood/cpu.h +33 -30
103 lines not on this page · raw message
arch/arm/include/asm/arch-kirkwood/soc.h +8 -8
@@ -32,7 +32,7 @@#define KW_RTC_BASE (KW_REGISTER(0x10300))#define KW_NANDF_BASE (KW_REGISTER(0x10418))#define MVEBU_SPI_BASE (KW_REGISTER(0x10600)) -#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000)) +#define MVEBU_CPU_WIN_BASE (KW_REGISTER(0x20000))#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))#define MVEBU_TIMER_BASE (KW_REGISTER(0x20300))#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
@@ -52,15 +52,15 @@/* Kirkwood USB Host controller */ #define MVUSB0_BASE KW_USB20_BASE -#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0 -#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1 -#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2 -#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3 +#define MVUSB0_CPU_ATTR_DRAM_CS0 CPU_ATTR_DRAM_CS0 +#define MVUSB0_CPU_ATTR_DRAM_CS1 CPU_ATTR_DRAM_CS1 +#define MVUSB0_CPU_ATTR_DRAM_CS2 CPU_ATTR_DRAM_CS2 +#define MVUSB0_CPU_ATTR_DRAM_CS3 CPU_ATTR_DRAM_CS3/* Kirkwood CPU memory windows */ -#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA -#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE -#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE +#define MVCPU_WIN_CTRL_DATA CPU_WIN_CTRL_DATA +#define MVCPU_WIN_ENABLE CPU_WIN_ENABLE +#define MVCPU_WIN_DISABLE CPU_WIN_DISABLE#if defined (CONFIG_KW88F6281 )#include <asm/arch/kw88f6281.h>
arch/arm/mvebu-common/Makefile +1 -1
@@ -8,5 +8,5 @@ obj-y = dram.o obj-y += gpio.o -obj-$(CONFIG_ARMADA_XP) += mbus.o +obj-y += mbus.o obj-y += timer.o
drivers/usb/host/ehci-marvell.c +13 -30
60 lines not on this page · raw message
Signature · 1 line
2.0.1
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
In reply to Stefan RoeseThe barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)
tools/kwboot.c +83 -14
@@ -1,5 +1,6 @@/* -* Boot a Marvell Kirkwood SoC, with Xmodem over UART0. +* Boot a Marvell SoC, with Xmodem over UART0. +* supports Kirkwood, Dove, Armada 370, Armada XP * * (c) 2012 Daniel Stodden <[email protected]> *
@@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = { 0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 10/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ +static unsigned char kwboot_msg_debug[] = { +0xDD ,0x11 ,0x22 ,0x33 ,0x44 ,0x55 ,0x66 ,0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ /* * Xmodem Transfers
@@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)int rc;ssize_t n; +if (!buf) +return 0 ; + rc =-1 ; do {
@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)int rc;char c; -kwboot_printv ("Sending boot message. Please reboot the target..." ); +if (msg ==NULL ) +kwboot_printv ("Please reboot the target into UART boot mode..." ); +else +kwboot_printv ("Sending boot message. Please reboot the target..." ); do { rc = tcflush(tty, TCIOFLUSH);
@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg) }static int +kwboot_debugmsg (int tty,void *msg) +{ +int rc; + +kwboot_printv ("Sending debug message. Please reboot the target..." ); + +do { +char buf[16 ]; + + rc =tcflush (tty,TCIOFLUSH ); +if (rc) +break ; + + rc =kwboot_tty_send (tty, msg,8 ); +if (rc) { +usleep (KWBOOT_MSG_REQ_DELAY *1000 ); +continue ; + } + + rc =kwboot_tty_recv (tty, buf,16 ,KWBOOT_MSG_RSP_TIMEO ); + +kwboot_spinner (); + + }while (rc); + +kwboot_printv ("\n" ); + +return rc; +} + +static int kwboot_xm_makeblock (struct kwboot_block *block,const void *data,size_t size,int pnum) {
@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void *data,size_t n;int i; + block->soh =SOH ; block->pnum = pnum; block->_pnum = ~block->pnum;
@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)if (rc)break ; - rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); -if (rc) -break ; +do { + rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); +if (rc) +break ; + +if (c !=ACK && c !=NAK && c !=CAN ) +printf ("%c" , c); + + }while (c !=ACK && c !=NAK && c !=CAN );if (c !=ACK )kwboot_progress (-1 ,'+' );
@@ -511,7 +560,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)void *img; rc =-1 ; - fd =-1 ; img =NULL ; fd =open (path,O_RDONLY );
@@ -601,11 +649,15 @@ static void kwboot_usage(FILE *stream, char *progname) {fprintf (stream, -"Usage: %s -b <image> [ -p ] [ -t ] " -"[-B <baud> ] <TTY>\n" , progname); +"Usage: %s [-d | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n" , + progname);fprintf (stream,"\n" ); -fprintf (stream," -b <image>: boot <image>\n" ); +fprintf (stream, +" -b <image>: boot <image> with preamble (Kirkwood, Armada 370/XP)\n" );fprintf (stream," -p: patch <image> to type 0x69 (uart boot)\n" ); +fprintf (stream, +" -D <image>: boot <image> without preamble (Dove)\n" ); +fprintf (stream," -d: enter debug mode\n" );fprintf (stream,"\n" );fprintf (stream," -t: mini terminal\n" );fprintf (stream,"\n" );
@@ -619,6 +671,7 @@ main(int argc, char **argv)const char *ttypath, *imgpath;int rv, rc, tty, term, prot, patch;void *bootmsg; +void *debugmsg;void *img;size_t size;speed_t speed;
@@ -626,6 +679,7 @@ main(int argc, char **argv) rv =1 ; tty =-1 ; bootmsg =NULL ; + debugmsg =NULL ; imgpath =NULL ; img =NULL ; term =0 ;
@@ -636,7 +690,7 @@ main(int argc, char **argv) kwboot_verbose =isatty (STDOUT_FILENO ); do { - int c = getopt(argc, argv, "hb:ptB:"); + int c = getopt(argc, argv, "hb:ptB:dD:"); if (c < 0) break;
@@ -646,6 +700,15 @@ main(int argc, char **argv) imgpath = optarg;break ; +case 'D' : + bootmsg =NULL ; + imgpath = optarg; +break ; + +case 'd' : + debugmsg = kwboot_msg_debug; +break ; +case 'p' : patch =1 ;break ;
@@ -667,7 +730,7 @@ main(int argc, char **argv) } }while (1 ); -if (!bootmsg && !term) +if (!bootmsg && !term && !debugmsg) goto usage;if (patch && !imgpath)
@@ -702,7 +765,13 @@ main(int argc, char **argv) } } -if (bootmsg) { +if (debugmsg) { + rc =kwboot_debugmsg (tty, debugmsg); +if (rc) { +perror ("debugmsg" ); + goto out; + } + }else { rc =kwboot_bootmsg (tty, bootmsg);if (rc) {perror ("bootmsg" );
Signature · 1 line
2.0.1
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
Hi Stefan,
It's great to see you working on adding support for Marvell's new SoCs :)
Since now kwboot is going to support more SoCs except kirkwood it makes sense to rename it to mvboot. I've sent this patch long ago, dunno if it still applies:
http://patchwork.ozlabs.org/patch/219741/
Also, I'd like to test this series on some boards I have - do you have patches on some git tree that can be pulled easily?
Luka
Quoted 227 lines · Stefan Roese
The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)tools/kwboot.c +83
-14@@ -1,5 +1,6 @@/* -* Boot a Marvell Kirkwood SoC, with Xmodem over UART0. +* Boot a Marvell SoC, with Xmodem over UART0. +* supports Kirkwood, Dove, Armada 370, Armada XP * * (c) 2012 Daniel Stodden <[email protected]> * @@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = { 0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 10/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ +static unsigned char kwboot_msg_debug[] = { +0xDD ,0x11 ,0x22 ,0x33 ,0x44 ,0x55 ,0x66 ,0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ /* * Xmodem Transfers @@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)int rc;ssize_t n; +if (!buf) +return 0 ; + rc =-1 ; do {@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)int rc;char c; -kwboot_printv ("Sending boot message. Please reboot the target..." ); +if (msg ==NULL ) +kwboot_printv ("Please reboot the target into UART boot mode..." ); +else +kwboot_printv ("Sending boot message. Please reboot the target..." ); do { rc = tcflush(tty, TCIOFLUSH);@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg) }static int +kwboot_debugmsg (int tty,void *msg) +{ +int rc; + +kwboot_printv ("Sending debug message. Please reboot the target..." ); + +do { +char buf[16 ]; + + rc =tcflush (tty,TCIOFLUSH ); +if (rc) +break ; + + rc =kwboot_tty_send (tty, msg,8 ); +if (rc) { +usleep (KWBOOT_MSG_REQ_DELAY *1000 ); +continue ; + } + + rc =kwboot_tty_recv (tty, buf,16 ,KWBOOT_MSG_RSP_TIMEO ); + +kwboot_spinner (); + + }while (rc); + +kwboot_printv ("\n" ); + +return rc; +} + +static int kwboot_xm_makeblock (struct kwboot_block *block,const void *data,size_t size,int pnum) {@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void *data,size_t n;int i; + block->soh =SOH ; block->pnum = pnum; block->_pnum = ~block->pnum;@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)if (rc)break ; - rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); -if (rc) -break ; +do { + rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); +if (rc) +break ; + +if (c !=ACK && c !=NAK && c !=CAN ) +printf ("%c" , c); + + }while (c !=ACK && c !=NAK && c !=CAN );if (c !=ACK )kwboot_progress (-1 ,'+' );@@ -511,7 +560,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)void *img; rc =-1 ; - fd =-1 ; img =NULL ; fd =open (path,O_RDONLY );@@ -601,11 +649,15 @@ static void kwboot_usage(FILE *stream, char *progname) {fprintf (stream, -"Usage: %s -b <image> [ -p ] [ -t ] " -"[-B <baud> ] <TTY>\n" , progname); +"Usage: %s [-d | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n" , + progname);fprintf (stream,"\n" ); -fprintf (stream," -b <image>: boot <image>\n" ); +fprintf (stream, +" -b <image>: boot <image> with preamble (Kirkwood, Armada 370/XP)\n" );fprintf (stream," -p: patch <image> to type 0x69 (uart boot)\n" ); +fprintf (stream, +" -D <image>: boot <image> without preamble (Dove)\n" ); +fprintf (stream," -d: enter debug mode\n" );fprintf (stream,"\n" );fprintf (stream," -t: mini terminal\n" );fprintf (stream,"\n" );@@ -619,6 +671,7 @@ main(int argc, char **argv)const char *ttypath, *imgpath;int rv, rc, tty, term, prot, patch;void *bootmsg; +void *debugmsg;void *img;size_t size;speed_t speed;@@ -626,6 +679,7 @@ main(int argc, char **argv) rv =1 ; tty =-1 ; bootmsg =NULL ; + debugmsg =NULL ; imgpath =NULL ; img =NULL ; term =0 ;@@ -636,7 +690,7 @@ main(int argc, char **argv) kwboot_verbose =isatty (STDOUT_FILENO ); do { - int c = getopt(argc, argv, "hb:ptB:"); + int c = getopt(argc, argv, "hb:ptB:dD:"); if (c < 0) break;@@ -646,6 +700,15 @@ main(int argc, char **argv) imgpath = optarg;break ; +case 'D' : + bootmsg =NULL ; + imgpath = optarg; +break ; + +case 'd' : + debugmsg = kwboot_msg_debug; +break ; +case 'p' : patch =1 ;break ;@@ -667,7 +730,7 @@ main(int argc, char **argv) } }while (1 ); -if (!bootmsg && !term) +if (!bootmsg && !term && !debugmsg) goto usage;if (patch && !imgpath)@@ -702,7 +765,13 @@ main(int argc, char **argv) } } -if (bootmsg) { +if (debugmsg) { + rc =kwboot_debugmsg (tty, debugmsg); +if (rc) { +perror ("debugmsg" ); + goto out; + } + }else { rc =kwboot_bootmsg (tty, bootmsg);if (rc) {perror ("bootmsg" );Signature · 6 lines
2.0.1 _______________________________________________ U-Boot mailing list U-Boot at lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
Quoted 4 lines · Luka Perkov
Hi Stefan,
It's great to see you working on adding support for Marvell's new SoCs :)
Quoted 8 lines
Since now kwboot is going to support more SoCs except kirkwood it makes sense to rename it to mvboot. I've sent this patch long ago, dunno if it still applies:
http://patchwork.ozlabs.org/patch/219741/
Also, I'd like to test this series on some boards I have - do you have patches on some git tree that can be pulled easily?
In case Marvell gets bought out: wouldn't it make more sense to rename to mrvlboot and point a curl script at the nasdaq quotes to validate the build?
Related, I don't think Marvell guarantees to not either yank or completely overhaul their SoC boot code entirely next September.
I'm sorry for "kwboot" if it violates your aesthetic senses. Those as of 2014. Indeed, naming programs by product is often a weak choice, but there wasn't a more robust one available. But: there still isn't.
Program paths don't get renamed at will. That's because once it's deployed it's not arbitrary anymore, and some real value in doing so better compensates for the overall pain.
Here's one fix: one could write a yet better one with yet a better name, convince everyone to switch, and just obsolete the existing one.
An easier, sometimes funnier, alternative is to learn to enjoy the historical trivia surrounding all those seemingly stupid names.
Yeah, an 'apt-get git' used to install GNU interactive tools, then at some point it suddenly didn't. But NIS support still runs as ypbind for all the good reasons, too.
Cheers,
Daniel
Quoted 234 lines
Luka
Quoted 227 lines · Stefan Roese
The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)tools/kwboot.c +83
-14@@ -1,5 +1,6 @@/* -* Boot a Marvell Kirkwood SoC, with Xmodem over UART0. +* Boot a Marvell SoC, with Xmodem over UART0. +* supports Kirkwood, Dove, Armada 370, Armada XP * * (c) 2012 Daniel Stodden <[email protected]> * @@ -37,8 +38,12 @@ static unsigned char kwboot_msg_boot[] = { 0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 10/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ +static unsigned char kwboot_msg_debug[] = { +0xDD ,0x11 ,0x22 ,0x33 ,0x44 ,0x55 ,0x66 ,0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ /* * Xmodem Transfers @@ -184,6 +189,9 @@ kwboot_tty_send(int fd, const void *buf, size_t len)int rc;ssize_t n; +if (!buf) +return 0 ; + rc =-1 ; do {@@ -268,7 +276,10 @@ kwboot_bootmsg(int tty, void *msg)int rc;char c; -kwboot_printv ("Sending boot message. Please reboot the target..." ); +if (msg ==NULL ) +kwboot_printv ("Please reboot the target into UART boot mode..." ); +else +kwboot_printv ("Sending boot message. Please reboot the target..." ); do { rc = tcflush(tty, TCIOFLUSH);@@ -293,6 +304,37 @@ kwboot_bootmsg(int tty, void *msg) }static int +kwboot_debugmsg (int tty,void *msg) +{ +int rc; + +kwboot_printv ("Sending debug message. Please reboot the target..." ); + +do { +char buf[16 ]; + + rc =tcflush (tty,TCIOFLUSH ); +if (rc) +break ; + + rc =kwboot_tty_send (tty, msg,8 ); +if (rc) { +usleep (KWBOOT_MSG_REQ_DELAY *1000 ); +continue ; + } + + rc =kwboot_tty_recv (tty, buf,16 ,KWBOOT_MSG_RSP_TIMEO ); + +kwboot_spinner (); + + }while (rc); + +kwboot_printv ("\n" ); + +return rc; +} + +static int kwboot_xm_makeblock (struct kwboot_block *block,const void *data,size_t size,int pnum) {@@ -300,6 +342,7 @@ kwboot_xm_makeblock(struct kwboot_block *block, const void *data,size_t n;int i; + block->soh =SOH ; block->pnum = pnum; block->_pnum = ~block->pnum;@@ -326,9 +369,15 @@ kwboot_xm_sendblock(int fd, struct kwboot_block *block)if (rc)break ; - rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); -if (rc) -break ; +do { + rc =kwboot_tty_recv (fd, &c,1 ,KWBOOT_BLK_RSP_TIMEO ); +if (rc) +break ; + +if (c !=ACK && c !=NAK && c !=CAN ) +printf ("%c" , c); + + }while (c !=ACK && c !=NAK && c !=CAN );if (c !=ACK )kwboot_progress (-1 ,'+' );@@ -511,7 +560,6 @@ kwboot_mmap_image(const char *path, size_t *size, int prot)void *img; rc =-1 ; - fd =-1 ; img =NULL ; fd =open (path,O_RDONLY );@@ -601,11 +649,15 @@ static void kwboot_usage(FILE *stream, char *progname) {fprintf (stream, -"Usage: %s -b <image> [ -p ] [ -t ] " -"[-B <baud> ] <TTY>\n" , progname); +"Usage: %s [-d | -b <image> | -D <image> ] [ -t ] [-B <baud> ] <TTY>\n" , + progname);fprintf (stream,"\n" ); -fprintf (stream," -b <image>: boot <image>\n" ); +fprintf (stream, +" -b <image>: boot <image> with preamble (Kirkwood, Armada 370/XP)\n" );fprintf (stream," -p: patch <image> to type 0x69 (uart boot)\n" ); +fprintf (stream, +" -D <image>: boot <image> without preamble (Dove)\n" ); +fprintf (stream," -d: enter debug mode\n" );fprintf (stream,"\n" );fprintf (stream," -t: mini terminal\n" );fprintf (stream,"\n" );@@ -619,6 +671,7 @@ main(int argc, char **argv)const char *ttypath, *imgpath;int rv, rc, tty, term, prot, patch;void *bootmsg; +void *debugmsg;void *img;size_t size;speed_t speed;@@ -626,6 +679,7 @@ main(int argc, char **argv) rv =1 ; tty =-1 ; bootmsg =NULL ; + debugmsg =NULL ; imgpath =NULL ; img =NULL ; term =0 ;@@ -636,7 +690,7 @@ main(int argc, char **argv) kwboot_verbose =isatty (STDOUT_FILENO ); do { - int c = getopt(argc, argv, "hb:ptB:"); + int c = getopt(argc, argv, "hb:ptB:dD:"); if (c < 0) break;@@ -646,6 +700,15 @@ main(int argc, char **argv) imgpath = optarg;break ; +case 'D' : + bootmsg =NULL ; + imgpath = optarg; +break ; + +case 'd' : + debugmsg = kwboot_msg_debug; +break ; +case 'p' : patch =1 ;break ;@@ -667,7 +730,7 @@ main(int argc, char **argv) } }while (1 ); -if (!bootmsg && !term) +if (!bootmsg && !term && !debugmsg) goto usage;if (patch && !imgpath)@@ -702,7 +765,13 @@ main(int argc, char **argv) } } -if (bootmsg) { +if (debugmsg) { + rc =kwboot_debugmsg (tty, debugmsg); +if (rc) { +perror ("debugmsg" ); + goto out; + } + }else { rc =kwboot_bootmsg (tty, bootmsg);if (rc) {perror ("bootmsg" );Signature · 6 lines
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PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
In reply to Luka PerkovHi Luka!
Quoted 1 line · Luka Perkov
It's great to see you working on adding support for Marvell's new SoCs :)
Thanks.
Quoted 5 lines
Since now kwboot is going to support more SoCs except kirkwood it makes sense to rename it to mvboot. I've sent this patch long ago, dunno if it still applies:
I thought about renaming the tool(s) as well. But decided against it. Mostly because of historical reasons. This name for the tools has been around for quite some time. And is documented in many README / HOWTO files on the web. That's why I chose to not change it, at least for now.
Quoted 1 line
Also, I'd like to test this series on some boards I have
That would be great. Thanks. Please keep me informed.
Note that I only merged some of the Kirkwood U-Boot code with the Armada XP code. More work could be done here. And Dove definitely can be squashed into this now common MVEBU infrastructure as well. Patches as always very welcome (after this patchset is accepted as a basis). ;)
Quoted 2 lines
- do you have
patches on some git tree that can be pulled easily?
Sure. I just uploaded a branch "marvell-armada-xp-2014-06-27" to the u-boot-testing git repository:
http://git.denx.de/?p=u-boot/u-boot-testing.git;a=shortlog;h=refs/heads/marvell-armada-xp-2014-06-27
Thanks,
Stefan
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
In reply to Stefan RoeseHi Stefan,
Quoted 13 lines · Stefan Roese
The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)
...
Review
Quoted 8 lines
(quoted diff) +6
-2-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */ +static unsigned char kwboot_msg_debug[] = { + 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */
This causes problems on kirkwood. The old values should be kept, apply the patch below to this one. After that chage feel free to add Tested-by line.
Now only to figure out why 21/25 breaks things on kirkwood.
Luka
tools/kwboot.c +2 -2
@@ -42,8 +42,8 @@ static unsigned char kwboot_msg_debug[] = { 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ +#define KWBOOT_MSG_REQ_DELAY 10/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ /* * Xmodem Transfers
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
Hi Luka!
Sorry for the late reply to this comment.
Quoted 43 lines · Luka Perkov
Hi Stefan,
Quoted 13 lines · Stefan Roese
The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)...
Review
Quoted 8 lines
(quoted diff) +6
-2-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */ +static unsigned char kwboot_msg_debug[] = { + 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */This causes problems on kirkwood. The old values should be kept, apply the patch below to this one. After that chage feel free to add Tested-by line.
Tested-by Luka Perkov <[email protected]>Now only to figure out why 21/25 breaks things on kirkwood.
Luka
tools/kwboot.c +0
-0
tools/kwboot.c static unsigned char kwboot_msg_debug[] = { · line 46
Quoted 7 lines
tools/kwboot.c +2
-2@@ -42,8 +42,8 @@ static unsigned char kwboot_msg_debug[] = { 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ +#define KWBOOT_MSG_REQ_DELAY 10/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 50/* ms */
Unfortunately these settings do not work with Armada XP. I tested a bit and it seems that e.g. this setting works on Armada XP:
#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */
Could you please check this on your Kirkwood platform? And perhaps find a configuration that works for the SoC's? That would be great!
Thanks,
Stefan
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
Hi Stefan,
Quoted 55 lines · Stefan Roese
Sorry for the late reply to this comment.
Quoted 41 lines · Luka Perkov
Quoted 13 lines · Stefan Roese
The barebox version of the kwboot tool has evolved a bit. To support Armada XP and Dove. Additionally a few minor fixes have been applied. So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that the U-Boot version still supports the -p option, to dynamically patch an image for UART boot mode. I didn't test it now though.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)...
Review
Quoted 8 lines
(quoted diff) +6
-2-#define KWBOOT_MSG_REQ_DELAY 10 /* ms */ -#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */ +static unsigned char kwboot_msg_debug[] = { + 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 +}; + +#define KWBOOT_MSG_REQ_DELAY 1000 /* ms */ +#define KWBOOT_MSG_RSP_TIMEO 1000 /* ms */This causes problems on kirkwood. The old values should be kept, apply the patch below to this one. After that chage feel free to add Tested-by line.
Tested-by Luka Perkov <[email protected]>Now only to figure out why 21/25 breaks things on kirkwood.
Luka
tools/kwboot.c +0
-0tools/kwboot.c static unsigned char kwboot_msg_debug[] = { · line 46
Quoted 7 lines
tools/kwboot.c +2
-2@@ -42,8 +42,8 @@ static unsigned char kwboot_msg_debug[] = { 0xDD, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77 }; -#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ +#define KWBOOT_MSG_REQ_DELAY 10/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ Unfortunately these settings do not work with Armada XP. I tested a bit and it seems that e.g. this setting works on Armada XP:
Quoted 5 lines
#define
KWBOOT_MSG_REQ_DELAY10 /* ms */
#defineKWBOOT_MSG_RSP_TIMEO1000 /* ms */Could you please check this on your Kirkwood platform? And perhaps find a configuration that works for the SoC's? That would be great!
I just tried this and it does not work on kirkwood. I've stumbled upon this thread though, it might be useful:
http://lists.infradead.org/pipermail/barebox/2014-June/019618.html
Can we just add a flag to kwboot which will use appropriate values for kirkwood and armada? We can keep kirkwood by default, that way we won't break anything.
Luka
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
Hi Luka,
On 30.07.2014 01:16, Luka Perkov wrote:
<snip>
Quoted 11 lines
Quoted 11 lines
tools/kwboot.c static unsigned char kwboot_msg_debug[] = { · line 46
Quoted 4 lines
tools/kwboot.c +2
-2-#define KWBOOT_MSG_REQ_DELAY 1000/* ms */ -#define KWBOOT_MSG_RSP_TIMEO 1000/* ms */ +#define KWBOOT_MSG_REQ_DELAY 10/* ms */ +#define KWBOOT_MSG_RSP_TIMEO 50/* ms */ Unfortunately these settings do not work with Armada XP. I tested a bit and it seems that e.g. this setting works on Armada XP:
#define
KWBOOT_MSG_REQ_DELAY10 /* ms */
#defineKWBOOT_MSG_RSP_TIMEO1000 /* ms */
Quoted 7 lines
Quoted 2 lines
Could you please check this on your Kirkwood platform? And perhaps find a configuration that works for the SoC's? That would be great!
I just tried this and it does not work on kirkwood. I've stumbled upon this thread though, it might be useful:
http://lists.infradead.org/pipermail/barebox/2014-June/019618.html
Yes, thanks.
Quoted 3 lines
Can we just add a flag to kwboot which will use appropriate values for kirkwood and armada? We can keep kirkwood by default, that way we won't break anything.
If nobody comes up with a working solution (timeout values that work for both SoC's), then such a parameter is of course an option.
Thanks,
Stefan
PATCH 22/25 tools/kwboot: Sync with latest barebox version to support Armada XP
In reply to Stefan RoeseDear Daniel,
In message <[email protected]> Stefan Roese wrote:
...
Quoted 2 lines
tools/kwboot.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 83 insertions(+), 14 deletions(-)
It appears that you are the original author of the kwboot.c code, is this correct?
The file does not include any license information. As you submitted it to the U-Boot project, we can assume they are supposed to be covered by the project wide license terms, but I'd rather be sure about that.
Could you please elucidate?
Thanks.
Best regards,
Wolfgang Denk
Signature · 6 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de If you believe that feeling bad or worrying long enough will change a past or future event, then you are residing on another planet with a different reality system.
PATCH 23/25 tools: Compile kwboot for Marvell Armada XP as those SoCs are now supported
In reply to Stefan Roese---
tools/Makefile | 1 + 1 file changed, 1 insertion(+)
tools/Makefile +1 -0
@@ -139,6 +139,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o HOSTCFLAGS_ubsha1.o := -pedantic hostprogs-$(CONFIG_KIRKWOOD) += kwboot +hostprogs-$(CONFIG_ARMADA_XP) += kwboot hostprogs-y += proftool hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela
Signature · 1 line
2.0.1
PATCH 23/25 tools: Compile kwboot for Marvell Armada XP as those SoCs are now supported
Quoted 5 lines · Stefan Roese
Signed-off-by Stefan Roese <[email protected]>---
tools/Makefile | 1 + 1 file changed, 1 insertion(+)
Luka
PATCH 24/25 tools: kwbimage: Add image version 1 support for Armada XP / 370
In reply to Stefan RoeseThis patch integrates the Barebox version of this kwbimage.c file into U-Boot. As this version supports the image version 1 type for the Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working Barebox source than to update the current U-Boot version to support this v1 image header format. Now all Marvell MVEBU SoCs are supported:
Image type 0: Kirkwood & Dove
Image type 1: Armada 370 & Armada XP
Please note that the current v1 support has this restuction (same as has Barebox version):
Not implemented: support for the register headers and secure headers in v1 images
Tested on Marvell DB-78460-BP eval board.
---
tools/kwbimage.c | 1050 ++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 782 insertions(+), 268 deletions(-)
tools/kwbimage.c +782 -268
@@ -1,364 +1,805 @@/* -* (C) Copyright 2008 -* Marvell Semiconductor <www.marvell.com> -* Written-by: Prafulla Wadaskar <[email protected]> +* Image manipulator for Marvell SoCs +* supports Kirkwood, Dove, Armada 370, and Armada XP +* +* (C) Copyright 2013 Thomas Petazzoni +* <[email protected]> * * SPDX-License-Identifier: GPL-2.0+ +* +* Not implemented: support for the register headers and secure +* headers in v1 images */ #include "imagetool.h" #include <image.h> +#include <stdint.h> #include "kwbimage.h" -/* -* Supported commands for configuration file -*/ -static table_entry_t kwbimage_cmds[] = { - {CMD_BOOT_FROM ,"BOOT_FROM" ,"boot command" , }, - {CMD_NAND_ECC_MODE ,"NAND_ECC_MODE" ,"NAND mode" , }, - {CMD_NAND_PAGE_SIZE ,"NAND_PAGE_SIZE" ,"NAND size" , }, - {CMD_SATA_PIO_MODE ,"SATA_PIO_MODE" ,"SATA mode" , }, - {CMD_DDR_INIT_DELAY ,"DDR_INIT_DELAY" ,"DDR init dly" , }, - {CMD_DATA ,"DATA" ,"Reg Write Data" , }, - {CMD_INVALID ,"" ,"" , }, +#define ALIGN_SUP (x, a) (((x) + (a - 1)) & ~(a - 1)) + +/* Structure of the main header, version 0 (Kirkwood, Dove) */ +struct main_hdr_v0 { +uint8_t blockid;/*0 */ +uint8_t nandeccmode;/*1 */ +uint16_t nandpagesize;/*2-3 */ +uint32_t blocksize;/*4-7 */ +uint32_t rsvd1;/*8-11 */ +uint32_t srcaddr;/*12-15 */ +uint32_t destaddr;/*16-19 */ +uint32_t execaddr;/*20-23 */ +uint8_t satapiomode;/*24 */ +uint8_t rsvd3;/*25 */ +uint16_t ddrinitdelay;/*26-27 */ +uint16_t rsvd2;/*28-29 */ +uint8_t ext;/*30 */ +uint8_t checksum;/*31 */ +}; + +struct ext_hdr_v0_reg { +uint32_t raddr; +uint32_t rdata; +}; + +#define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg)) + +struct ext_hdr_v0 { +uint32_t offset; +uint8_t reserved[0x20 -sizeof (uint32_t )]; +struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT ]; +uint8_t reserved2[7 ]; +uint8_t checksum; +}; + +/* Structure of the main header, version 1 (Armada 370, Armada XP) */ +struct main_hdr_v1 { +uint8_t blockid;/* 0 */ +uint8_t reserved1;/* 1 */ +uint16_t reserved2;/* 2-3 */ +uint32_t blocksize;/* 4-7 */ +uint8_t version;/* 8 */ +uint8_t headersz_msb;/* 9 */ +uint16_t headersz_lsb;/* A-B */ +uint32_t srcaddr;/* C-F */ +uint32_t destaddr;/* 10-13 */ +uint32_t execaddr;/* 14-17 */ +uint8_t reserved3;/* 18 */ +uint8_t nandblocksize;/* 19 */ +uint8_t nandbadblklocation;/* 1A */ +uint8_t reserved4;/* 1B */ +uint16_t reserved5;/* 1C-1D */ +uint8_t ext;/* 1E */ +uint8_t checksum;/* 1F */ };/* -* Supported Boot options for configuration file +* Header for the optional headers, version 1 (Armada 370, Armada XP) */ -static table_entry_t kwbimage_bootops[] = { - {IBR_HDR_SPI_ID ,"spi" ,"SPI Flash" , }, - {IBR_HDR_NAND_ID ,"nand" ,"NAND Flash" , }, - {IBR_HDR_SATA_ID ,"sata" ,"Sata port" , }, - {IBR_HDR_PEX_ID ,"pex" ,"PCIe port" , }, - {IBR_HDR_UART_ID ,"uart" ,"Serial port" , }, - {-1 ,"" ,"Invalid" , }, +struct opt_hdr_v1 { +uint8_t headertype; +uint8_t headersz_msb; +uint16_t headersz_lsb; +char data[0 ]; };/* -* Supported NAND ecc options configuration file +* Various values for the opt_hdr_v1->headertype field, describing the +* different types of optional headers. The "secure" header contains +* informations related to secure boot (encryption keys, etc.). The +* "binary" header contains ARM binary code to be executed prior to +* executing the main payload (usually the bootloader). This is +* typically used to execute DDR3 training code. The "register" header +* allows to describe a set of (address, value) tuples that are +* generally used to configure the DRAM controller. */ -static table_entry_t kwbimage_eccmodes[] = { - {IBR_HDR_ECC_DEFAULT ,"default" ,"Default mode" , }, - {IBR_HDR_ECC_FORCED_HAMMING ,"hamming" ,"Hamming mode" , }, - {IBR_HDR_ECC_FORCED_RS ,"rs" ,"RS mode" , }, - {IBR_HDR_ECC_DISABLED ,"disabled" ,"ECC Disabled" , }, - {-1 ,"" ,"" , }, +#define OPT_HDR_V1_SECURE_TYPE 0x1 +#define OPT_HDR_V1_BINARY_TYPE 0x2 +#define OPT_HDR_V1_REGISTER_TYPE 0x3 + +#define KWBHEADER_V1_SIZE (hdr) \ + (((hdr)->headersz_msb << 16) | (hdr)->headersz_lsb) + +static struct image_cfg_element *image_cfg; +static int cfgn; + +struct boot_mode { +unsigned int id; +const char *name; +}; + +struct boot_mode boot_modes[] = { + {0x4D ,"i2c" }, + {0x5A ,"spi" }, + {0x8B ,"nand" }, + {0x78 ,"sata" }, + {0x9C ,"pex" }, + {0x69 ,"uart" }, + {}, }; -static struct kwb_header kwbimage_header; -static int datacmd_cnt =0 ; -static char * fname ="Unknown" ; -static int lineno =-1 ; +struct nand_ecc_mode { +unsigned int id; +const char *name; +}; + +struct nand_ecc_mode nand_ecc_modes[] = { + {0x00 ,"default" }, + {0x01 ,"hamming" }, + {0x02 ,"rs" }, + {0x03 ,"disabled" }, + {}, +}; + +/* Used to identify an undefined execution or destination address */ +#define ADDR_INVALID ((uint32_t)-1) + +#define BINARY_MAX_ARGS 8 + +/* In-memory representation of a line of the configuration file */ +struct image_cfg_element { +enum { +IMAGE_CFG_VERSION =0x1 , +IMAGE_CFG_BOOT_FROM , +IMAGE_CFG_DEST_ADDR , +IMAGE_CFG_EXEC_ADDR , +IMAGE_CFG_NAND_BLKSZ , +IMAGE_CFG_NAND_BADBLK_LOCATION , +IMAGE_CFG_NAND_ECC_MODE , +IMAGE_CFG_NAND_PAGESZ , +IMAGE_CFG_BINARY , +IMAGE_CFG_PAYLOAD , +IMAGE_CFG_DATA , + } type; +union { +unsigned int version; +unsigned int bootfrom; +struct { +const char *file; +unsigned int args[BINARY_MAX_ARGS ]; +unsigned int nargs; + } binary; +const char *payload; +unsigned int dstaddr; +unsigned int execaddr; +unsigned int nandblksz; +unsigned int nandbadblklocation; +unsigned int nandeccmode; +unsigned int nandpagesz; +struct ext_hdr_v0_reg regdata; + }; +}; + +#define IMAGE_CFG_ELEMENT_MAX 256/* -* Report Error if xflag is set in addition to default +* Byte 8 of the image header contains the version number. In the v0 +* header, byte 8 was reserved, and always set to 0. In the v1 header, +* byte 8 has been changed to a proper field, set to 1. */ -static int kwbimage_check_params (struct image_tool_params *params) +static unsigned int image_version (void *header) { -if (!strlen (params->imagename)) { -printf ("Error:%s - Configuration file not specified, " -"it is needed for kwbimage generation\n" , - params->cmdname); -return CFG_INVALID ; - } -return ((params->dflag && (params->fflag || params->lflag)) || - (params->fflag && (params->dflag || params->lflag)) || - (params->lflag && (params->dflag || params->fflag)) || - (params->xflag) || !(strlen (params->imagename))); +unsigned char *ptr = header; +return ptr[8 ]; +} + +/* +* Utility functions to manipulate boot mode and ecc modes (convert +* them back and forth between description strings and the +* corresponding numerical identifiers). +*/ + +static const char *image_boot_mode_name (unsigned int id) +{ +int i; +for (i =0 ; boot_modes[i].name; i++) +if (boot_modes[i].id == id) +return boot_modes[i].name; +return NULL ; +} + +int image_boot_mode_id (const char *boot_mode_name) +{ +int i; +for (i =0 ; boot_modes[i].name; i++) +if (!strcmp (boot_modes[i].name, boot_mode_name)) +return boot_modes[i].id; + +return -1 ; +} + +int image_nand_ecc_mode_id (const char *nand_ecc_mode_name) +{ +int i; +for (i =0 ; nand_ecc_modes[i].name; i++) +if (!strcmp (nand_ecc_modes[i].name, nand_ecc_mode_name)) +return nand_ecc_modes[i].id; +return -1 ; } -static uint32_t check_get_hexval (char *token) +static struct image_cfg_element * +image_find_option (unsigned int optiontype) { -uint32_t hexval; +int i; -if (!sscanf (token,"%x" , &hexval)) { -printf ("Error:%s[%d] - Invalid hex data(%s)\n" , fname, - lineno, token); -exit (EXIT_FAILURE ); +for (i =0 ; i < cfgn; i++) { +if (image_cfg[i].type == optiontype) +return &image_cfg[i]; } -return hexval; + +return NULL ; +} + +static unsigned int +image_count_options (unsigned int optiontype) +{ +int i; +unsigned int count =0 ; + +for (i =0 ; i < cfgn; i++) +if (image_cfg[i].type == optiontype) + count++; + +return count; }/* -* Generates 8 bit checksum +* Compute a 8-bit checksum of a memory area. This algorithm follows +* the requirements of the Marvell SoC BootROM specifications. */ -static uint8_t kwbimage_checksum8 (void *start,uint32_t len,uint8_t csum) +static uint8_t image_checksum8 (void *start,uint32_t len) { - registeruint8_t sum = csum; -volatile uint8_t *p = (volatile uint8_t *)start; +uint8_t csum =0 ; +uint8_t *p = start;/* check len and return zero checksum if invalid */ if (!len)return 0 ;do { - sum += *p; + csum += *p; p++; }while (--len); -return (sum); + +return csum; } -/* -* Generates 32 bit checksum -*/ -static uint32_t kwbimage_checksum32 (uint32_t *start,uint32_t len,uint32_t csum) +static uint32_t image_checksum32 (void *start,uint32_t len) { - registeruint32_t sum = csum; -volatile uint32_t *p = start; +uint32_t csum =0 ; +uint32_t *p = start;/* check len and return zero checksum if invalid */ if (!len)return 0 ;if (len %sizeof (uint32_t )) { -printf ("Error:%s[%d] - length is not in multiple of %zu\n" , - __FUNCTION__, len,sizeof (uint32_t )); +fprintf (stderr,"Length %d is not in multiple of %zu\n" , + len,sizeof (uint32_t ));return 0 ; }do { - sum += *p; + csum += *p; p++; len -=sizeof (uint32_t ); }while (len >0 ); -return (sum); + +return csum; } -static void kwbimage_check_cfgdata (char *token,enum kwbimage_cmd cmdsw, -struct kwb_header *kwbhdr) +static void *image_create_v0 (size_t *imagesz,struct image_tool_params *params, +int payloadsz) { -bhr_t *mhdr = &kwbhdr->kwb_hdr; -extbhr_t *exthdr = &kwbhdr->kwb_exthdr; -int i; +struct image_cfg_element *e; +size_t headersz; +struct main_hdr_v0 *main_hdr; +struct ext_hdr_v0 *ext_hdr; +void *image; +int has_ext =0 ; + +/* +* Calculate the size of the header and the size of the +* payload +*/ + headersz =sizeof (struct main_hdr_v0 ); + +if (image_count_options (IMAGE_CFG_DATA ) >0 ) { + has_ext =1 ; + headersz +=sizeof (struct ext_hdr_v0 ); + } + +if (image_count_options (IMAGE_CFG_PAYLOAD ) >1 ) { +fprintf (stderr,"More than one payload, not possible\n" ); +return NULL ; + } -switch (cmdsw) { -case CMD_BOOT_FROM : - i =get_table_entry_id (kwbimage_bootops, -"Kwbimage boot option" , token); - -if (i <0 ) - goto INVL_DATA; - - mhdr->blockid = i; -printf ("Preparing kirkwood boot image to boot " -"from %s\n" , token); -break ; -case CMD_NAND_ECC_MODE : - i =get_table_entry_id (kwbimage_eccmodes, -"NAND ecc mode" , token); - -if (i <0 ) - goto INVL_DATA; - - mhdr->nandeccmode = i; -printf ("Nand ECC mode = %s\n" , token); -break ; -case CMD_NAND_PAGE_SIZE : - mhdr->nandpagesize = - (uint16_t )check_get_hexval (token); -printf ("Nand page size = 0x%x\n" , mhdr->nandpagesize); -break ; -case CMD_SATA_PIO_MODE : - mhdr->satapiomode = - (uint8_t )check_get_hexval (token); -printf ("Sata PIO mode = 0x%x\n" , - mhdr->satapiomode); -break ; -case CMD_DDR_INIT_DELAY : - mhdr->ddrinitdelay = - (uint16_t )check_get_hexval (token); -printf ("DDR init delay = %d msec\n" , mhdr->ddrinitdelay); -break ; -case CMD_DATA : - exthdr->rcfg[datacmd_cnt].raddr = -check_get_hexval (token); - -break ; -case CMD_INVALID : - goto INVL_DATA; -default : - goto INVL_DATA; + image =malloc (headersz); +if (!image) { +fprintf (stderr,"Cannot allocate memory for image\n" ); +return NULL ; } -return ; -INVL_DATA: -printf ("Error:%s[%d] - Invalid data\n" , fname, lineno); -exit (EXIT_FAILURE ); +memset (image,0 , headersz); + + main_hdr = image; + +/* Fill in the main header */ + main_hdr->blocksize = payloadsz +sizeof (uint32_t ); + main_hdr->srcaddr = headersz; + main_hdr->ext = has_ext; + main_hdr->destaddr = params->addr; + main_hdr->execaddr = params->ep; + + e =image_find_option (IMAGE_CFG_BOOT_FROM ); +if (e) + main_hdr->blockid = e->bootfrom; + e =image_find_option (IMAGE_CFG_NAND_ECC_MODE ); +if (e) + main_hdr->nandeccmode = e->nandeccmode; + e =image_find_option (IMAGE_CFG_NAND_PAGESZ ); +if (e) + main_hdr->nandpagesize = e->nandpagesz; + main_hdr->checksum =image_checksum8 (image, +sizeof (struct main_hdr_v0 )); + +/* Generate the ext header */ +if (has_ext) { +int cfgi, datai; + + ext_hdr = image +sizeof (struct main_hdr_v0 ); + ext_hdr->offset =0x40 ; + +for (cfgi =0 , datai =0 ; cfgi < cfgn; cfgi++) { + e = &image_cfg[cfgi]; +if (e->type !=IMAGE_CFG_DATA ) +continue ; + + ext_hdr->rcfg[datai].raddr = e->regdata.raddr; + ext_hdr->rcfg[datai].rdata = e->regdata.rdata; + datai++; + } + + ext_hdr->checksum =image_checksum8 (ext_hdr, +sizeof (struct ext_hdr_v0 )); + } + + *imagesz = headersz; +return image; } -/* -* this function sets the kwbimage header by- -* 1. Abstracting input command line arguments data -* 2. parses the kwbimage configuration file and update extebded header data -* 3. calculates header, extended header and image checksums -*/ -static void kwdimage_set_ext_header (struct kwb_header *kwbhdr,char * name) { -bhr_t *mhdr = &kwbhdr->kwb_hdr; -extbhr_t *exthdr = &kwbhdr->kwb_exthdr; -FILE *fd =NULL ; -int j; -char *line =NULL ; -char * token, *saveptr1, *saveptr2; -size_t len =0 ; -enum kwbimage_cmd cmd; - - fname = name; -/* set dram register offset */ - exthdr->dramregsoffs = (intptr_t )&exthdr->rcfg - (intptr_t )mhdr; - -if ((fd =fopen (name,"r" )) ==0 ) { -printf ("Error:%s - Can't open\n" , fname); -exit (EXIT_FAILURE ); +static size_t image_headersz_v1 (struct image_tool_params *params, +int *hasext) +{ +struct image_cfg_element *binarye; +size_t headersz; +int ret; + +/* +* Calculate the size of the header and the size of the +* payload +*/ + headersz =sizeof (struct main_hdr_v1 ); + +if (image_count_options (IMAGE_CFG_BINARY ) >1 ) { +fprintf (stderr,"More than one binary blob, not supported\n" ); +return 0 ; } -/* Simple kwimage.cfg file parser */ - lineno=0 ; -while ((getline (&line, &len, fd)) >0 ) { - lineno++; - token =strtok_r (line,"\r\n" , &saveptr1); -/* drop all lines with zero tokens (= empty lines) */ -if (token ==NULL ) -continue ; +if (image_count_options (IMAGE_CFG_PAYLOAD ) >1 ) { +fprintf (stderr,"More than one payload, not possible\n" ); +return 0 ; + } -for (j =0 , cmd =CMD_INVALID , line = token; ; line =NULL ) { - token =strtok_r (line," \t" , &saveptr2); -if (token ==NULL ) -break ; -/* Drop all text starting with '#' as comments */ -if (token[0 ] =='#' ) -break ; + binarye =image_find_option (IMAGE_CFG_BINARY ); +if (binarye) { +struct stat s; + + ret =stat (binarye->binary.file, &s); +if (ret <0 ) { +char *cwd =get_current_dir_name (); +fprintf (stderr, +"Didn't find the file '%s' in '%s' which is mandatory to generate the image\n" +"This file generally contains the DDR3 training code, and should be extracted from an existing bootable\n" +"image for your board. See 'kwbimage -x' to extract it from an existing image.\n" , + binarye->binary.file, cwd); +free (cwd); +return 0 ; + } -/* Process rest as valid config command line */ -switch (j) { -case CFG_COMMAND : - cmd =get_table_entry_id (kwbimage_cmds, -"Kwbimage command" , token); + headersz += s.st_size + + binarye->binary.nargs *sizeof (unsigned int ); +if (hasext) + *hasext =1 ; + } -if (cmd ==CMD_INVALID ) - goto INVL_CMD; -break ; +/* +* The payload should be aligned on some reasonable +* boundary +*/ +return ALIGN_SUP (headersz,4096 ); +} -case CFG_DATA0 : -kwbimage_check_cfgdata (token, cmd, kwbhdr); -break ; +static void *image_create_v1 (size_t *imagesz,struct image_tool_params *params, +int payloadsz) +{ +struct image_cfg_element *e, *binarye; +struct main_hdr_v1 *main_hdr; +size_t headersz; +void *image, *cur; +int hasext =0 ; +int ret; + +/* +* Calculate the size of the header and the size of the +* payload +*/ + headersz =image_headersz_v1 (params, &hasext); +if (headersz ==0 ) +return NULL ; + + image =malloc (headersz); +if (!image) { +fprintf (stderr,"Cannot allocate memory for image\n" ); +return NULL ; + } -case CFG_DATA1 : -if (cmd !=CMD_DATA ) - goto INVL_CMD; - - exthdr->rcfg[datacmd_cnt].rdata = -check_get_hexval (token); - -if (datacmd_cnt >KWBIMAGE_MAX_CONFIG ) { -printf ("Error:%s[%d] - Found more " -"than max(%zd) allowed " -"data configurations\n" , - fname, lineno, -KWBIMAGE_MAX_CONFIG ); -exit (EXIT_FAILURE ); - }else - datacmd_cnt++; -break ; +memset (image,0 , headersz); + + cur = main_hdr = image; + cur +=sizeof (struct main_hdr_v1 ); + +/* Fill the main header */ + main_hdr->blocksize = payloadsz - headersz +sizeof (uint32_t ); + main_hdr->headersz_lsb = headersz &0xFFFF ; + main_hdr->headersz_msb = (headersz &0xFFFF0000 ) >>16 ; + main_hdr->destaddr = params->addr; + main_hdr->execaddr = params->ep; + main_hdr->srcaddr = headersz; + main_hdr->ext = hasext; + main_hdr->version =1 ; + e =image_find_option (IMAGE_CFG_BOOT_FROM ); +if (e) + main_hdr->blockid = e->bootfrom; + e =image_find_option (IMAGE_CFG_NAND_BLKSZ ); +if (e) + main_hdr->nandblocksize = e->nandblksz / (64 *1024 ); + e =image_find_option (IMAGE_CFG_NAND_BADBLK_LOCATION ); +if (e) + main_hdr->nandbadblklocation = e->nandbadblklocation; + + binarye =image_find_option (IMAGE_CFG_BINARY ); +if (binarye) { +struct opt_hdr_v1 *hdr = cur; +unsigned int *args; +size_t binhdrsz; +struct stat s; +int argi; +FILE *bin; + + hdr->headertype =OPT_HDR_V1_BINARY_TYPE ; + + bin =fopen (binarye->binary.file,"r" ); +if (!bin) { +fprintf (stderr,"Cannot open binary file %s\n" , + binarye->binary.file); +return NULL ; + } + +fstat (fileno (bin), &s); + + binhdrsz =sizeof (struct opt_hdr_v1 ) + + (binarye->binary.nargs +1 ) *sizeof (unsigned int ) + + s.st_size; + hdr->headersz_lsb = binhdrsz &0xFFFF ; + hdr->headersz_msb = (binhdrsz &0xFFFF0000 ) >>16 ; + + cur +=sizeof (struct opt_hdr_v1 ); + + args = cur; + *args = binarye->binary.nargs; + args++; +for (argi =0 ; argi < binarye->binary.nargs; argi++) + args[argi] = binarye->binary.args[argi]; + + cur += (binarye->binary.nargs +1 ) *sizeof (unsigned int ); + + ret =fread (cur, s.st_size,1 , bin); +if (ret !=1 ) { +fprintf (stderr, +"Could not read binary image %s\n" , + binarye->binary.file); +return NULL ; + } + +fclose (bin); -default : - goto INVL_CMD; + cur += s.st_size; + +/* +* For now, we don't support more than one binary +* header, and no other header types are +* supported. So, the binary header is necessarily the +* last one +*/ + *((unsigned char *)cur) =0 ; + + cur +=sizeof (uint32_t ); + } + +/* Calculate and set the header checksum */ + main_hdr->checksum =image_checksum8 (main_hdr, headersz); + + *imagesz = headersz; +return image; +} + +static int image_create_config_parse_oneline (char *line, +struct image_cfg_element *el) +{ +char *keyword, *saveptr; +char deliminiters[] =" \t" ; + + keyword =strtok_r (line, deliminiters, &saveptr); +if (!strcmp (keyword,"VERSION" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_VERSION ; + el->version =atoi (value); + }else if (!strcmp (keyword,"BOOT_FROM" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_BOOT_FROM ; + el->bootfrom =image_boot_mode_id (value); +if (el->bootfrom <0 ) { +fprintf (stderr, +"Invalid boot media '%s'\n" , value); +return -1 ; + } + }else if (!strcmp (keyword,"NAND_BLKSZ" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_NAND_BLKSZ ; + el->nandblksz =strtoul (value,NULL ,16 ); + }else if (!strcmp (keyword,"NAND_BADBLK_LOCATION" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_NAND_BADBLK_LOCATION ; + el->nandbadblklocation = +strtoul (value,NULL ,16 ); + }else if (!strcmp (keyword,"NAND_ECC_MODE" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_NAND_ECC_MODE ; + el->nandeccmode =image_nand_ecc_mode_id (value); +if (el->nandeccmode <0 ) { +fprintf (stderr, +"Invalid NAND ECC mode '%s'\n" , value); +return -1 ; + } + }else if (!strcmp (keyword,"NAND_PAGE_SIZE" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); + el->type =IMAGE_CFG_NAND_PAGESZ ; + el->nandpagesz =strtoul (value,NULL ,16 ); + }else if (!strcmp (keyword,"BINARY" )) { +char *value =strtok_r (NULL , deliminiters, &saveptr); +int argi =0 ; + + el->type =IMAGE_CFG_BINARY ; + el->binary.file =strdup (value); +while (1 ) { + value =strtok_r (NULL , deliminiters, &saveptr); +if (!value) +break ; + el->binary.args[argi] =strtoul (value,NULL ,16 ); + argi++; +if (argi >=BINARY_MAX_ARGS ) { +fprintf (stderr, +"Too many argument for binary\n" ); +return -1 ; } - j++; } + el->binary.nargs = argi; + }else if (!strcmp (keyword,"DATA" )) { +char *value1 =strtok_r (NULL , deliminiters, &saveptr); +char *value2 =strtok_r (NULL , deliminiters, &saveptr); + +if (!value1 || !value2) { +fprintf (stderr, +"Invalid number of arguments for DATA\n" ); +return -1 ; + } + + el->type =IMAGE_CFG_DATA ; + el->regdata.raddr =strtoul (value1,NULL ,16 ); + el->regdata.rdata =strtoul (value2,NULL ,16 ); + }else { +fprintf (stderr,"Ignoring unknown line '%s'\n" , line); } -if (line) -free (line); -fclose (fd); -return ; +return 0 ; +}/* -* Invalid Command error reporring -* -* command CMD_DATA needs three strings on a line -* whereas other commands need only two. -* -* if more than two/three (as per command type) are observed, -* then error will be reported +* Parse the configuration file 'fcfg' into the array of configuration +* elements 'image_cfg', and return the number of configuration +* elements in 'cfgn'. */ -INVL_CMD: -printf ("Error:%s[%d] - Invalid command\n" , fname, lineno); -exit (EXIT_FAILURE ); +static int image_create_config_parse (FILE *fcfg) +{ +int ret; +int cfgi =0 ; + +/* Parse the configuration file */ +while (!feof (fcfg)) { +char *line; +char buf[256 ]; + +/* Read the current line */ +memset (buf,0 ,sizeof (buf)); + line =fgets (buf,sizeof (buf), fcfg); +if (!line) +break ; + +/* Ignore useless lines */ +if (line[0 ] =='\n' || line[0 ] =='#' ) +continue ; + +/* Strip final newline */ +if (line[strlen (line) -1 ] =='\n' ) + line[strlen (line) -1 ] =0 ; + +/* Parse the current line */ + ret =image_create_config_parse_oneline (line, + &image_cfg[cfgi]); +if (ret) +return ret; + + cfgi++; + +if (cfgi >=IMAGE_CFG_ELEMENT_MAX ) { +fprintf (stderr, +"Too many configuration elements in .cfg file\n" ); +return -1 ; + } + } + + cfgn = cfgi; +return 0 ; +} + +static int image_get_version (void ) +{ +struct image_cfg_element *e; + + e =image_find_option (IMAGE_CFG_VERSION ); +if (!e) +return -1 ; + +return e->version; +} + +static int image_version_file (const char *input) +{ +FILE *fcfg; +int version; +int ret; + + fcfg =fopen (input,"r" ); +if (!fcfg) { +fprintf (stderr,"Could not open input file %s\n" , input); +return -1 ; + } + + image_cfg =malloc (IMAGE_CFG_ELEMENT_MAX * +sizeof (struct image_cfg_element )); +if (!image_cfg) { +fprintf (stderr,"Cannot allocate memory\n" ); +fclose (fcfg); +return -1 ; + } + +memset (image_cfg,0 , +IMAGE_CFG_ELEMENT_MAX *sizeof (struct image_cfg_element )); +rewind (fcfg); + + ret =image_create_config_parse (fcfg); +fclose (fcfg); +if (ret) { +free (image_cfg); +return -1 ; + } + + version =image_get_version (); +/* Fallback to version 0 is no version is provided in the cfg file */ +if (version ==-1 ) + version =0 ; + +free (image_cfg); + +return version; } -static void kwbimage_set_header (void *ptr,struct stat *sbuf,int ifd, +static void kwbimage_set_header (void *ptr,struct stat *sbuf,int ifd,struct image_tool_params *params) { -struct kwb_header *hdr = (struct kwb_header *)ptr; -bhr_t *mhdr = &hdr->kwb_hdr; -extbhr_t *exthdr = &hdr->kwb_exthdr; +FILE *fcfg; +void *image =NULL ; +int version; +size_t headersz;uint32_t checksum; +int ret;int size; -/* Build and add image checksum header */ - checksum =kwbimage_checksum32 ((uint32_t *)ptr, sbuf->st_size,0 ); + fcfg =fopen (params->imagename,"r" ); +if (!fcfg) { +fprintf (stderr,"Could not open input file %s\n" , + params->imagename); +exit (EXIT_FAILURE ); + } + + image_cfg =malloc (IMAGE_CFG_ELEMENT_MAX * +sizeof (struct image_cfg_element )); +if (!image_cfg) { +fprintf (stderr,"Cannot allocate memory\n" ); +fclose (fcfg); +exit (EXIT_FAILURE ); + } + +memset (image_cfg,0 , +IMAGE_CFG_ELEMENT_MAX *sizeof (struct image_cfg_element )); +rewind (fcfg); + + ret =image_create_config_parse (fcfg); +fclose (fcfg); +if (ret) { +free (image_cfg); +exit (EXIT_FAILURE ); + } + + version =image_get_version (); +/* Fallback to version 0 is no version is provided in the cfg file */ +if (version ==-1 ) + version =0 ; + +if (version ==0 ) + image =image_create_v0 (&headersz, params, sbuf->st_size); +else if (version ==1 ) + image =image_create_v1 (&headersz, params, sbuf->st_size); + +if (!image) { +fprintf (stderr,"Could not create image\n" ); +free (image_cfg); +exit (EXIT_FAILURE ); + } + +free (image_cfg); - size =write (ifd, &checksum,sizeof (uint32_t )); +/* Build and add image checksum header */ + checksum =image_checksum32 ((uint32_t *)ptr, sbuf->st_size); + size =write (ifd, &checksum,sizeof (uint32_t ));if (size !=sizeof (uint32_t )) { -printf ("Error:%s - Checksum write %d bytes %s\n" , +fprintf (stderr,"Error:%s - Checksum write %d bytes %s\n" , params->cmdname, size, params->imagefile); -exit (EXIT_FAILURE ); +exit (EXIT_FAILURE ); } sbuf->st_size +=sizeof (uint32_t ); - mhdr->blocksize = sbuf->st_size -sizeof (struct kwb_header ); - mhdr->srcaddr =sizeof (struct kwb_header ); - mhdr->destaddr= params->addr; - mhdr->execaddr =params->ep; - mhdr->ext =0x1 ;/* header extension appended */ - -kwdimage_set_ext_header (hdr, params->imagename); -/* calculate checksums */ - mhdr->checkSum =kwbimage_checksum8 ((void *)mhdr,sizeof (bhr_t),0 ); - exthdr->checkSum =kwbimage_checksum8 ((void *)exthdr, -sizeof (extbhr_t),0 ); -} - -static int kwbimage_verify_header (unsigned char *ptr,int image_size, -struct image_tool_params *params) -{ -struct kwb_header *hdr = (struct kwb_header *)ptr; -bhr_t *mhdr = &hdr->kwb_hdr; -extbhr_t *exthdr = &hdr->kwb_exthdr; -uint8_t calc_hdrcsum; -uint8_t calc_exthdrcsum; - - calc_hdrcsum =kwbimage_checksum8 ((void *)mhdr, -sizeof (bhr_t) -sizeof (uint8_t ),0 ); -if (calc_hdrcsum != mhdr->checkSum) -return -FDT_ERR_BADSTRUCTURE ;/* mhdr csum not matched */ - - calc_exthdrcsum =kwbimage_checksum8 ((void *)exthdr, -sizeof (extbhr_t) -sizeof (uint8_t ),0 ); -if (calc_exthdrcsum != exthdr->checkSum) -return -FDT_ERR_BADSTRUCTURE ;/* exthdr csum not matched */ +/* Finally copy the header into the image area */ +memcpy (ptr, image, headersz); -return 0 ; +free (image); } -static void kwbimage_print_header (const void *ptr) +static void kwbimage_print_header (const void *ptr) { -struct kwb_header *hdr = (struct kwb_header *) ptr; -bhr_t *mhdr = &hdr->kwb_hdr; -char *name =get_table_entry_name (kwbimage_bootops, -"Kwbimage boot option" , - (int ) mhdr->blockid); - -printf ("Image Type: Kirkwood Boot from %s Image\n" , name); -printf ("Data Size: " ); -genimg_print_size (mhdr->blocksize -sizeof (uint32_t )); -printf ("Load Address: %08x\n" , mhdr->destaddr); -printf ("Entry Point: %08x\n" , mhdr->execaddr); +struct main_hdr_v0 *mhdr = (struct main_hdr_v0 *)ptr; + +printf ("Image Type: MVEBU Boot from %s Image\n" , +image_boot_mode_name (mhdr->blockid)); +printf ("Data Size: " ); +printf ("Image version:%d\n" ,image_version ((void *)ptr)); +genimg_print_size (mhdr->blocksize -sizeof (uint32_t )); +printf ("Load Address: %08x\n" , mhdr->destaddr); +printf ("Entry Point: %08x\n" , mhdr->execaddr); } -static int kwbimage_check_image_types (uint8_t type) +static int kwbimage_check_image_types (uint8_t type) {if (type ==IH_TYPE_KWBIMAGE )return EXIT_SUCCESS ;
@@ -366,18 +807,91 @@ static int kwbimage_check_image_types (uint8_t type)return EXIT_FAILURE ; } +static int kwbimage_verify_header (unsigned char *ptr,int image_size, +struct image_tool_params *params) +{ +struct main_hdr_v0 *main_hdr; +struct ext_hdr_v0 *ext_hdr; +uint8_t checksum; + + main_hdr = (void *)ptr; + checksum =image_checksum8 (ptr, +sizeof (struct main_hdr_v0 )); +if (checksum != main_hdr->checksum) +return -FDT_ERR_BADSTRUCTURE ; + +/* Only version 0 extended header has checksum */ +if (image_version ((void *)ptr) ==0 ) { + ext_hdr = (void *)ptr +sizeof (struct main_hdr_v0 ); + checksum =image_checksum8 (ext_hdr, +sizeof (struct ext_hdr_v0 )); +if (checksum != ext_hdr->checksum) +return -FDT_ERR_BADSTRUCTURE ; + } + +return 0 ; +} + +static int kwbimage_generate (struct image_tool_params *params, +struct image_type_params *tparams) +{ +int alloc_len; +void *hdr; +int version =0 ; + + version =image_version_file (params->imagename); +if (version ==0 ) { + alloc_len =sizeof (struct main_hdr_v0 ) + +sizeof (struct ext_hdr_v0 ); + }else { + alloc_len =image_headersz_v1 (params,NULL ); + } + + hdr =malloc (alloc_len); +if (!hdr) { +fprintf (stderr,"%s: malloc return failure: %s\n" , + params->cmdname,strerror (errno)); +exit (EXIT_FAILURE ); + } + +memset (hdr,0 , alloc_len); + tparams->header_size = alloc_len; + tparams->hdr = hdr; + +return 0 ; +} + +/* +* Report Error if xflag is set in addition to default +*/ +static int kwbimage_check_params (struct image_tool_params *params) +{ +if (!strlen (params->imagename)) { +fprintf (stderr,"Error:%s - Configuration file not specified, " +"it is needed for kwbimage generation\n" , + params->cmdname); +return CFG_INVALID ; + } + +return (params->dflag && (params->fflag || params->lflag)) || + (params->fflag && (params->dflag || params->lflag)) || + (params->lflag && (params->dflag || params->fflag)) || + (params->xflag) || !(strlen (params->imagename)); +} +/* * kwbimage type parameters definition */ static struct image_type_params kwbimage_params = { - .name ="Kirkwood Boot Image support" , - .header_size =sizeof (struct kwb_header ), - .hdr = (void *)&kwbimage_header, + .name ="Marvell MVEBU Boot Image support" , + .header_size =0 ,/* no fixed header size */ + .hdr =NULL , + .vrec_header = kwbimage_generate, .check_image_type = kwbimage_check_image_types, - .verify_header = kwbimage_verify_header, - .print_header = kwbimage_print_header, - .set_header = kwbimage_set_header, - .check_params = kwbimage_check_params, + .verify_header = kwbimage_verify_header, + .print_header = kwbimage_print_header, + .set_header = kwbimage_set_header, + .check_params = kwbimage_check_params, };void init_kwb_image_type (void )
Signature · 1 line
2.0.1
PATCH 24/25 tools: kwbimage: Add image version 1 support for Armada XP / 370
Quoted 17 lines · Stefan Roese
This patch integrates the Barebox version of this
kwbimage.cfile into U-Boot. As this version supports the image version 1 type for the Armada XP / 370 SoCs.It was easier to integrate the existing and known to be working Barebox source than to update the current U-Boot version to support this v1 image header format. Now all Marvell MVEBU SoCs are supported:
Image type 0: Kirkwood & Dove
Image type 1: Armada 370 & Armada XPPlease note that the current v1 support has this restuction (same as has Barebox version):
Not implemented: support for the register headers and secure headers in v1 images
Quoted 7 lines
Tested on Marvell DB-78460-BP eval board.
Signed-off-by Stefan Roese <[email protected]>---
tools/kwbimage.c | 1050 ++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 782 insertions(+), 268 deletions(-)
Luka
PATCH 25/25 Makefile: Add CONFIG_BUILD_TARGET to automatically build an special image
In reply to Stefan RoeseAdd target to build it automatically upon "make" / MAKEALL. This can/should be set by board / cpu specific headers if a special U-Boot image is required for this SoC / board.
E.g. used by Marvell Armada XP to automatically build the u-boot.kwb target.
---
Makefile | 5 +++++ README | 8 ++++++++ 2 files changed, 13 insertions(+)
Makefile +5 -0
@@ -742,6 +742,11 @@ endif endif endif +# Add optional build target if defined in board/cpu/soc headers +ifneq ($(CONFIG_BUILD_TARGET),) +ALL-y += $(CONFIG_BUILD_TARGET:"%"=%) +endif + LDFLAGS_u-boot += $(LDFLAGS_FINAL) ifneq ($(CONFIG_SYS_TEXT_BASE),) LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
README +8 -0
@@ -2657,6 +2657,14 @@ CBFS (Coreboot Filesystem) support 200 ms. - Configuration Management: + CONFIG_BUILD_TARGET + + Some SoCs need special image types (e.g. U-Boot binary + with a special header) as build targets. By defining + CONFIG_BUILD_TARGET in the SoC / board header, this + special image will be automatically built upon calling + make / MAKEALL. + CONFIG_IDENT_STRING If defined, this string will be added to the U-Boot
Signature · 1 line
2.0.1
cover Add Marvell Armada XP MV78460 SoC support
In reply to Stefan RoeseQuoted 44 lines
-----Original Message-----
From: Stefan Roese [mailto:sr at denx.de]
Sent: 27 June 2014 15:25
To: u-boot at lists.denx.de
Cc: Prafulla Wadaskar; trini at ti.com
Subject: [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC supportThis patch series adds support for the Marvell Armada XP SoC's. Specifically
the MV78460.Basic support for the db-78460-bp evaluation board is added. Supporting the
following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)While doing this port, I tried to consolidate common Marvell code into
thearch/arm/mvebu-commondirectory. This directory should be used to
collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370,
Armada 380, Armada XP). I started with Kirkwood and some of its
interfaces. Dove is definitely a candidate to move some of its code
into thise directory as well.Because of the renaming of some functions from kirkwood to mvebu (to make
them better usable on other MVEBU SoCs), this patch series not only
touches the ARM SoC specific files (inarch/arm/...). But also some
device drivers (e.g. SPI, I2C). Separating these driver specific patches
into different patches that are not depending on this
Quoted 8 lines
ARM patch series
seems hard if not impossible. Thats why I would really like to get this
patch series to get applied completely be one custodian. Not sure if
this could / should go through Tom directly? Only if all the subsystem
custodians have given their "Acked-by ..." of course.
Hi Stefan,
I agree with you, since this patch series have huge changes it may go to Tom directly, I will review, test and provide ack/nack accordingly.
Quoted 8 lines
Testing on Kirkwood based boards would be greatly appreciated. So anyone with
access to some of those board, please give this patch series a try. I really
hope that I didn't break anything while merging some of the code into the
common mvebu directory.
I will certainly help to test testing this stuff on all possible boards that I can access.
Quoted 16 lines
Please note that this Armada XP port still requires the "Binary Header"
(bin_hdr) from the Marvell U-Boot tree to be included as a binary blob
into the resulting image (u-boot.kwb) that can be booted by the MVEBU
BootROM. This binarybin_hdris usually responsible for the DDR3
controller configuration and the DDR3 training. One way to extract thisbin_hdrbinary from an existing Marvell boot image right now is to use
the "kwbimage" tool from Barebox. Please refer to the documentation
thats available there for more details.
Finally, last but not least, may thanks for your efforts and all the best for smooth migration ahead.
Regards...
Prafulla . . .
Quoted 207 lines
Thanks,
StefanStefan Roese (25):
sf: Add M25PX64 SPI NOR flash ID
arm: kirkwood:spi.h: Add some missing parenthesis
spi:kirkwood_spi.c: Some fixes and cleanup
spi:kirkwood_spi.c: Make global variable static
spi:kirkwood_spi.c: cosmetic: Fix minor coding style
issues
arm: kirkwood: Move some SoC files into newarch/arm/mvebu-common
arm: marvell: Movearch/kirkwood.htoarch/soc.h
arm: marvell: Movearch-kirkwood/spi.hto arch-mvebu/spi.h
arm: marvell: Reworktimer.cto make it usable for
other MVEBU
platforms
arm: mvebu: Add common mbus functions to use on
Marvell SoCs
spi:kirkwood_spi.c: Compile MPP (pin-mux) only for
kirkwood SoC's
arm: marvell: Extract kirkwood gpio functions into
new common file
gpio.c
spi:kirkwood_spi.c: ChangeKW_SPI_BASEtoMVEBU_SPI_BASE
arm: kirkwood: Change naming of dram functions fromkm_foo()tomvebu_foo()net:
mvneta.c: Add support for the ethernet
controller of the Marvell
Armada XP SoC
net:phy.h: Make PHY autonegotiation timeout
configurable
i2c: mvtwsi: Add support for Marvell Armada XP
arm: armada-xp: Add basic support for Marvell Armada
XP SoC
arm: armada-xp: Add basic support for the Marvell DB-
78460-BP board
arm: kirkwood: Remove some dead code fromcpu.c
arm: kirkwood: Use mvebu new common mbus APItools/kwboot: Sync with latest barebox version to
support Armada XP
tools: Compile kwboot for Marvell Armada XP as those
SoCs are now
supported
tools: kwbimage: Add image version 1 support for
Armada XP / 370
Makefile: AddCONFIG_BUILD_TARGETto automatically
build an special
image
Makefile|
9 +
README |
8 +
arch/arm/cpu/arm926ejs/kirkwood/Makefile|
4 +-
arch/arm/cpu/arm926ejs/kirkwood/cpu.c|
174 +--
arch/arm/cpu/arm926ejs/kirkwood/mpp.c|
2 +-
arch/arm/cpu/armv7/armada-xp/Makefile|
7 +
arch/arm/cpu/armv7/armada-xp/cpu.c|
186 +++
arch/arm/include/asm/arch-armada-xp/config.h|
80 +
arch/arm/include/asm/arch-armada-xp/cpu.h|
103 ++
arch/arm/include/asm/arch-armada-xp/soc.h|
57 +
arch/arm/include/asm/arch-kirkwood/config.h|
2 +-
arch/arm/include/asm/arch-kirkwood/cpu.h|
71 +-
arch/arm/include/asm/arch-kirkwood/gpio.h|
16 +-
.../asm/arch-kirkwood/{kirkwood.h=>soc.h} |
25 +-
.../asm/{arch-kirkwood =>arch-mvebu}/spi.h|
8 +-
arch/arm/mvebu-common/Makefile|
12 +
.../arm926ejs/kirkwood =>mvebu-common}/dram.c|
63 +-
arch/arm/mvebu-common/gpio.c|
30 +
arch/arm/mvebu-common/mbus.c|
477 ++++++
.../arm926ejs/kirkwood =>mvebu-common}/timer.c|
92 +-
board/LaCie/net2big_v2/net2big_v2.c|
8 +-
board/LaCie/netspace_v2/netspace_v2.c|
8 +-
board/LaCie/wireless_space/wireless_space.c|
8 +-
board/Marvell/db-78460-bp/Makefile |
7 +
board/Marvell/db-78460-bp/db-78460-bp.c|
120 ++
board/Marvell/db-78460-bp/kwbimage.cfg |
12 +
board/Marvell/dreamplug/dreamplug.c|
10 +-
board/Marvell/guruplug/guruplug.c|
10 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c|
10 +-
board/Marvell/openrd/openrd.c|
10 +-
board/Marvell/rd6281a/rd6281a.c|
10 +-
board/Marvell/sheevaplug/sheevaplug.c|
10 +-
board/Seagate/dockstar/dockstar.c|
12 +-
board/Seagate/goflexhome/goflexhome.c|
12 +-
board/buffalo/lsxl/lsxl.c|
10 +-
board/cloudengines/pogo_e02/pogo_e02.c|
10 +-
board/d-link/dns325/dns325.c|
8 +-
board/iomega/iconnect/iconnect.c|
10 +-
board/karo/tk71/tk71.c|
10 +-
board/keymile/km_arm/km_arm.c|
10 +-
board/raidsonic/ib62x0/ib62x0.c|
10 +-
boards.cfg |
1 +
drivers/block/mvsata_ide.c|
2 +-
drivers/gpio/kw_gpio.c|
2 +-
drivers/i2c/mvtwsi.c|
4 +-
drivers/mtd/nand/kirkwood_nand.c|
2 +-
drivers/mtd/spi/sf_params.c|
1 +
drivers/net/Makefile|
1 +
drivers/net/mvgbe.c|
2 +-
drivers/net/mvneta.c|
1653 ++++++++++++++++++++
drivers/rtc/mvrtc.h|
2 +-
drivers/spi/kirkwood_spi.c|
44 +-
drivers/usb/host/ehci-marvell.c|
45 +-
include/configs/db-78460-bp.h|
67 +
include/linux/mbus.h|
61 +
include/netdev.h|
1 +
include/phy.h|
2 +
tools/Makefile|
1 +
tools/kwbimage.c|
1050 +++++++++----
tools/kwboot.c|
97 +-60 files changed, 4056 insertions(+), 723 deletions(-) create mode 100644 arch/arm/cpu/armv7/armada- xp/Makefile create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c create mode 100644 arch/arm/include/asm/arch-armada- xp/config.h create mode 100644 arch/arm/include/asm/arch-armada- xp/cpu.h create mode 100644 arch/arm/include/asm/arch-armada- xp/soc.h rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h => soc.h} (74%) rename arch/arm/include/asm/{arch-kirkwood => arch- mvebu}/spi.h (90%) create mode 100644 arch/arm/mvebu-common/Makefile rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu- common}/dram.c (57%) create mode 100644 arch/arm/mvebu-common/gpio.c create mode 100644 arch/arm/mvebu-common/mbus.c rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu- common}/timer.c (63%) create mode 100644 board/Marvell/db-78460-bp/Makefile create mode 100644 board/Marvell/db-78460-bp/db-78460- bp.c create mode 100644 board/Marvell/db-78460- bp/kwbimage.cfg create mode 100644 drivers/net/mvneta.c create mode 100644 include/configs/db-78460-bp.h create mode 100644 include/linux/mbus.h--
2.0.1
cover Add Marvell Armada XP MV78460 SoC support
Quoted 84 lines · Prafulla Wadaskar
Quoted 44 lines
-----Original Message-----
From: Stefan Roese [mailto:sr at denx.de]
Sent: 27 June 2014 15:25
To: u-boot at lists.denx.de
Cc: Prafulla Wadaskar; trini at ti.com
Subject: [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC supportThis patch series adds support for the Marvell Armada XP SoC's. Specifically
the MV78460.Basic support for the db-78460-bp evaluation board is added. Supporting the
following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)While doing this port, I tried to consolidate common Marvell code into
thearch/arm/mvebu-commondirectory. This directory should be used to
collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370,
Armada 380, Armada XP). I started with Kirkwood and some of its
interfaces. Dove is definitely a candidate to move some of its code
into thise directory as well.Because of the renaming of some functions from kirkwood to mvebu (to make
them better usable on other MVEBU SoCs), this patch series not only
touches the ARM SoC specific files (inarch/arm/...). But also some
device drivers (e.g. SPI, I2C). Separating these driver specific patches
into different patches that are not depending on thisQuoted 8 lines
ARM patch series
seems hard if not impossible. Thats why I would really like to get this
patch series to get applied completely be one custodian. Not sure if
this could / should go through Tom directly? Only if all the subsystem
custodians have given their "Acked-by ..." of course.Hi Stefan,
I agree with you, since this patch series have huge changes it may go to Tom directly, I will review, test and provide ack/nack accordingly.Quoted 8 lines
Testing on Kirkwood based boards would be greatly appreciated. So anyone with
access to some of those board, please give this patch series a try. I really
hope that I didn't break anything while merging some of the code into the
common mvebu directory.I will certainly help to test testing this stuff on all possible boards that I can access.
Quoted 16 lines
Please note that this Armada XP port still requires the "Binary Header"
(bin_hdr) from the Marvell U-Boot tree to be included as a binary blob
into the resulting image (u-boot.kwb) that can be booted by the MVEBU
BootROM. This binarybin_hdris usually responsible for the DDR3
controller configuration and the DDR3 training. One way to extract thisbin_hdrbinary from an existing Marvell boot image right now is to use
the "kwbimage" tool from Barebox. Please refer to the documentation
thats available there for more details.
Quoted 17 lines
Finally, last but not least, may thanks for your efforts and all the best for smooth migration ahead.
Regards...
Prafulla . . .Quoted 12 lines
Thanks,
StefanStefan Roese (25):
sf: Add M25PX64 SPI NOR flash ID
arm: kirkwood:spi.h: Add some missing parenthesis
spi:kirkwood_spi.c: Some fixes and cleanup
spi:kirkwood_spi.c: Make global variable static
spi:kirkwood_spi.c: cosmetic: Fix minor coding style
issues
I took these spi stuff patches, rest of spi require dependencies - So I Acked.
Pls- Tom or someone push those as well while taking this series.
Quoted 184 lines
Quoted 184 lines
arm: kirkwood: Move some SoC files into new
arch/arm/mvebu-common
arm: marvell: Movearch/kirkwood.htoarch/soc.h
arm: marvell: Movearch-kirkwood/spi.hto arch-mvebu/spi.h
arm: marvell: Reworktimer.cto make it usable for
other MVEBU
platforms
arm: mvebu: Add common mbus functions to use on
Marvell SoCs
spi:kirkwood_spi.c: Compile MPP (pin-mux) only for
kirkwood SoC's
arm: marvell: Extract kirkwood gpio functions into
new common file
gpio.c
spi:kirkwood_spi.c: ChangeKW_SPI_BASEtoMVEBU_SPI_BASE
arm: kirkwood: Change naming of dram functions fromkm_foo()tomvebu_foo()net:
mvneta.c: Add support for the ethernet
controller of the Marvell
Armada XP SoC
net:phy.h: Make PHY autonegotiation timeout
configurable
i2c: mvtwsi: Add support for Marvell Armada XP
arm: armada-xp: Add basic support for Marvell Armada
XP SoC
arm: armada-xp: Add basic support for the Marvell DB-
78460-BP board
arm: kirkwood: Remove some dead code fromcpu.c
arm: kirkwood: Use mvebu new common mbus APItools/kwboot: Sync with latest barebox version to
support Armada XP
tools: Compile kwboot for Marvell Armada XP as those
SoCs are now
supported
tools: kwbimage: Add image version 1 support for
Armada XP / 370
Makefile: AddCONFIG_BUILD_TARGETto automatically
build an special
image
Makefile|
9 +
README |
8 +
arch/arm/cpu/arm926ejs/kirkwood/Makefile|
4 +-
arch/arm/cpu/arm926ejs/kirkwood/cpu.c|
174 +--
arch/arm/cpu/arm926ejs/kirkwood/mpp.c|
2 +-
arch/arm/cpu/armv7/armada-xp/Makefile|
7 +
arch/arm/cpu/armv7/armada-xp/cpu.c|
186 +++
arch/arm/include/asm/arch-armada-xp/config.h|
80 +
arch/arm/include/asm/arch-armada-xp/cpu.h|
103 ++
arch/arm/include/asm/arch-armada-xp/soc.h|
57 +
arch/arm/include/asm/arch-kirkwood/config.h|
2 +-
arch/arm/include/asm/arch-kirkwood/cpu.h|
71 +-
arch/arm/include/asm/arch-kirkwood/gpio.h|
16 +-
.../asm/arch-kirkwood/{kirkwood.h=>soc.h} |
25 +-
.../asm/{arch-kirkwood =>arch-mvebu}/spi.h|
8 +-
arch/arm/mvebu-common/Makefile|
12 +
.../arm926ejs/kirkwood =>mvebu-common}/dram.c|
63 +-
arch/arm/mvebu-common/gpio.c|
30 +
arch/arm/mvebu-common/mbus.c|
477 ++++++
.../arm926ejs/kirkwood =>mvebu-common}/timer.c|
92 +-
board/LaCie/net2big_v2/net2big_v2.c|
8 +-
board/LaCie/netspace_v2/netspace_v2.c|
8 +-
board/LaCie/wireless_space/wireless_space.c|
8 +-
board/Marvell/db-78460-bp/Makefile |
7 +
board/Marvell/db-78460-bp/db-78460-bp.c|
120 ++
board/Marvell/db-78460-bp/kwbimage.cfg |
12 +
board/Marvell/dreamplug/dreamplug.c|
10 +-
board/Marvell/guruplug/guruplug.c|
10 +-
board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c|
10 +-
board/Marvell/openrd/openrd.c|
10 +-
board/Marvell/rd6281a/rd6281a.c|
10 +-
board/Marvell/sheevaplug/sheevaplug.c|
10 +-
board/Seagate/dockstar/dockstar.c|
12 +-
board/Seagate/goflexhome/goflexhome.c|
12 +-
board/buffalo/lsxl/lsxl.c|
10 +-
board/cloudengines/pogo_e02/pogo_e02.c|
10 +-
board/d-link/dns325/dns325.c|
8 +-
board/iomega/iconnect/iconnect.c|
10 +-
board/karo/tk71/tk71.c|
10 +-
board/keymile/km_arm/km_arm.c|
10 +-
board/raidsonic/ib62x0/ib62x0.c|
10 +-
boards.cfg |
1 +
drivers/block/mvsata_ide.c|
2 +-
drivers/gpio/kw_gpio.c|
2 +-
drivers/i2c/mvtwsi.c|
4 +-
drivers/mtd/nand/kirkwood_nand.c|
2 +-
drivers/mtd/spi/sf_params.c|
1 +
drivers/net/Makefile|
1 +
drivers/net/mvgbe.c|
2 +-
drivers/net/mvneta.c|
1653 ++++++++++++++++++++
drivers/rtc/mvrtc.h|
2 +-
drivers/spi/kirkwood_spi.c|
44 +-
drivers/usb/host/ehci-marvell.c|
45 +-
include/configs/db-78460-bp.h|
67 +
include/linux/mbus.h|
61 +
include/netdev.h|
1 +
include/phy.h|
2 +
tools/Makefile|
1 +
tools/kwbimage.c|
1050 +++++++++----
tools/kwboot.c|
97 +-60 files changed, 4056 insertions(+), 723 deletions(-) create mode 100644 arch/arm/cpu/armv7/armada- xp/Makefile create mode 100644 arch/arm/cpu/armv7/armada-xp/cpu.c create mode 100644 arch/arm/include/asm/arch-armada- xp/config.h create mode 100644 arch/arm/include/asm/arch-armada- xp/cpu.h create mode 100644 arch/arm/include/asm/arch-armada- xp/soc.h rename arch/arm/include/asm/arch-kirkwood/{kirkwood.h => soc.h} (74%) rename arch/arm/include/asm/{arch-kirkwood => arch- mvebu}/spi.h (90%) create mode 100644 arch/arm/mvebu-common/Makefile rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu- common}/dram.c (57%) create mode 100644 arch/arm/mvebu-common/gpio.c create mode 100644 arch/arm/mvebu-common/mbus.c rename arch/arm/{cpu/arm926ejs/kirkwood => mvebu-
common}/timer.c(63%)
Quoted 8 lines
Quoted 8 lines
create mode 100644 board/Marvell/db-78460-bp/Makefile create mode 100644 board/Marvell/db-78460-bp/db-78460- bp.c create mode 100644 board/Marvell/db-78460- bp/kwbimage.cfg create mode 100644 drivers/net/mvneta.c create mode 100644 include/configs/db-78460-bp.h create mode 100644 include/linux/mbus.h
thanks!
Signature · 1 line
Jagan.
cover Add Marvell Armada XP MV78460 SoC support
Quoted 103 lines · Jagan Teki
Quoted 84 lines · Prafulla Wadaskar
Quoted 44 lines
-----Original Message-----
From: Stefan Roese [mailto:sr at denx.de]
Sent: 27 June 2014 15:25
To: u-boot at lists.denx.de
Cc: Prafulla Wadaskar; trini at ti.com
Subject: [PATCH v1 0/25] Add Marvell Armada XP MV78460 SoC supportThis patch series adds support for the Marvell Armada XP SoC's. Specifically
the MV78460.Basic support for the db-78460-bp evaluation board is added. Supporting the
following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)While doing this port, I tried to consolidate common Marvell code into
thearch/arm/mvebu-commondirectory. This directory should be used to
collect more common code for the MVEBU SoC's (Dove, Kirkwood, Armada 370,
Armada 380, Armada XP). I started with Kirkwood and some of its
interfaces. Dove is definitely a candidate to move some of its code
into thise directory as well.Because of the renaming of some functions from kirkwood to mvebu (to make
them better usable on other MVEBU SoCs), this patch series not only
touches the ARM SoC specific files (inarch/arm/...). But also some
device drivers (e.g. SPI, I2C). Separating these driver specific patches
into different patches that are not depending on thisQuoted 8 lines
ARM patch series
seems hard if not impossible. Thats why I would really like to get this
patch series to get applied completely be one custodian. Not sure if
this could / should go through Tom directly? Only if all the subsystem
custodians have given their "Acked-by ..." of course.Hi Stefan,
I agree with you, since this patch series have huge changes it may go to Tom directly, I will review, test and provide ack/nack accordingly.Quoted 8 lines
Testing on Kirkwood based boards would be greatly appreciated. So anyone with
access to some of those board, please give this patch series a try. I really
hope that I didn't break anything while merging some of the code into the
common mvebu directory.I will certainly help to test testing this stuff on all possible boards that I can access.
Quoted 16 lines
Please note that this Armada XP port still requires the "Binary Header"
(bin_hdr) from the Marvell U-Boot tree to be included as a binary blob
into the resulting image (u-boot.kwb) that can be booted by the MVEBU
BootROM. This binarybin_hdris usually responsible for the DDR3
controller configuration and the DDR3 training. One way to extract thisbin_hdrbinary from an existing Marvell boot image right now is to use
the "kwbimage" tool from Barebox. Please refer to the documentation
thats available there for more details.Quoted 17 lines
Finally, last but not least, may thanks for your efforts and all the best for smooth migration ahead.
Regards...
Prafulla . . .Quoted 12 lines
Thanks,
StefanStefan Roese (25):
sf: Add M25PX64 SPI NOR flash ID
arm: kirkwood:spi.h: Add some missing parenthesis
spi:kirkwood_spi.c: Some fixes and cleanup
spi:kirkwood_spi.c: Make global variable static
spi:kirkwood_spi.c: cosmetic: Fix minor coding style
issues
Quoted 3 lines
I took these spi stuff patches, rest of spi require dependencies - So I Acked.
Pls- Tom or someone push those as well while taking this series.
FWIW, in the future I'm fine with things like this coming in via the ARM SoC sub-tree with acks/reviewed-by's from the relevant other subsystem maintainers, to make dependencies easier.
Signature · 8 lines
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