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some additions for the edmqmx6 board

PATCH Superseded Silvio Fricke 2 participants 17 messages Jun 30, 2014 – Jul 2, 2014

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#0 lore raw

cover some additions for the edmqmx6 board

Hi,

please add this patches to your imx-tree.

Is it possible to add the first patch to your current imx-fixes branch? The boards give some warnings of unresolved depencies like "gpio-leds: Driver leds-gpio requests probe deferral" . With these patches it is gone.

Thank you and bye,
Silvio

Silvio Fricke (5):
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx6: edmqmx6: Add two other i2c busses
ARM: dts: imx6: edmqmx6: Add can bus
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 54 +++++++++++++++++++++++++++++++++
 arch/arm/configs/imx_v6_v7_defconfig    |  3 ++
 2 files changed, 57 insertions(+)
Signature · 1 line
2.0.0
#1 lore raw

PATCH 1/5 ARM: imx_v6_v7_defconfig: Enable STMPE gpio support

Enable STMPE gpio support as this is used on MX6 Data Modul edm-qmx6 board.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -0
index 96e8417..c331de8 100644
@@ -162,6 +162,7 @@ CONFIG_SPI=y
 CONFIG_SPI_IMX=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_MC9S08DZ60=y
+CONFIG_GPIO_STMPE=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_IMX2_WDT=y
Signature · 1 line
2.0.0
#2 lore raw

PATCH 2/5 ARM: dts: imx6: edmqmx6: Add PCIe support

In reply to Silvio Fricke

Add support for the PCI express bus available on MX6 Data Modul edm-qmx6 board.

---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +13 -0
index e030263..b0dd50b 100644
@@ -323,6 +323,12 @@
 			>;
 		};
 
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x80000000
+			>;
+		};
+
 		pinctrl_pfuze: pfuze100grp1 {
 			fsl,pins = <
 				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
@@ -385,6 +391,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio4 8 0>;
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
Signature · 1 line
2.0.0
#3 lore raw

PATCH 2/5 ARM: dts: imx6: edmqmx6: Add PCIe support

Quoted 13 lines · Silvio Fricke

Add support for the PCI express bus available on MX6 Data Modul edm-qmx6 board.

---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +0 -0
index e030263..b0dd50b 100644

arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts line 328

Quoted 6 lines
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +3 -0
@@ -323,6 +323,12 @@
 			>;
 		};
 
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x80000000

I know it's been used a lot, but I would start requesting to put a real pad config value instead of 0x80000000, so that the kernel does not depend on the value coming out of hardware reset or bootloader.

Shawn

Quoted 23 lines
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +10 -0
+			>;
+		};
+
 		pinctrl_pfuze: pfuze100grp1 {
 			fsl,pins = <
 				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
@@ -385,6 +391,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio4 8 0>;
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
Signature · 1 line
2.0.0
#4 lore raw

PATCH 3/5 ARM: dts: imx6: edmqmx6: Add two other i2c buses

In reply to Silvio Fricke
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +28 -0
index b0dd50b..b98fd74 100644
@@ -118,6 +118,13 @@
 	status = "okay";
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
 &i2c2 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -274,6 +281,13 @@
 	};
 };
 
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
@@ -316,6 +330,13 @@
 			>;
 		};
 
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
+			>;
+		};
+
 		pinctrl_i2c2: i2c2grp {
 			fsl,pins = <
 				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
@@ -323,6 +344,13 @@
 			>;
 		};
 
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
 		pinctrl_pcie: pciegrp {
 			fsl,pins = <
 				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x80000000
Signature · 1 line
2.0.0
#5 lore raw

PATCH 4/5 ARM: dts: imx6: edmqmx6: Add can bus

In reply to Silvio Fricke
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +13 -0
index b98fd74..8ead662 100644
@@ -95,6 +95,12 @@
 	};
 };
 
+&can1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_can1>;
+	status = "okay";
+};
+
 &ecspi5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi5>;
@@ -300,6 +306,13 @@
 			>;
 		};
 
+		pinctrl_can1: can1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x80000000
+				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x80000000
+			>;
+		};
+
 		pinctrl_ecspi5: ecspi5rp-1 {
 			fsl,pins = <
 				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
Signature · 1 line
2.0.0
#6 lore raw

PATCH 4/5 ARM: dts: imx6: edmqmx6: Add can bus

Quoted 23 lines · Silvio Fricke
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +6 -0
index b98fd74..8ead662 100644
@@ -95,6 +95,12 @@
 	};
 };
 
+&can1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_can1>;
+	status = "okay";
+};
+
 &ecspi5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi5>;

arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts line 312

Quoted 7 lines
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +4 -0
@@ -300,6 +306,13 @@
 			>;
 		};
 
+		pinctrl_can1: can1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x80000000
+				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x80000000

Same here. Please configure the pads properly.

Shawn

Quoted 9 lines
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +3 -0
+			>;
+		};
+
 		pinctrl_ecspi5: ecspi5rp-1 {
 			fsl,pins = <
 				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
Signature · 1 line
2.0.0
#7 lore raw

PATCH 5/5 ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

In reply to Silvio Fricke
---
 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/imx_v6_v7_defconfig +2 -0
index c331de8..88877226 100644
@@ -69,6 +69,8 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_LRO is not set
 CONFIG_IPV6=y
 CONFIG_NETFILTER=y
+CONFIG_CAN=m
+CONFIG_CAN_FLEXCAN=m
 CONFIG_CFG80211=y
 CONFIG_MAC80211=y
 CONFIG_RFKILL=y
Signature · 1 line
2.0.0
#8 lore raw

PATCH 5/5 ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

Quoted 10 lines · Silvio Fricke
---
 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/imx_v6_v7_defconfig +0 -0
index c331de8..88877226 100644

arch/arm/configs/imx_v6_v7_defconfig CONFIG_IP_PNP_DHCP=y · line 73

Quoted 5 lines
arch/arm/configs/imx_v6_v7_defconfig +2 -0
@@ -69,6 +69,8 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_LRO is not set
 CONFIG_IPV6=y
 CONFIG_NETFILTER=y
+CONFIG_CAN=m
+CONFIG_CAN_FLEXCAN=m

Would it be better to have them as 'y'? It gets more chance to be compile-tested since zImage build is more often than module build.

Shawn

Quoted 6 lines
arch/arm/configs/imx_v6_v7_defconfig +0 -0
 CONFIG_CFG80211=y
 CONFIG_MAC80211=y
 CONFIG_RFKILL=y
Signature · 1 line
2.0.0
#9 lore raw

cover some additions for the edmqmx6 board

In reply to Silvio Fricke
Quoted 5 lines · Silvio Fricke

Hi,

please add this patches to your imx-tree.

Is it possible to add the first patch to your current imx-fixes branch?

No. Since it's already -rc3, arm-soc folks will require the patches going into -rc fix critical bugs or regressions.

Shawn

Quoted 24 lines

The
boards give some warnings of unresolved depencies like "gpio-leds: Driver leds-gpio requests probe deferral" . With these patches it is gone.

Thank you and bye,
Silvio

Silvio Fricke (5):
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx6: edmqmx6: Add two other i2c busses
ARM: dts: imx6: edmqmx6: Add can bus
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 54 +++++++++++++++++++++++++++++++++
 arch/arm/configs/imx_v6_v7_defconfig    |  3 ++
 2 files changed, 57 insertions(+)
Signature · 1 line
2.0.0
#10 lore raw

v2 cover some additions for the edmqmx6 board

In reply to Silvio Fricke

Hi,

please add this patches to your imx-tree.

v2:
* add changes suggested by Shawn Guo
* iomux config changed for can and pcie-reset gpio
* flexcan not as module

Thank you and bye,
Silvio

Silvio Fricke (5):
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx6: edmqmx6: Add two other i2c buses
ARM: dts: imx6: edmqmx6: Add can bus
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 54 +++++++++++++++++++++++++++++++++
 arch/arm/configs/imx_v6_v7_defconfig    |  3 ++
 2 files changed, 57 insertions(+)
Signature · 1 line
2.0.0
#11 lore raw

PATCH v2 1/5 ARM: imx_v6_v7_defconfig: Enable STMPE gpio support

Enable STMPE gpio support as this is used on MX6 Data Modul edm-qmx6 board.

---
 arch/arm/configs/imx_v6_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/imx_v6_v7_defconfig +1 -0
index 96e8417..c331de8 100644
@@ -162,6 +162,7 @@ CONFIG_SPI=y
 CONFIG_SPI_IMX=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_MC9S08DZ60=y
+CONFIG_GPIO_STMPE=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_IMX2_WDT=y
Signature · 1 line
2.0.0
#12 lore raw

PATCH v2 2/5 ARM: dts: imx6: edmqmx6: Add PCIe support

In reply to Silvio Fricke

Add support for the PCI express bus available on MX6 Data Modul edm-qmx6 board.

---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +13 -0
index e030263..f36dab0 100644
@@ -323,6 +323,12 @@
 			>;
 		};
 
+		pinctrl_pcie: pciegrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1
+			>;
+		};
+
 		pinctrl_pfuze: pfuze100grp1 {
 			fsl,pins = <
 				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
@@ -385,6 +391,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pcie>;
+	reset-gpio = <&gpio4 8 0>;
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
Signature · 1 line
2.0.0
#13 lore raw

PATCH v2 3/5 ARM: dts: imx6: edmqmx6: Add two other i2c buses

In reply to Silvio Fricke
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +28 -0
index f36dab0..dd9ef16 100644
@@ -118,6 +118,13 @@
 	status = "okay";
 };
 
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+};
+
 &i2c2 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -274,6 +281,13 @@
 	};
 };
 
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
@@ -316,6 +330,13 @@
 			>;
 		};
 
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
+				MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
+			>;
+		};
+
 		pinctrl_i2c2: i2c2grp {
 			fsl,pins = <
 				MX6QDL_PAD_EIM_EB2__I2C2_SCL		0x4001b8b1
@@ -323,6 +344,13 @@
 			>;
 		};
 
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
+			>;
+		};
+
 		pinctrl_pcie: pciegrp {
 			fsl,pins = <
 				MX6QDL_PAD_KEY_COL1__GPIO4_IO08		0x100b1
Signature · 1 line
2.0.0
#14 lore raw

PATCH v2 4/5 ARM: dts: imx6: edmqmx6: Add can bus

In reply to Silvio Fricke
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +13 -0
index dd9ef16..8c1cb53 100644
@@ -95,6 +95,12 @@
 	};
 };
 
+&can1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_can1>;
+	status = "okay";
+};
+
 &ecspi5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi5>;
@@ -300,6 +306,13 @@
 			>;
 		};
 
+		pinctrl_can1: can1grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
+				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
+			>;
+		};
+
 		pinctrl_ecspi5: ecspi5rp-1 {
 			fsl,pins = <
 				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
Signature · 1 line
2.0.0
#15 lore raw

PATCH v2 5/5 ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

In reply to Silvio Fricke
---
 arch/arm/configs/imx_v6_v7_defconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/configs/imx_v6_v7_defconfig +2 -0
index c331de8..4283393 100644
@@ -69,6 +69,8 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_LRO is not set
 CONFIG_IPV6=y
 CONFIG_NETFILTER=y
+CONFIG_CAN=y
+CONFIG_CAN_FLEXCAN=y
 CONFIG_CFG80211=y
 CONFIG_MAC80211=y
 CONFIG_RFKILL=y
Signature · 1 line
2.0.0
Applied
#16 lore raw

v2 cover some additions for the edmqmx6 board

In reply to Silvio Fricke
Quoted 13 lines · Silvio Fricke

Hi,

please add this patches to your imx-tree.

v2:
* add changes suggested by Shawn Guo
* iomux config changed for can and pcie-reset gpio
* flexcan not as module

Thank you and bye,
Silvio

Quoted 6 lines

Silvio Fricke (5):
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx6: edmqmx6: Add two other i2c buses
ARM: dts: imx6: edmqmx6: Add can bus
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support

Applied all, thanks.