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usb: host: xhci: make sure to power up PHY

PATCH New Felipe Balbi 2 participants 4 messages Jul 10, 2014

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#0 lore raw

PATCH 1/2 usb: host: xhci: make sure to power up PHY

some boards won't work if the PHY isn't explicitly powered up.

---
 drivers/usb/host/xhci-omap.c | 1 +
 1 file changed, 1 insertion(+)
drivers/usb/host/xhci-omap.c +1 -0
index e667810..912b2bd 100644
@@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap)
 {
 	int ret = 0;
 
+	usb_phy_power(1);
 	omap_enable_phy(omap);
 
 	ret = dwc3_core_init(omap->dwc3_reg);
Signature · 1 line
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#1 lore raw

PATCH 2/2 usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.

---
 arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +++++
 drivers/usb/phy/omap_usb_phy.c                     | 11 ++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +5 -0
index b470319..efdecf4 100644
@@ -43,6 +43,11 @@
 #define VTP0_CTRL_ADDR			0x44E10E0C
 #define VTP1_CTRL_ADDR			0x48140E10
 
+/* USB CTRL Base Address */
+#define USB1_CTRL			0x44e10628
+#define USB1_CTRL_CM_PWRDN		BIT(0)
+#define USB1_CTRL_OTG_PWRDN		BIT(1)
+
 /* DDR Base address */
 #define DDR_PHY_CMD_ADDR		0x44E12000
 #define DDR_PHY_DATA_ADDR		0x44E120C8
drivers/usb/phy/omap_usb_phy.c +10 -1
index af46db2..53778b3 100644
@@ -222,7 +222,16 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
 
 void usb_phy_power(int on)
 {
-	return;
+	/*
+	 * In order to get USB working on newer AM43xx silicon, we must
+	 * explicitly power the USB PHYs.
+	 */
+	if (on)
+		clrbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
+	else
+		setbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
 }
 #endif /* CONFIG_AM437X_USB2PHY2_HOST */
 
Signature · 1 line
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#2 lore raw

PATCH 2/2 usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

Quoted 6 lines · Felipe Balbi

Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.

---

the only change here is the use of {set,clr}bits_le32()

Quoted 45 lines
 arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +++++
 drivers/usb/phy/omap_usb_phy.c                     | 11 ++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +5 -0
index b470319..efdecf4 100644
@@ -43,6 +43,11 @@
 #define VTP0_CTRL_ADDR			0x44E10E0C
 #define VTP1_CTRL_ADDR			0x48140E10
 
+/* USB CTRL Base Address */
+#define USB1_CTRL			0x44e10628
+#define USB1_CTRL_CM_PWRDN		BIT(0)
+#define USB1_CTRL_OTG_PWRDN		BIT(1)
+
 /* DDR Base address */
 #define DDR_PHY_CMD_ADDR		0x44E12000
 #define DDR_PHY_DATA_ADDR		0x44E120C8
drivers/usb/phy/omap_usb_phy.c +10 -1
index af46db2..53778b3 100644
@@ -222,7 +222,16 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
 
 void usb_phy_power(int on)
 {
-	return;
+	/*
+	 * In order to get USB working on newer AM43xx silicon, we must
+	 * explicitly power the USB PHYs.
+	 */
+	if (on)
+		clrbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
+	else
+		setbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
 }
 #endif /* CONFIG_AM437X_USB2PHY2_HOST */
 
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Signature · 8 lines
balbi
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#3 lore raw

PATCH 2/2 usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

Quoted 9 lines · Felipe Balbi
Quoted 6 lines · Felipe Balbi

Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.

---

the only change here is the use of {set,clr}bits_le32()

Well, given the pressure before release, I picked the previous one (without clrsetbits). I think the original will also generate less code, so let's keep it at that. Sorry I've been pushing you around.

Best regards,
Marek Vasut