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Add ASRC Peripheral to Peripheral driver

RFC PATCH In review Nicolin Chen 2 participants 6 messages Jun 13, 2014 – Jul 24, 2014

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Nicolin Chen

author reviewer
#0 lore raw

cover Add ASRC Peripheral to Peripheral driver

This series of patches have a direct dependency between them. So we might need to push them into one branch. And sorry for this :(

Patch-1 adds device to device support in SDMA driver along with a secondary request in struct imx_dma_data which's requred in the Patch-2 ASRC driver.

Nicolin Chen (2):
dma: imx-sdma: Add device to device support
ASoC: fsl_asrc: Add ASRC ASoC CPU DAI and platform drivers

 .../devicetree/bindings/sound/fsl,asrc.txt         |   62 ++
 drivers/dma/imx-sdma.c                             |   40 +-
 include/linux/platform_data/dma-imx.h              |    1 +
 sound/soc/fsl/Kconfig                              |    9 +
 sound/soc/fsl/Makefile                             |    2 +
 sound/soc/fsl/fsl_asrc.c                           | 1031 ++++++++++++++++++++
 sound/soc/fsl/fsl_asrc.h                           |  431 ++++++++
 sound/soc/fsl/fsl_asrc_dma.c                       |  385 ++++++++
 8 files changed, 1956 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/fsl,asrc.txt
 create mode 100644 sound/soc/fsl/fsl_asrc.c
 create mode 100644 sound/soc/fsl/fsl_asrc.h
 create mode 100644 sound/soc/fsl/fsl_asrc_dma.c
Signature · 1 line
1.8.4
author reviewer
#1 lore raw

RFC PATCH 1/2 dma: imx-sdma: Add device to device support

This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data tranfer between two peripheral FIFOs. The per_2_per script requires two peripheral addresses and two DMA requests. So this patch also adds them into private structure.

---
 drivers/dma/imx-sdma.c                | 40 ++++++++++++++++++++++++++++++-----
 include/linux/platform_data/dma-imx.h |  1 +
 2 files changed, 36 insertions(+), 5 deletions(-)
drivers/dma/imx-sdma.c +35 -5
index 85561dc..5af1a69 100644
@@ -258,8 +258,9 @@ struct sdma_channel {
 	struct sdma_buffer_descriptor	*bd;
 	dma_addr_t			bd_phys;
 	unsigned int			pc_from_device, pc_to_device;
+	unsigned int			device_to_device;
 	unsigned long			flags;
-	dma_addr_t			per_address;
+	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
 	unsigned long			watermark_level;
 	u32				shp_addr, per_addr;
@@ -696,6 +697,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
+	sdmac->device_to_device = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
@@ -770,6 +772,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
+	sdmac->device_to_device = per_2_per;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -782,11 +785,12 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 	int ret;
 	unsigned long flags;
 
-	if (sdmac->direction == DMA_DEV_TO_MEM) {
+	if (sdmac->direction == DMA_DEV_TO_MEM)
 		load_address = sdmac->pc_from_device;
-	} else {
+	else if (sdmac->direction == DMA_DEV_TO_DEV)
+		load_address = sdmac->device_to_device;
+	else
 		load_address = sdmac->pc_to_device;
-	}
 
 	if (load_address < 0)
 		return load_address;
@@ -850,6 +854,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		sdma_event_enable(sdmac, sdmac->event_id0);
 	}
 
+	if (sdmac->event_id1) {
+		if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)
+			return -EINVAL;
+		sdma_event_enable(sdmac, sdmac->event_id1);
+	}
+
 	switch (sdmac->peripheral_type) {
 	case IMX_DMATYPE_DSP:
 		sdma_config_ownership(sdmac, false, true, true);
@@ -880,7 +890,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		/* Watermark Level */
 		sdmac->watermark_level |= sdmac->watermark_level;
 		/* Address */
-		sdmac->shp_addr = sdmac->per_address;
+		if (sdmac->direction == DMA_DEV_TO_DEV) {
+			sdmac->shp_addr = sdmac->per_address2;
+			sdmac->per_addr = sdmac->per_address;
+		} else {
+			sdmac->shp_addr = sdmac->per_address;
+		}
 	} else {
 		sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */
 	}
@@ -974,6 +989,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 
 	sdmac->peripheral_type = data->peripheral_type;
 	sdmac->event_id0 = data->dma_request;
+	sdmac->event_id1 = data->dma_request2;
 
 	clk_enable(sdmac->sdma->clk_ipg);
 	clk_enable(sdmac->sdma->clk_ahb);
@@ -1213,6 +1229,19 @@ static int sdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
 			sdmac->watermark_level = dmaengine_cfg->src_maxburst *
 						dmaengine_cfg->src_addr_width;
 			sdmac->word_size = dmaengine_cfg->src_addr_width;
+		} else if (dmaengine_cfg->direction == DMA_DEV_TO_DEV) {
+			sdmac->per_address = dmaengine_cfg->src_addr;
+			sdmac->per_address2 = dmaengine_cfg->dst_addr;
+			/*
+			 * For per_2_per sciprt, register r7 requires two
+			 * watermark levels: the lower placed at bits [0-7]
+			 * and the higher one placed at bits [16-23].
+			 */
+			sdmac->watermark_level =
+				dmaengine_cfg->src_maxburst & 0xff;
+			sdmac->watermark_level |=
+				(dmaengine_cfg->dst_maxburst & 0xff) << 16;
+			sdmac->word_size = dmaengine_cfg->dst_addr_width;
 		} else {
 			sdmac->per_address = dmaengine_cfg->dst_addr;
 			sdmac->watermark_level = dmaengine_cfg->dst_maxburst *
@@ -1433,6 +1462,7 @@ static struct dma_chan *sdma_xlate(struct of_phandle_args *dma_spec,
 	data.dma_request = dma_spec->args[0];
 	data.peripheral_type = dma_spec->args[1];
 	data.priority = dma_spec->args[2];
+	data.dma_request2 = 0;
 
 	return dma_request_channel(mask, sdma_filter_fn, &data);
 }
include/linux/platform_data/dma-imx.h +1 -0
index 7aa0e89..6a1357d 100644
@@ -51,6 +51,7 @@ enum imx_dma_prio {
 
 struct imx_dma_data {
 	int dma_request; /* DMA request line */
+	int dma_request2; /* secondary DMA request line */
 	enum sdma_peripheral_type peripheral_type;
 	int priority;
 };
Signature · 1 line
1.8.4
#2 lore raw

Re: [RFC][PATCH 1/2] dma: imx-sdma: Add device to device support

Quoted 6 lines · Nicolin Chen

This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data tranfer between two peripheral FIFOs. The per_2_per script requires two peripheral addresses and two DMA requests. So this patch also adds them into private structure.

Excuse me, the patch has been here for two weeks. Could anyone please give a comment or an Ack on it?

Thank you,
Nicolin

Quoted 130 lines
---
 drivers/dma/imx-sdma.c                | 40 ++++++++++++++++++++++++++++++-----
 include/linux/platform_data/dma-imx.h |  1 +
 2 files changed, 36 insertions(+), 5 deletions(-)
drivers/dma/imx-sdma.c +35 -5
index 85561dc..5af1a69 100644
@@ -258,8 +258,9 @@ struct sdma_channel {
 	struct sdma_buffer_descriptor	*bd;
 	dma_addr_t			bd_phys;
 	unsigned int			pc_from_device, pc_to_device;
+	unsigned int			device_to_device;
 	unsigned long			flags;
-	dma_addr_t			per_address;
+	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
 	unsigned long			watermark_level;
 	u32				shp_addr, per_addr;
@@ -696,6 +697,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
+	sdmac->device_to_device = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
@@ -770,6 +772,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
+	sdmac->device_to_device = per_2_per;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -782,11 +785,12 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 	int ret;
 	unsigned long flags;
 
-	if (sdmac->direction == DMA_DEV_TO_MEM) {
+	if (sdmac->direction == DMA_DEV_TO_MEM)
 		load_address = sdmac->pc_from_device;
-	} else {
+	else if (sdmac->direction == DMA_DEV_TO_DEV)
+		load_address = sdmac->device_to_device;
+	else
 		load_address = sdmac->pc_to_device;
-	}
 
 	if (load_address < 0)
 		return load_address;
@@ -850,6 +854,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		sdma_event_enable(sdmac, sdmac->event_id0);
 	}
 
+	if (sdmac->event_id1) {
+		if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)
+			return -EINVAL;
+		sdma_event_enable(sdmac, sdmac->event_id1);
+	}
+
 	switch (sdmac->peripheral_type) {
 	case IMX_DMATYPE_DSP:
 		sdma_config_ownership(sdmac, false, true, true);
@@ -880,7 +890,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		/* Watermark Level */
 		sdmac->watermark_level |= sdmac->watermark_level;
 		/* Address */
-		sdmac->shp_addr = sdmac->per_address;
+		if (sdmac->direction == DMA_DEV_TO_DEV) {
+			sdmac->shp_addr = sdmac->per_address2;
+			sdmac->per_addr = sdmac->per_address;
+		} else {
+			sdmac->shp_addr = sdmac->per_address;
+		}
 	} else {
 		sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */
 	}
@@ -974,6 +989,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 
 	sdmac->peripheral_type = data->peripheral_type;
 	sdmac->event_id0 = data->dma_request;
+	sdmac->event_id1 = data->dma_request2;
 
 	clk_enable(sdmac->sdma->clk_ipg);
 	clk_enable(sdmac->sdma->clk_ahb);
@@ -1213,6 +1229,19 @@ static int sdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
 			sdmac->watermark_level = dmaengine_cfg->src_maxburst *
 						dmaengine_cfg->src_addr_width;
 			sdmac->word_size = dmaengine_cfg->src_addr_width;
+		} else if (dmaengine_cfg->direction == DMA_DEV_TO_DEV) {
+			sdmac->per_address = dmaengine_cfg->src_addr;
+			sdmac->per_address2 = dmaengine_cfg->dst_addr;
+			/*
+			 * For per_2_per sciprt, register r7 requires two
+			 * watermark levels: the lower placed at bits [0-7]
+			 * and the higher one placed at bits [16-23].
+			 */
+			sdmac->watermark_level =
+				dmaengine_cfg->src_maxburst & 0xff;
+			sdmac->watermark_level |=
+				(dmaengine_cfg->dst_maxburst & 0xff) << 16;
+			sdmac->word_size = dmaengine_cfg->dst_addr_width;
 		} else {
 			sdmac->per_address = dmaengine_cfg->dst_addr;
 			sdmac->watermark_level = dmaengine_cfg->dst_maxburst *
@@ -1433,6 +1462,7 @@ static struct dma_chan *sdma_xlate(struct of_phandle_args *dma_spec,
 	data.dma_request = dma_spec->args[0];
 	data.peripheral_type = dma_spec->args[1];
 	data.priority = dma_spec->args[2];
+	data.dma_request2 = 0;
 
 	return dma_request_channel(mask, sdma_filter_fn, &data);
 }
include/linux/platform_data/dma-imx.h +1 -0
index 7aa0e89..6a1357d 100644
@@ -51,6 +51,7 @@ enum imx_dma_prio {
 
 struct imx_dma_data {
 	int dma_request; /* DMA request line */
+	int dma_request2; /* secondary DMA request line */
 	enum sdma_peripheral_type peripheral_type;
 	int priority;
 };
Signature · 1 line
1.8.4
#3 lore raw

Re: [RFC][PATCH 1/2] dma: imx-sdma: Add device to device support

In reply to Nicolin Chen
Quoted 6 lines · Nicolin Chen

This patch adds DEV_TO_DEV support for i.MX SDMA driver to support data tranfer between two peripheral FIFOs. The per_2_per script requires two peripheral addresses and two DMA requests. So this patch also adds them into private structure.

Hi Vinod,

The patch has been here for a month without any comment.

Could you please help on the review or give me an ack?

I really hope my ASRC driver will be merged within this cycle.

Thank you,
Nicolin

Quoted 130 lines
---
 drivers/dma/imx-sdma.c                | 40 ++++++++++++++++++++++++++++++-----
 include/linux/platform_data/dma-imx.h |  1 +
 2 files changed, 36 insertions(+), 5 deletions(-)
drivers/dma/imx-sdma.c +35 -5
index 85561dc..5af1a69 100644
@@ -258,8 +258,9 @@ struct sdma_channel {
 	struct sdma_buffer_descriptor	*bd;
 	dma_addr_t			bd_phys;
 	unsigned int			pc_from_device, pc_to_device;
+	unsigned int			device_to_device;
 	unsigned long			flags;
-	dma_addr_t			per_address;
+	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
 	unsigned long			watermark_level;
 	u32				shp_addr, per_addr;
@@ -696,6 +697,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
+	sdmac->device_to_device = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
@@ -770,6 +772,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
+	sdmac->device_to_device = per_2_per;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -782,11 +785,12 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 	int ret;
 	unsigned long flags;
 
-	if (sdmac->direction == DMA_DEV_TO_MEM) {
+	if (sdmac->direction == DMA_DEV_TO_MEM)
 		load_address = sdmac->pc_from_device;
-	} else {
+	else if (sdmac->direction == DMA_DEV_TO_DEV)
+		load_address = sdmac->device_to_device;
+	else
 		load_address = sdmac->pc_to_device;
-	}
 
 	if (load_address < 0)
 		return load_address;
@@ -850,6 +854,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		sdma_event_enable(sdmac, sdmac->event_id0);
 	}
 
+	if (sdmac->event_id1) {
+		if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)
+			return -EINVAL;
+		sdma_event_enable(sdmac, sdmac->event_id1);
+	}
+
 	switch (sdmac->peripheral_type) {
 	case IMX_DMATYPE_DSP:
 		sdma_config_ownership(sdmac, false, true, true);
@@ -880,7 +890,12 @@ static int sdma_config_channel(struct sdma_channel *sdmac)
 		/* Watermark Level */
 		sdmac->watermark_level |= sdmac->watermark_level;
 		/* Address */
-		sdmac->shp_addr = sdmac->per_address;
+		if (sdmac->direction == DMA_DEV_TO_DEV) {
+			sdmac->shp_addr = sdmac->per_address2;
+			sdmac->per_addr = sdmac->per_address;
+		} else {
+			sdmac->shp_addr = sdmac->per_address;
+		}
 	} else {
 		sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */
 	}
@@ -974,6 +989,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 
 	sdmac->peripheral_type = data->peripheral_type;
 	sdmac->event_id0 = data->dma_request;
+	sdmac->event_id1 = data->dma_request2;
 
 	clk_enable(sdmac->sdma->clk_ipg);
 	clk_enable(sdmac->sdma->clk_ahb);
@@ -1213,6 +1229,19 @@ static int sdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
 			sdmac->watermark_level = dmaengine_cfg->src_maxburst *
 						dmaengine_cfg->src_addr_width;
 			sdmac->word_size = dmaengine_cfg->src_addr_width;
+		} else if (dmaengine_cfg->direction == DMA_DEV_TO_DEV) {
+			sdmac->per_address = dmaengine_cfg->src_addr;
+			sdmac->per_address2 = dmaengine_cfg->dst_addr;
+			/*
+			 * For per_2_per sciprt, register r7 requires two
+			 * watermark levels: the lower placed at bits [0-7]
+			 * and the higher one placed at bits [16-23].
+			 */
+			sdmac->watermark_level =
+				dmaengine_cfg->src_maxburst & 0xff;
+			sdmac->watermark_level |=
+				(dmaengine_cfg->dst_maxburst & 0xff) << 16;
+			sdmac->word_size = dmaengine_cfg->dst_addr_width;
 		} else {
 			sdmac->per_address = dmaengine_cfg->dst_addr;
 			sdmac->watermark_level = dmaengine_cfg->dst_maxburst *
@@ -1433,6 +1462,7 @@ static struct dma_chan *sdma_xlate(struct of_phandle_args *dma_spec,
 	data.dma_request = dma_spec->args[0];
 	data.peripheral_type = dma_spec->args[1];
 	data.priority = dma_spec->args[2];
+	data.dma_request2 = 0;
 
 	return dma_request_channel(mask, sdma_filter_fn, &data);
 }
include/linux/platform_data/dma-imx.h +1 -0
index 7aa0e89..6a1357d 100644
@@ -51,6 +51,7 @@ enum imx_dma_prio {
 
 struct imx_dma_data {
 	int dma_request; /* DMA request line */
+	int dma_request2; /* secondary DMA request line */
 	enum sdma_peripheral_type peripheral_type;
 	int priority;
 };
Signature · 1 line
1.8.4
author reviewer
#4 lore raw

RFC PATCH 2/2 ASoC: fsl_asrc: Add ASRC ASoC CPU DAI and platform drivers

In reply to Nicolin Chen

The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a signal associated with an input clock into a signal associated with a different output clock. The driver currently works as a Front End of DPCM with other Back Ends DAI links such as ESAI<->CS42888 and SSI<->WM8962 and SAI. It converts the original sample rate to a common rate supported by Back Ends for playback while converts the common rate of Back Ends to a desired rate. It has three pairs to support three different substreams within totally 10 channels.

---

------!RFC!-----
A disscusstion should be made regarding asrc-rate and asrc-width bindings. It's currently put in ASRC which makes these two parameters fixed for all Back Ends. It may be better to put them into sound nodes (machine driver's). However, I can't find a good approach to pass them back into ASRC driver. ------!RFC!-----

 .../devicetree/bindings/sound/fsl,asrc.txt         |   62 ++
 sound/soc/fsl/Kconfig                              |    9 +
 sound/soc/fsl/Makefile                             |    2 +
 sound/soc/fsl/fsl_asrc.c                           | 1031 ++++++++++++++++++++
 sound/soc/fsl/fsl_asrc.h                           |  431 ++++++++
 sound/soc/fsl/fsl_asrc_dma.c                       |  385 ++++++++
 6 files changed, 1920 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/fsl,asrc.txt
 create mode 100644 sound/soc/fsl/fsl_asrc.c
 create mode 100644 sound/soc/fsl/fsl_asrc.h
 create mode 100644 sound/soc/fsl/fsl_asrc_dma.c
Documentation/devicetree/bindings/sound/fsl,asrc.txt new file +62 -0
new file mode 100644
index 0000000..637028c
@@ -0,0 +1,62 @@
+Freescale Asynchronous Sample Rate Converter (ASRC) Controller
+
+The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
+signal associated with an input clock into a signal associated with a different
+output clock. The driver currently works as a Front End of DPCM with other Back
+Ends Audio controller such as ESAI, SSI and SAI. It has three pairs to support
+three substreams within totally 10 channels.
+
+Required properties:
+
+  - compatible : Compatible list, must contain "fsl,imx35-asrc" or
+    "fsl,imx53-asrc".
+
+  - reg : Offset and length of the register set for the device.
+
+  - interrupts : Contains the spdif interrupt.
+
+  - dmas : Generic dma devicetree binding as described in
+	   Documentation/devicetree/bindings/dma/dma.txt.
+
+  - dma-names : Six dmas have to be defined: "rxa", "rxb", "rxc", "txa", "txb",
+		and "txc".
+
+  - clocks : Contains an entry for each entry in clock-names.
+
+  - clock-names : Includes the following entries:
+	"mem"		Peripheral access clock to access registers.
+	"ipg"		Peripheral clock to driver module.
+	"asrck_<0-f>"	Clock sources for input and output clock.
+
+   - big-endian : If this property is absent, the native endian mode will
+		  be in use as default, or the big endian mode will be in use
+		  for all the device registers.
+
+   - fsl,asrc-rate : Defines a mutual sample rate used by Back End DAI link.
+
+   - fsl,asrc-width : Defines a mutual sample width used by Back End DAI link.
+
+Example:
+
+asrc: asrc@02034000 {
+	compatible = "fsl,imx53-asrc";
+	reg = <0x02034000 0x4000>;
+	interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&clks 107>, <&clks 107>, <&clks 0>,
+	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
+	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
+	       <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
+	       <&clks 107>, <&clks 0>, <&clks 0>;
+	clock-names = "mem", "ipg", "asrck0",
+		"asrck_1", "asrck_2", "asrck_3", "asrck_4",
+		"asrck_5", "asrck_6", "asrck_7", "asrck_8",
+		"asrck_9", "asrck_a", "asrck_b", "asrck_c",
+		"asrck_d", "asrck_e", "asrck_f";
+	dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
+	     <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
+	dma-names = "rxa", "rxb", "rxc",
+		"txa", "txb", "txc";
+	fsl,asrc-rate  = <48000>;
+	fsl,asrc-width = <16>;
+	status = "okay";
+};
sound/soc/fsl/Kconfig +9 -0
index aeccdd4..b269714 100644
@@ -2,6 +2,15 @@ menu "SoC Audio for Freescale CPUs"
 
 comment "Common SoC Audio options for Freescale CPUs:"
 
+config SND_SOC_FSL_ASRC
+	tristate "Asynchronous Sample Rate Converter (ASRC) module support"
+	select REGMAP_MMIO
+	help
+	  Say Y if you want to add Asynchronous Sample Rate Converter (ASRC)
+	  support for the Freescale CPUs.
+	  This option is only useful for out-of-tree drivers since
+	  in-tree drivers select it automatically.
+
 config SND_SOC_FSL_SAI
 	tristate "Synchronous Audio Interface (SAI) module support"
 	select REGMAP_MMIO
sound/soc/fsl/Makefile +2 -0
index ce49570..ff7ee2c 100644
@@ -11,6 +11,7 @@ snd-soc-p1022-rdk-objs := p1022_rdk.o
 obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o
 
 # Freescale SSI/DMA/SAI/SPDIF Support
+snd-soc-fsl-asrc-objs := fsl_asrc.o fsl_asrc_dma.o
 snd-soc-fsl-sai-objs := fsl_sai.o
 snd-soc-fsl-ssi-y := fsl_ssi.o
 snd-soc-fsl-ssi-$(CONFIG_DEBUG_FS) += fsl_ssi_dbg.o
@@ -18,6 +19,7 @@ snd-soc-fsl-spdif-objs := fsl_spdif.o
 snd-soc-fsl-esai-objs := fsl_esai.o
 snd-soc-fsl-utils-objs := fsl_utils.o
 snd-soc-fsl-dma-objs := fsl_dma.o
+obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc.o
 obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o
 obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
 obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
sound/soc/fsl/fsl_asrc.c new file +1031 -0

1,031 lines not on this page · raw message

sound/soc/fsl/fsl_asrc.h new file +431 -0

431 lines not on this page · raw message

sound/soc/fsl/fsl_asrc_dma.c new file +385 -0

385 lines not on this page · raw message

Signature · 1 line
1.8.4
#5 lore raw
In reply to Nicolin Chen
Quoted 5 lines · Nicolin Chen

This series of patches have a direct dependency between them. So we might need to push them into one branch. And sorry for this :(

Patch-1 adds device to device support in SDMA driver along with a secondary request in struct imx_dma_data which's requred in the Patch-2 ASRC driver.

I just sent a new version V2. So please disregard this version.

Thanks all,
Nicolin

Quoted 5 lines

Nicolin Chen (2):
dma: imx-sdma: Add device to device support
ASoC: fsl_asrc: Add ASRC ASoC CPU DAI and platform drivers

Quoted 17 lines
 .../devicetree/bindings/sound/fsl,asrc.txt         |   62 ++
 drivers/dma/imx-sdma.c                             |   40 +-
 include/linux/platform_data/dma-imx.h              |    1 +
 sound/soc/fsl/Kconfig                              |    9 +
 sound/soc/fsl/Makefile                             |    2 +
 sound/soc/fsl/fsl_asrc.c                           | 1031 ++++++++++++++++++++
 sound/soc/fsl/fsl_asrc.h                           |  431 ++++++++
 sound/soc/fsl/fsl_asrc_dma.c                       |  385 ++++++++
 8 files changed, 1956 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/sound/fsl,asrc.txt
 create mode 100644 sound/soc/fsl/fsl_asrc.c
 create mode 100644 sound/soc/fsl/fsl_asrc.h
 create mode 100644 sound/soc/fsl/fsl_asrc_dma.c
Signature · 1 line
1.8.4

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