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ARM: dts: imx6qdl-sabresd: add always on pcie regulator

PATCH New Lucas Stach 2 participants 3 messages Jul 18, 2014 – Jul 22, 2014

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#0 lore raw

PATCH 1/1 ARM: dts: imx6qdl-sabresd: add always on pcie regulator

Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available.

A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now.

---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +12 -0
index ec43dde78525..bbbd501098e6 100644
@@ -54,6 +54,17 @@
 			gpio = <&gpio4 10 0>;
 			enable-active-high;
 		};
+
+		reg_pcie: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "pcie-supply";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio3 19 0>;
+			regulator-always-on;
+			enable-active-high;
+		};
 	};
 
 	gpio-keys {
@@ -323,6 +334,7 @@
 				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
+				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000
 			>;
 		};
 
Signature · 1 line
2.0.1
#1 lore raw

PATCH 1/1 ARM: dts: imx6qdl-sabresd: add always on pcie regulator

Quoted 10 lines · Lucas Stach

Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available.

A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now.

Just curious if this fixes any known PCIe issue?

Quoted 9 lines
---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
index ec43dde78525..bbbd501098e6 100644

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 61

Quoted 8 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +5 -0
@@ -54,6 +54,17 @@
 			gpio = <&gpio4 10 0>;
 			enable-active-high;
 		};
+
+		reg_pcie: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "pcie-supply";

I would start asking to name the regulator in the same way that board document like schematics names it. In this case, it should be "MPCIE_3V3".

Quoted 10 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +6 -0
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio3 19 0>;
+			regulator-always-on;
+			enable-active-high;
+		};
 	};
 
 	gpio-keys {

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 337

Quoted 4 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +1 -0
@@ -323,6 +334,7 @@
 				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
+				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000

No more GPIO setup in hog group, and no more 0x80000000 on pad config. Please have a dedicate pinctrl entry for it with a proper config value, and refer to the entry in that reg_pcie node.

Shawn

Quoted 6 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
 			>;
 		};
 
Signature · 1 line
2.0.1
#2 lore raw

PATCH 1/1 ARM: dts: imx6qdl-sabresd: add always on pcie regulator

Hi Shawn,

Am Dienstag, den 22.07.2014, 10:57 +0800 schrieb Shawn Guo:

Quoted 5 lines · Lucas Stach
Quoted 4 lines

Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available.

Quoted 8 lines
Quoted 6 lines

A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now.

Just curious if this fixes any known PCIe issue?

Yes this allows PCIe devices to work on my SabreSD board. I don't know if it's required for all revisions, the schematics certainly show a mounting option where the load switch isn't populated but bridged by 0R resistor.

Quoted 31 lines
Quoted 10 lines
---
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +0 -0
index ec43dde78525..bbbd501098e6 100644

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 61

Quoted 8 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +5 -0
@@ -54,6 +54,17 @@
 			gpio = <&gpio4 10 0>;
 			enable-active-high;
 		};
+
+		reg_pcie: regulator at 3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
+			regulator-name = "pcie-supply";

I would start asking to name the regulator in the same way that board document like schematics names it. In this case, it should be "MPCIE_3V3".

Quoted 8 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +6 -0
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio3 19 0>;
+			regulator-always-on;
+			enable-active-high;
+		};
 	};
 
Quoted 11 lines

arch/arm/boot/dts/imx6qdl-sabresd.dtsi line 337

Quoted 6 lines
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +1 -0
 	gpio-keys {
@@ -323,6 +334,7 @@
 				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 				MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
+				MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000

No more GPIO setup in hog group, and no more 0x80000000 on pad config. Please have a dedicate pinctrl entry for it with a proper config value, and refer to the entry in that reg_pcie node.

Ok, will fix.

Signature · 2 lines
Pengutronix e.K.             | Lucas Stach                 |
Industrial Linux Solutions   | http://www.pengutronix.de/  |