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ARM: OMAP2+: remove DMA interrupt if DT provided

PATCH New Sricharan R 2 participants 4 messages Jun 12, 2014 – Jul 22, 2014

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#0 lore raw

v2 cover ARM: OMAP2+: remove DMA interrupt if DT provided

This series removes the DMA interrupt registration if DT provides interrupts, so we have no need for hwmod provided interrupt number.

This is a pre-req for crossbar migration as DMA is the last driver to use interrupt definition from hwmod.

[V2] Rebased on 3.15 mainline

Nishanth Menon (2):
ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver
ARM: DRA7: hwmod: remove interrupts for DMA

 arch/arm/mach-omap2/dma.c                 |    3 +++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |    9 ---------
 arch/arm/plat-omap/dma.c                  |    5 +++--
 include/linux/omap-dma.h                  |    1 +
 4 files changed, 7 insertions(+), 11 deletions(-)
Signature · 1 line
1.7.9.5
#1 lore raw

PATCH v2 1/2 ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver

From: Nishanth Menon <[email protected]>

we have currently 2 DMA drivers that try to co-exist. drivers/dma/omap-dma.c which registers it's own IRQ and is device tree aware and uses arch/arm/plat-omap/dma.c instance created by arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).

Currently both try to register interrupts and mach-omap2/plat-omap dma.c attempts to use the IRQ number registered by hwmod to register it's own interrupt handler.

Now, there is no reasonable way of static allocating DMA irq in GIC SPI when we use crossbar. However, since the dma_chan structure is freed as a result of IRQ not being present due to devm allocation, maintaining information of channel by platform code fails at a later point in time when that region of memory is reused.

So, if hwmod does not indicate an IRQ number, then, assume that dma-engine will take care of the interrupt handling.

---
 arch/arm/mach-omap2/dma.c |    3 +++
 arch/arm/plat-omap/dma.c  |    5 +++--
 include/linux/omap-dma.h  |    1 +
 3 files changed, 7 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/dma.c +3 -0
index a6d2cf1..e1a56d8 100644
@@ -259,6 +259,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
 	if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
 		d->dev_caps |= HS_CHANNELS_RESERVED;
 
+	if (platform_get_irq_byname(pdev, "0") < 0)
+		d->dev_caps |= DMA_ENGINE_HANDLE_IRQ;
+
 	/* Check the capabilities register for descriptor loading feature */
 	if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
 		dma_common_ch_end = CCDN;
arch/arm/plat-omap/dma.c +3 -2
index b5608b1..7aae0e5 100644
@@ -2100,7 +2100,7 @@ static int omap_system_dma_probe(struct platform_device *pdev)
 		omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
 				DMA_DEFAULT_FIFO_DEPTH, 0);
 
-	if (dma_omap2plus()) {
+	if (dma_omap2plus() && !(d->dev_caps & DMA_ENGINE_HANDLE_IRQ)) {
 		strcpy(irq_name, "0");
 		dma_irq = platform_get_irq_byname(pdev, irq_name);
 		if (dma_irq < 0) {
@@ -2145,7 +2145,8 @@ static int omap_system_dma_remove(struct platform_device *pdev)
 		char irq_name[4];
 		strcpy(irq_name, "0");
 		dma_irq = platform_get_irq_byname(pdev, irq_name);
-		remove_irq(dma_irq, &omap24xx_dma_irq);
+		if (dma_irq >= 0)
+			remove_irq(dma_irq, &omap24xx_dma_irq);
 	} else {
 		int irq_rel = 0;
 		for ( ; irq_rel < dma_chan_count; irq_rel++) {
include/linux/omap-dma.h +1 -0
index 88e6ea4..6f06f8b 100644
@@ -130,6 +130,7 @@
 #define IS_WORD_16			BIT(0xd)
 #define ENABLE_16XX_MODE		BIT(0xe)
 #define HS_CHANNELS_RESERVED		BIT(0xf)
+#define DMA_ENGINE_HANDLE_IRQ		BIT(0x10)
 
 /* Defines for DMA Capabilities */
 #define DMA_HAS_TRANSPARENT_CAPS	(0x1 << 18)
Signature · 1 line
1.7.9.5
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#2 lore raw

PATCH v2 1/2 ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver

Quoted 11 lines · Sricharan R

From: Nishanth Menon <[email protected]>

we have currently 2 DMA drivers that try to co-exist. drivers/dma/omap-dma.c which registers it's own IRQ and is device tree aware and uses arch/arm/plat-omap/dma.c instance created by arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).

Currently both try to register interrupts and mach-omap2/plat-omap dma.c attempts to use the IRQ number registered by hwmod to register it's own interrupt handler.

Quoted 8 lines

Now, there is no reasonable way of static allocating DMA irq in GIC SPI when we use crossbar. However, since the dma_chan structure is freed as a result of IRQ not being present due to devm allocation, maintaining information of channel by platform code fails at a later point in time when that region of memory is reused.

So, if hwmod does not indicate an IRQ number, then, assume that dma-engine will take care of the interrupt handling.

Looks OK to me, applying both into omap-for-v3.17/soc thanks.

Regards,

Tony

#3 lore raw

PATCH v2 2/2 ARM: DRA7: hwmod: remove interrupts for DMA

In reply to Sricharan R

From: Nishanth Menon <[email protected]>

DMA interrupts are now available in of, and the definitions are duplicates in hwmod. This prevents us from dynamically allocating interrupt resources for dma from devicetree.

---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |    9 ---------
 1 file changed, 9 deletions(-)
arch/arm/mach-omap2/omap_hwmod_7xx_data.c +0 -9
index 20b4398..31fd260 100644
@@ -343,19 +343,10 @@ static struct omap_dma_dev_attr dma_dev_attr = {
 };
 
 /* dma_system */
-static struct omap_hwmod_irq_info dra7xx_dma_system_irqs[] = {
-	{ .name = "0", .irq = 12 + DRA7XX_IRQ_GIC_START },
-	{ .name = "1", .irq = 13 + DRA7XX_IRQ_GIC_START },
-	{ .name = "2", .irq = 14 + DRA7XX_IRQ_GIC_START },
-	{ .name = "3", .irq = 15 + DRA7XX_IRQ_GIC_START },
-	{ .irq = -1 }
-};
-
 static struct omap_hwmod dra7xx_dma_system_hwmod = {
 	.name		= "dma_system",
 	.class		= &dra7xx_dma_hwmod_class,
 	.clkdm_name	= "dma_clkdm",
-	.mpu_irqs	= dra7xx_dma_system_irqs,
 	.main_clk	= "l3_iclk_div",
 	.prcm = {
 		.omap4 = {
Signature · 1 line
1.7.9.5