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ARM: at91: at91sam9x5: add clocks for usb device

PATCH In review Bo Shen 4 participants 29 messages Jul 11, 2014 – Jul 25, 2014

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Bo Shen

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#0 lore raw

PATCH 1/1 ARM: at91: at91sam9x5: add clocks for usb device

Add clocks for usb device, or else switch to CCF, the gadget won't work.

---
 arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +2 -0
index d6133f4..2ebc421 100644
@@ -1045,6 +1045,8 @@
 				reg = <0x00500000 0x80000
 				       0xf803c000 0x400>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&usb>, <&udphs_clk>;
+				clock-names = "hclk", "pclk";
 				status = "disabled";
 
 				ep0 {
Signature · 1 line
1.8.5.2
Acked-by on v1 1/1
#1 lore raw
Quoted 5 lines · Bo Shen

Add clocks for usb device, or else switch to CCF, the gadget won't work.

Quoted 25 lines
---
 arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +2 -0
index d6133f4..2ebc421 100644
@@ -1045,6 +1045,8 @@
 				reg = <0x00500000 0x80000
 				       0xf803c000 0x400>;
 				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&usb>, <&udphs_clk>;
+				clock-names = "hclk", "pclk";
 				status = "disabled";
 
 				ep0 {
Signature · 7 lines
1.8.5.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Tested-by
#2 lore raw

Thanks, it works now.

Dne 11.7.2014 12:47, Alexandre Belloni napsal(a):

Quoted 7 lines · Bo Shen
Quoted 5 lines

Add clocks for usb device, or else switch to CCF, the gadget won't work.

Quoted 27 lines
Quoted 26 lines
---
  arch/arm/boot/dts/at91sam9x5.dtsi | 2 ++
  1 file changed, 2 insertions(+)
arch/arm/boot/dts/at91sam9x5.dtsi +2 -1
index d6133f4..2ebc421 100644
@@ -1045,6 +1045,8 @@
  				reg = <0x00500000 0x80000
  				       0xf803c000 0x400>;
  				interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
+				clocks = <&usb>, <&udphs_clk>;
+				clock-names = "hclk", "pclk";
  				status = "disabled";
 
  				ep0 {
--

1.8.5.2

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linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#3 lore raw

PATCH 1/1 ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

In reply to Bo Shen

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

-------------- next part --------------

linux-3.16-rc6/arch/arm/boot/dts/at91sam9x5.dtsi +2 -1
@@ -624,7 +624,8 @@
 						atmel,pins =
 							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
 							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
-							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
+							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA13 periph A SPI0_SPCK pin */
+							 AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* set from ROMBOOT to periph A */
 					};
 				};
#4 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

What are you trying to use this pin for ?
If you just want to use it as a chip select for an spi device, take a look at [1].

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

You can explicitly define a new pinctrl state (by defining a new pinctrl_spi0_cs0 subnode in your dts file) and reference it in the spi0 node, though this is not mandatory.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/arch/arm/boot/dts/at91sam9x5ek.dtsi#L85

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#5 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 4 lines

On Thu, 24 Jul 2014 15:38:24 +0200
Ji?? Prchal <[email protected]> wrote:

Quoted 8 lines
Quoted 3 lines

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Quoted 2 lines

If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

Quoted 4 lines

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Quoted 11 lines

You can explicitly define a new pinctrl state (by defining a new pinctrl_spi0_cs0 subnode in your dts file) and reference it in the spi0 node, though this is not mandatory.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/arch/arm/boot/dts/at91sam9x5ek.dtsi#L85

#6 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 16 lines · On Thu, 24 Jul 2014 17:06:43 +0200 Ji?? Prchal <[email protected]> wrote:

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 8 lines
Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

Quoted 6 lines
Quoted 4 lines

The policy is to leave pins in an unknown state till some peripheral need them.

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Are you using a 9x5ek board or a custom one, in the latter case could you paste your spi0 node definition ?

Quoted 3 lines
Quoted 2 lines

If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

Quoted 5 lines
Quoted 4 lines

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback, called by pinctrl core when a gpio is requested.

[1]http://lxr.free-electrons.com/source/drivers/pinctrl/pinctrl-at91.c#L665

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#7 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):

Quoted 22 lines
Quoted 19 lines · On Thu, 24 Jul 2014 17:06:43 +0200 Ji?? Prchal <[email protected]> wrote:

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 11 lines
Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

Quoted 6 lines
Quoted 3 lines
Quoted 1 line

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Are you using a 9x5ek board or a custom one, in the latter case could you paste your spi0 node definition ?

I'm using custom board. My spi node:

			spi0: spi at f0000000 {
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

				fm25 at 0 {
					compatible = "cypress,fm25";
					spi-max-frequency = <40000000>;
					reg = <0>;
					pagesize = <256>;
					size = <131072>;
					address-width = <24>;
				};
				/* ADC */
				spidev at 1 {
					compatible = "spidev";
					reg = <1>;
					spi-max-frequency = <1000000>;
				};
				/* IO expander for busaddr */
				spidev at 2 {
					compatible = "spidev";
					reg = <2>;
					label = "busaddr";
					spi-max-frequency = <10000000>;
				};
				/* audio codec */
				codec: codec at 3 {
					compatible = "ti,tlv320aic3x";
					spi-max-frequency = <1000000>;
					reg = <3>;
				};
			};

This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT changes that.

Quoted 9 lines
Quoted 4 lines
Quoted 3 lines

If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

See my node.

Quoted 9 lines
Quoted 6 lines
Quoted 5 lines

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback, called by pinctrl core when a gpio is requested.

But is this called from spi driver when requesting gpios as cs?

Quoted 5 lines

[1]http://lxr.free-electrons.com/source/drivers/pinctrl/pinctrl-at91.c#L665

#8 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 68 lines · On Fri, 25 Jul 2014 08:14:40 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):

Quoted 22 lines
Quoted 19 lines · On Thu, 24 Jul 2014 17:06:43 +0200 Ji?? Prchal <[email protected]> wrote:

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 11 lines
Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

Quoted 6 lines
Quoted 3 lines
Quoted 1 line

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Are you using a 9x5ek board or a custom one, in the latter case could you paste your spi0 node definition ?

I'm using custom board. My spi node:

			spi0: spi at f0000000 {
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

				fm25 at 0 {
					compatible = "cypress,fm25";
					spi-max-frequency = <40000000>;
					reg = <0>;
					pagesize = <256>;
					size = <131072>;
					address-width = <24>;
				};
				/* ADC */
				spidev at 1 {
					compatible = "spidev";
					reg = <1>;
					spi-max-frequency = <1000000>;
				};
				/* IO expander for busaddr */
				spidev at 2 {
					compatible = "spidev";
					reg = <2>;
					label = "busaddr";
					spi-max-frequency = <10000000>;
				};
				/* audio codec */
				codec: codec at 3 {
					compatible = "ti,tlv320aic3x";
					spi-max-frequency = <1000000>;
					reg = <3>;
				};
			};
Quoted 2 lines

This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT changes that.

Yes, boot code stored in ROM probably mux PA14 to periph A function, but with your definition PA 14 should be set GPIO mode when the codec device is created.

I don't see any obvious error in your definition, could you add a trace there [1] to see if the gpio is successfully requested ? Could you also paste the content of /sys/kernel/debug/gpio ?

Quoted 12 lines
Quoted 9 lines
Quoted 4 lines
Quoted 3 lines

If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

See my node.

Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
Quoted 8 lines
Quoted 7 lines
Quoted 4 lines
Quoted 3 lines

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback, called by pinctrl core when a gpio is requested.

But is this called from spi driver when requesting gpios as cs?

Yes, it's part of the gpio_request process:
gpio_request calls request method on at91 gpio_chip which in turn calls pinctrl_request_gpio which then calls the gpio_request_enable method I previously mentioned.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#9 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 09:53 Boris BREZILLON napsal(a):

Quoted 71 lines
Quoted 68 lines · On Fri, 25 Jul 2014 08:14:40 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):

Quoted 22 lines
Quoted 19 lines · On Thu, 24 Jul 2014 17:06:43 +0200 Ji?? Prchal <[email protected]> wrote:

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 11 lines
Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

Quoted 6 lines
Quoted 3 lines
Quoted 1 line

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Are you using a 9x5ek board or a custom one, in the latter case could you paste your spi0 node definition ?

I'm using custom board. My spi node:

			spi0: spi at f0000000 {
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

				fm25 at 0 {
					compatible = "cypress,fm25";
					spi-max-frequency = <40000000>;
					reg = <0>;
					pagesize = <256>;
					size = <131072>;
					address-width = <24>;
				};
				/* ADC */
				spidev at 1 {
					compatible = "spidev";
					reg = <1>;
					spi-max-frequency = <1000000>;
				};
				/* IO expander for busaddr */
				spidev at 2 {
					compatible = "spidev";
					reg = <2>;
					label = "busaddr";
					spi-max-frequency = <10000000>;
				};
				/* audio codec */
				codec: codec at 3 {
					compatible = "ti,tlv320aic3x";
					spi-max-frequency = <1000000>;
					reg = <3>;
				};
			};
Quoted 6 lines
Quoted 2 lines

This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT changes that.

Yes, boot code stored in ROM probably mux PA14 to periph A function, but with your definition PA 14 should be set GPIO mode when the codec device is created.

I tried codec defined as spidev to see if it is not in codec driver, but its the same.

				/* audio codec */
				spidev at 3 {
					compatible = "spidev";
					reg = <3>;
					label = "codec";
					spi-max-frequency = <10000000>;
				};
Quoted 3 lines

I don't see any obvious error in your definition, could you add a trace there [1] to see if the gpio is successfully requested ?

I add a trace:
@@ -1029,6 +1029,7 @@ static int atmel_spi_setup(struct spi_device *spi)
if (!asd)
return -ENOMEM;

+ dev_dbg(&spi->dev, "gpio_request: %u\n", npcs_pin);
ret = gpio_request(npcs_pin, dev_name(&spi->dev)); if (ret) {
kfree(asd);
But don't see it.
/ # dmesg | grep spi

[    1.167968] atmel_spi f0000000.spi: version: 0x212
[    1.175781] atmel_spi f0000000.spi: Using dma0chan1 (tx) and dma0chan2 (rx) for DMA transfers
[    1.183593] atmel_spi f0000000.spi: Atmel SPI Controller at 0xf0000000 (irq 34)
/ # dmesg | grep gpio_request
/ # dmesg | grep gpio
[    0.121093] gpiochip_add: registered GPIOs 0 to 31 on device: fffff400.gpio
[    0.121093] gpio-at91 fffff400.gpio: at address fefff400
[    0.125000] gpiochip_add: registered GPIOs 32 to 50 on device: fffff600.gpio
[    0.125000] gpio-at91 fffff600.gpio: at address fefff600
[    0.125000] gpiochip_add: registered GPIOs 64 to 95 on device: fffff800.gpio
[    0.125000] gpio-at91 fffff800.gpio: at address fefff800
[    0.128906] gpiochip_add: registered GPIOs 96 to 117 on device: fffffa00.gpio
[    0.128906] gpio-at91 fffffa00.gpio: at address fefffa00
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.304687] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.304687] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.304687] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.308593] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.308593] of_get_named_gpiod_flags exited with status 0
[    0.308593] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.312500] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.312500] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.316406] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.316406] of_get_named_gpiod_flags exited with status 0
[    0.320312] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.320312] of_get_named_gpiod_flags exited with status 0
[    0.320312] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.320312] of_get_named_gpiod_flags exited with status 0
[    0.324218] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.324218] of_get_named_gpiod_flags exited with status 0
[    0.324218] gpio-of-helper gpio: Allocated GPIO id=-1
[    0.324218] gpio-of-helper gpio: ready
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.328125] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.332031] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at fffff200[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.847656] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.851562] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f801c000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.863281] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8020000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.875000] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.878906] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8024000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.890625] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/serial at f8028000[0]'
[    0.929687] of_get_named_gpiod_flags exited with status 0
[    0.929687] of_get_named_gpiod_flags exited with status 0
[    0.929687] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/nand at 40000000[2]'
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.191406] of_get_named_gpiod_flags exited with status 0
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[0]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[1]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[2]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[0]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[1]'
[    1.437500] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/ohci at 00600000[2]'
[    1.609375] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.699218] of_get_named_gpiod_flags exited with status 0
[    1.703125] of_get_named_gpiod_flags exited with status 0
[    3.042968] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/mmc at f0008000/slot at 0[0]'
[    3.042968] of_get_named_gpiod_flags: can't parse gpios property of node '/ahb/apb/mmc at f0008000/slot at 0[0]'
Quoted 1 line

Could you also paste the content of /sys/kernel/debug/gpio ?

The /sys/kernel/debug/ is empty.
It's set in config:
---GPIOSupport
? [*] Debug GPIO calls ?
?
But in .config not:
# CONFIG_SPI_DEBUG is not set

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If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

See my node.

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Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback, called by pinctrl core when a gpio is requested.

But is this called from spi driver when requesting gpios as cs?

Yes, it's part of the gpio_request process:
gpio_request calls request method on at91 gpio_chip which in turn calls pinctrl_request_gpio which then calls the gpio_request_enable method I previously mentioned.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031

#10 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

On Fri, 25 Jul 2014 10:27:13 +0200
Ji?? Prchal <[email protected]> wrote:

[...]

Quoted 4 lines
Quoted 3 lines

Could you also paste the content of /sys/kernel/debug/gpio ?

The /sys/kernel/debug/ is empty.

You have to enable CONFIG_DEBUG_FS in your config and then mount the debug file system:

#mount -t debugfs dbg /sys/kernel/debug

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#11 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Here it is:
cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
[in20] GPIOfffff400.gpio3: [gpio] set [spi0.3] GPIOfffff400.gpio14: [gpio] set [in19] GPIOfffff400.gpio21: [gpio] set [spi0.1] GPIOfffff400.gpio22: [gpio] set [spi0.0] GPIOfffff400.gpio23: [gpio] set [in18] GPIOfffff400.gpio28: [gpio] set [out20] GPIOfffff400.gpio29: [gpio] clear [out18] GPIOfffff400.gpio30: [gpio] clear [out19] GPIOfffff400.gpio31: [gpio] clear

GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
[blue] GPIOfffff600.gpio12: [gpio] set [gsm_on] GPIOfffff600.gpio13: [gpio] clear [yellow] GPIOfffff600.gpio14: [gpio] clear [gsm_rst] GPIOfffff600.gpio15: [gpio] clear [green] GPIOfffff600.gpio16: [gpio] clear [red] GPIOfffff600.gpio18: [gpio] clear

GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
[in17] GPIOfffff800.gpio16: [gpio] set [in13] GPIOfffff800.gpio18: [gpio] set [in14] GPIOfffff800.gpio20: [gpio] set [por] GPIOfffff800.gpio25: [gpio] clear [out16] GPIOfffff800.gpio26: [gpio] clear [out15] GPIOfffff800.gpio28: [gpio] clear [spi0.2] GPIOfffff800.gpio29: [gpio] set [out17] GPIOfffff800.gpio30: [gpio] clear

GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
[nand_enable] GPIOfffffa00.gpio4: [gpio] set [nand_rdy] GPIOfffffa00.gpio5: [gpio] set [atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear

Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):

Quoted 17 lines

On Fri, 25 Jul 2014 10:27:13 +0200
Ji?? Prchal <[email protected]> wrote:

[...]

Quoted 4 lines
Quoted 3 lines

Could you also paste the content of /sys/kernel/debug/gpio ?

The /sys/kernel/debug/ is empty.

You have to enable CONFIG_DEBUG_FS in your config and then mount the debug file system:

#mount -t debugfs dbg /sys/kernel/debug

#12 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 31 lines · On Fri, 25 Jul 2014 10:54:23 +0200 Ji?? Prchal <[email protected]> wrote:

Here it is:
cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
[in20] GPIOfffff400.gpio3: [gpio] set [spi0.3] GPIOfffff400.gpio14: [gpio] set [in19] GPIOfffff400.gpio21: [gpio] set [spi0.1] GPIOfffff400.gpio22: [gpio] set [spi0.0] GPIOfffff400.gpio23: [gpio] set [in18] GPIOfffff400.gpio28: [gpio] set [out20] GPIOfffff400.gpio29: [gpio] clear [out18] GPIOfffff400.gpio30: [gpio] clear [out19] GPIOfffff400.gpio31: [gpio] clear

GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
[blue] GPIOfffff600.gpio12: [gpio] set [gsm_on] GPIOfffff600.gpio13: [gpio] clear [yellow] GPIOfffff600.gpio14: [gpio] clear [gsm_rst] GPIOfffff600.gpio15: [gpio] clear [green] GPIOfffff600.gpio16: [gpio] clear [red] GPIOfffff600.gpio18: [gpio] clear

GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
[in17] GPIOfffff800.gpio16: [gpio] set [in13] GPIOfffff800.gpio18: [gpio] set [in14] GPIOfffff800.gpio20: [gpio] set [por] GPIOfffff800.gpio25: [gpio] clear [out16] GPIOfffff800.gpio26: [gpio] clear [out15] GPIOfffff800.gpio28: [gpio] clear [spi0.2] GPIOfffff800.gpio29: [gpio] set [out17] GPIOfffff800.gpio30: [gpio] clear

Quoted 5 lines

GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
[nand_enable] GPIOfffffa00.gpio4: [gpio] set [nand_rdy] GPIOfffffa00.gpio5: [gpio] set [atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

Quoted 19 lines

Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):

Quoted 17 lines

On Fri, 25 Jul 2014 10:27:13 +0200
Ji?? Prchal <[email protected]> wrote:

[...]

Quoted 4 lines
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Could you also paste the content of /sys/kernel/debug/gpio ?

The /sys/kernel/debug/ is empty.

You have to enable CONFIG_DEBUG_FS in your config and then mount the debug file system:

#mount -t debugfs dbg /sys/kernel/debug

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#13 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 11:01 Boris BREZILLON napsal(a):

Quoted 34 lines
Quoted 31 lines · On Fri, 25 Jul 2014 10:54:23 +0200 Ji?? Prchal <[email protected]> wrote:

Here it is:
cat /sys/kernel/debug/gpio
GPIOs 0-31, platform/fffff400.gpio, fffff400.gpio:
[in20] GPIOfffff400.gpio3: [gpio] set [spi0.3] GPIOfffff400.gpio14: [gpio] set [in19] GPIOfffff400.gpio21: [gpio] set [spi0.1] GPIOfffff400.gpio22: [gpio] set [spi0.0] GPIOfffff400.gpio23: [gpio] set [in18] GPIOfffff400.gpio28: [gpio] set [out20] GPIOfffff400.gpio29: [gpio] clear [out18] GPIOfffff400.gpio30: [gpio] clear [out19] GPIOfffff400.gpio31: [gpio] clear

GPIOs 32-50, platform/fffff600.gpio, fffff600.gpio:
[blue] GPIOfffff600.gpio12: [gpio] set [gsm_on] GPIOfffff600.gpio13: [gpio] clear [yellow] GPIOfffff600.gpio14: [gpio] clear [gsm_rst] GPIOfffff600.gpio15: [gpio] clear [green] GPIOfffff600.gpio16: [gpio] clear [red] GPIOfffff600.gpio18: [gpio] clear

GPIOs 64-95, platform/fffff800.gpio, fffff800.gpio:
[in17] GPIOfffff800.gpio16: [gpio] set [in13] GPIOfffff800.gpio18: [gpio] set [in14] GPIOfffff800.gpio20: [gpio] set [por] GPIOfffff800.gpio25: [gpio] clear [out16] GPIOfffff800.gpio26: [gpio] clear [out15] GPIOfffff800.gpio28: [gpio] clear [spi0.2] GPIOfffff800.gpio29: [gpio] set [out17] GPIOfffff800.gpio30: [gpio] clear

Quoted 8 lines
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GPIOs 96-117, platform/fffffa00.gpio, fffffa00.gpio:
[nand_enable] GPIOfffffa00.gpio4: [gpio] set [nand_rdy] GPIOfffffa00.gpio5: [gpio] set [atmel_usba_udc] GPIOfffffa00.gpio21: [gpio] clear

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

/ # dmesg | grep "enable pin"

[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as PIOB12 0x1000
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Dne 25.7.2014 v 10:45 Boris BREZILLON napsal(a):

Quoted 17 lines

On Fri, 25 Jul 2014 10:27:13 +0200
Ji?? Prchal <[email protected]> wrote:

[...]

Quoted 4 lines
Quoted 3 lines

Could you also paste the content of /sys/kernel/debug/gpio ?

The /sys/kernel/debug/ is empty.

You have to enable CONFIG_DEBUG_FS in your config and then mount the debug file system:

#mount -t debugfs dbg /sys/kernel/debug

#14 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 4 lines · On Fri, 25 Jul 2014 11:13:51 +0200 Ji?? Prchal <[email protected]> wrote:
Quoted 3 lines

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

/ # dmesg | grep "enable pin"

Quoted 12 lines
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000

Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least the driver think it is).

Could you launch these commands (you'll need the devmem tool) and paste the results ?

#devmem 0xfffff408
#devmem 0xfffff418
#devmem 0xfffff438
#devmem 0xfffff43c
#devmem 0xfffff458
#devmem 0xfffff468
#devmem 0xfffff470
#devmem 0xfffff474
#devmem 0xfffff498

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#15 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 11:31 Boris BREZILLON napsal(a):

Quoted 29 lines
Quoted 4 lines · On Fri, 25 Jul 2014 11:13:51 +0200 Ji?? Prchal <[email protected]> wrote:
Quoted 3 lines

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

/ # dmesg | grep "enable pin"

Quoted 12 lines
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000

Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least the driver think it is).

Could you launch these commands (you'll need the devmem tool) and paste the results ?

Quoted 10 lines

#devmem 0xfffff408
#devmem 0xfffff418
#devmem 0xfffff438
#devmem 0xfffff43c
#devmem 0xfffff458
#devmem 0xfffff468
#devmem 0xfffff470
#devmem 0xfffff474
#devmem 0xfffff498

/ # devmem 0xfffff408
0xF0E04018
/ # devmem 0xfffff418
0xE0C04000
/ # devmem 0xfffff438
0x00C04000
/ # devmem 0xfffff43c
0x13FFD7FB
/ # devmem 0xfffff458
0x00000000
/ # devmem 0xfffff468
0xFF223B4E
/ # devmem 0xfffff470
0x0F000000
/ # devmem 0xfffff474
0x00000000
/ # devmem 0xfffff498
0xFFFFFFFF

I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?

#16 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 61 lines · On Fri, 25 Jul 2014 12:06:30 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 25.7.2014 v 11:31 Boris BREZILLON napsal(a):

Quoted 29 lines
Quoted 4 lines · On Fri, 25 Jul 2014 11:13:51 +0200 Ji?? Prchal <[email protected]> wrote:
Quoted 3 lines

Every thing seems in place.
Could you enable CONFIG_DEBUG_PINCTRL and grep on "enable pin" ?

/ # dmesg | grep "enable pin"

Quoted 12 lines
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000

Okay, this cleary shows that PA14 pin is muxed as a GPIO (or at least the driver think it is).

Could you launch these commands (you'll need the devmem tool) and paste the results ?

Quoted 10 lines

#devmem 0xfffff408
#devmem 0xfffff418
#devmem 0xfffff438
#devmem 0xfffff43c
#devmem 0xfffff458
#devmem 0xfffff468
#devmem 0xfffff470
#devmem 0xfffff474
#devmem 0xfffff498

/ # devmem 0xfffff408
0xF0E04018
/ # devmem 0xfffff418
0xE0C04000
/ # devmem 0xfffff438
0x00C04000
/ # devmem 0xfffff43c
0x13FFD7FB
/ # devmem 0xfffff458
0x00000000
/ # devmem 0xfffff468
0xFF223B4E
/ # devmem 0xfffff470
0x0F000000
/ # devmem 0xfffff474
0x00000000
/ # devmem 0xfffff498
0xFFFFFFFF

Quoted 1 line

I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?

Oh, nice catch!
I think you've found the origin of this bug.
Indeed each device is instantiated sequentially and thus when the first device is probed (CS0) the last one has not requested it's cs_gpio yet (and PA14 is still assigned to periph A).

Declaring cs-pins and referencing them in pinctrl-0 solves the issue because in this case all CS pins are requested during controller probe.

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#17 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 12:18 Boris BREZILLON napsal(a):

Quoted 21 lines
Quoted 19 lines

/ # devmem 0xfffff408
0xF0E04018
/ # devmem 0xfffff418
0xE0C04000
/ # devmem 0xfffff438
0x00C04000
/ # devmem 0xfffff43c
0x13FFD7FB
/ # devmem 0xfffff458
0x00000000
/ # devmem 0xfffff468
0xFF223B4E
/ # devmem 0xfffff470
0x0F000000
/ # devmem 0xfffff474
0x00000000
/ # devmem 0xfffff498
0xFFFFFFFF

Quoted 1 line

I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?

Quoted 9 lines

Oh, nice catch!
I think you've found the origin of this bug.
Indeed each device is instantiated sequentially and thus when the first device is probed (CS0) the last one has not requested it's cs_gpio yet (and PA14 is still assigned to periph A).

Declaring cs-pins and referencing them in pinctrl-0 solves the issue because in this case all CS pins are requested during controller probe.

So, what would be the right fix up? I my patch it's not good idea since some other driver can request pin for other peripheral earlier than spi. In board dts it could be new investigating for someone else who don't know this issue. I think the best way would be request all cs in early spi init since cs depends on each other and must be all of them in right state before any communication on bus. They are part of bus, like miso, mosi, clk, not part of chips. Also they are defined in parent spi node, not in child chip node.
Am I right?

#18 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 33 lines · On Fri, 25 Jul 2014 12:32:38 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 25.7.2014 v 12:18 Boris BREZILLON napsal(a):

Quoted 21 lines
Quoted 19 lines

/ # devmem 0xfffff408
0xF0E04018
/ # devmem 0xfffff418
0xE0C04000
/ # devmem 0xfffff438
0x00C04000
/ # devmem 0xfffff43c
0x13FFD7FB
/ # devmem 0xfffff458
0x00000000
/ # devmem 0xfffff468
0xFF223B4E
/ # devmem 0xfffff470
0x0F000000
/ # devmem 0xfffff474
0x00000000
/ # devmem 0xfffff498
0xFFFFFFFF

Quoted 1 line

I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?

Quoted 9 lines

Oh, nice catch!
I think you've found the origin of this bug.
Indeed each device is instantiated sequentially and thus when the first device is probed (CS0) the last one has not requested it's cs_gpio yet (and PA14 is still assigned to periph A).

Declaring cs-pins and referencing them in pinctrl-0 solves the issue because in this case all CS pins are requested during controller probe.

Quoted 6 lines

So, what would be the right fix up? I my patch it's not good idea since some other driver can request pin for other peripheral earlier than spi. In board dts it could be new investigating for someone else who don't know this issue. I think the best way would be request all cs in early spi init since cs depends on each other and must be all of them in right state before any communication on bus. They are part of bus, like miso, mosi, clk, not part of chips. Also they are defined in parent spi node, not in child chip node.
Am I right?

Yes, you can take a look at [1] as an example.

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-efm32.c#L361

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#19 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

In reply to Boris BREZILLON

I changed manually .config,
now it's there:

[    1.195312] spi spi0.0: gpio_request: 23
[    1.195312] spi spi0.1: gpio_request: 22
[    1.199218] spi spi0.2: gpio_request: 93
[    1.203125] spi spi0.3: gpio_request: 14

But still not working.

Dne 25.7.2014 v 09:53 Boris BREZILLON napsal(a):

Quoted 115 lines
Quoted 68 lines · On Fri, 25 Jul 2014 08:14:40 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 24.7.2014 v 17:58 Boris BREZILLON napsal(a):

Quoted 22 lines
Quoted 19 lines · On Thu, 24 Jul 2014 17:06:43 +0200 Ji?? Prchal <[email protected]> wrote:

Hi,

Dne 24.7.2014 v 16:26 Boris BREZILLON napsal(a):

Quoted 4 lines

Hello Ji??,

First of all, please try to use git format-patch when submitting a patch to any kernel mailing list.

Sorry for that.

Quoted 11 lines
Quoted 3 lines · On Thu, 24 Jul 2014 15:38:24 +0200 Ji?? Prchal <[email protected]> wrote:

After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A. Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.

The policy is to leave pins in an unknown state till some peripheral need them.

Quoted 6 lines
Quoted 3 lines
Quoted 1 line

What are you trying to use this pin for ?

For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.

Are you using a 9x5ek board or a custom one, in the latter case could you paste your spi0 node definition ?

I'm using custom board. My spi node:

			spi0: spi at f0000000 {
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

				fm25 at 0 {
					compatible = "cypress,fm25";
					spi-max-frequency = <40000000>;
					reg = <0>;
					pagesize = <256>;
					size = <131072>;
					address-width = <24>;
				};
				/* ADC */
				spidev at 1 {
					compatible = "spidev";
					reg = <1>;
					spi-max-frequency = <1000000>;
				};
				/* IO expander for busaddr */
				spidev at 2 {
					compatible = "spidev";
					reg = <2>;
					label = "busaddr";
					spi-max-frequency = <10000000>;
				};
				/* audio codec */
				codec: codec at 3 {
					compatible = "ti,tlv320aic3x";
					spi-max-frequency = <1000000>;
					reg = <3>;
				};
			};
Quoted 2 lines

This does not work without patch, because of 2 chips selected at one time because of PA14 is periph_a. Probably ROMBOOT changes that.

Yes, boot code stored in ROM probably mux PA14 to periph A function, but with your definition PA 14 should be set GPIO mode when the codec device is created.

I don't see any obvious error in your definition, could you add a trace there [1] to see if the gpio is successfully requested ? Could you also paste the content of /sys/kernel/debug/gpio ?

Quoted 12 lines
Quoted 9 lines
Quoted 4 lines
Quoted 3 lines

If you just want to use it as a chip select for an spi device, take a look at [1].

At [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.

If you want PA14 to control cs1 and PA22 to control cs0 (both configured as GPIOs), you'll have the following definition:

cs-gpios = <&pioA 22 0>, <&pioA 14 0>, <0>, <0>;

See my node.

Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
Quoted 8 lines
Quoted 7 lines
Quoted 4 lines
Quoted 3 lines

Here the gpio is requested by the spi core when defining the cs-gpios property. The gpio controller then request the listed pins to the pin controller (pinctrl driver).

GPIO is not set in driver as GPIO, at least I didn't find it.

Take a look at [1], which is set as the gpio_request_enable callback, called by pinctrl core when a gpio is requested.

But is this called from spi driver when requesting gpios as cs?

Yes, it's part of the gpio_request process:
gpio_request calls request method on at91 gpio_chip which in turn calls pinctrl_request_gpio which then calls the gpio_request_enable method I previously mentioned.

Best Regards,

Boris

[1]http://lxr.free-electrons.com/source/drivers/spi/spi-atmel.c#L1031

#20 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

In reply to Jiří Prchal

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};
Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#21 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Hi Alexandre,

Quoted 8 lines · On Fri, 25 Jul 2014 10:30:54 +0200 Alexandre Belloni…

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;

I guess you meant:

			pinctrl-0 <&pinctrl_spi0 &pinctrl_spi0_custom>;

I suggested the same thing, however I'm pretty sure this is not the source of the problem. As I said, gpio_request already mux the associated pin to GPIO function.

Best Regards,

Boris

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#22 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 8 lines · Boris Brezillon

Hi Alexandre,

Quoted 3 lines · On Fri, 25 Jul 2014 10:30:54 +0200 Alexandre Belloni…

Hi,

On 25/07/2014 at 08:14:40 +0200, Ji?? Prchal wrote :

Quoted 9 lines
Quoted 5 lines
Quoted 2 lines

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;

I guess you meant:

			pinctrl-0 <&pinctrl_spi0 &pinctrl_spi0_custom>;

Sure, you are right

Quoted 13 lines

I suggested the same thing, however I'm pretty sure this is not the source of the problem. As I said, gpio_request already mux the associated pin to GPIO function.

Best Regards,

Boris

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#23 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

In reply to Alexandre Belloni

Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):

Quoted 16 lines

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
Quoted 12 lines
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

#24 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 31 lines · Ji?? Prchal

Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):

Quoted 16 lines

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
Quoted 12 lines
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};
Quoted 3 lines

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

You must not assumed that the pins are muxed to their default state which is gpio and you should set the pinctrl accordingly for each device.

If you don't use PA14 at all, then you don't really care about its state...

Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#25 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):

Quoted 36 lines · Ji?? Prchal
Quoted 31 lines

Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):

Quoted 16 lines

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
Quoted 12 lines
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};
Quoted 3 lines

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

Quoted 6 lines

You must not assumed that the pins are muxed to their default state which is gpio and you should set the pinctrl accordingly for each device.

If you don't use PA14 at all, then you don't really care about its state...

Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not defined in DT?

Quoted 2 lines
#26 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Quoted 4 lines · Ji?? Prchal
Quoted 4 lines
Quoted 3 lines

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

Quoted 9 lines
Quoted 6 lines

You must not assumed that the pins are muxed to their default state which is gpio and you should set the pinctrl accordingly for each device.

If you don't use PA14 at all, then you don't really care about its state...

Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not defined in DT?

Quoted 1 line

If this is really an issue for that chip, I would think that you will change the bootloader to not mux PA14 to periph A and stop it from trying to read it like an spi flash ?

Signature · 3 lines
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#27 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

In reply to Jiří Prchal
Quoted 39 lines · On Fri, 25 Jul 2014 10:59:03 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):

Quoted 36 lines · Ji?? Prchal
Quoted 34 lines

Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):

Quoted 16 lines

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
Quoted 12 lines
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

Quoted 8 lines
Quoted 6 lines

You must not assumed that the pins are muxed to their default state which is gpio and you should set the pinctrl accordingly for each device.

If you don't use PA14 at all, then you don't really care about its state...

Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not defined in DT?

As long as it's populated you should define it in the DT (the DT should represent your hardware) and if you don't want to use the populated device, just set the status property to "disabled" (I'm not sure it works for spi subdevices though).

Signature · 3 lines
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#28 lore raw

Re: [PATCH] ARM: at91: at91sam9x5: sets NPCS0 (PA14) back to GPIO

Dne 25.7.2014 v 11:10 Boris BREZILLON napsal(a):

Quoted 48 lines
Quoted 45 lines · On Fri, 25 Jul 2014 10:59:03 +0200 Ji?? Prchal <[email protected]> wrote:

Dne 25.7.2014 v 10:54 Alexandre Belloni napsal(a):

Quoted 42 lines · Ji?? Prchal
Quoted 31 lines

Dne 25.7.2014 v 10:30 Alexandre Belloni napsal(a):

Quoted 16 lines

Hi,

Quoted 2 lines · Ji?? Prchal

I'm using custom board. My spi node:

			spi0: spi at f0000000 {

You should override the pinctrl here as you are using gpios for the cs.

				pinctrl-0 = <&pinctrl_spi0_custom>;
Quoted 6 lines
				status = "okay";
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;
Quoted 12 lines
		pinctrl at fffff400 {
				spi0 {
					 pinctrl_spi0_custom: spi0-custom {
							 atmel,pins =
									 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
									 <AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					 };
				};
		};
Quoted 3 lines

Of course, it's the way, but in all other drivers, for example LEDS, it's not needed. And in other way, if I will not use PA14 at all, the pin will goes down every spi transfer.

You must not assumed that the pins are muxed to their default state which is gpio and you should set the pinctrl accordingly for each device.

If you don't use PA14 at all, then you don't really care about its state...

Quoted 7 lines
Quoted 2 lines

Yes and no, what about on board is populated some chip on PA14, but for some reason at this time I don't need it and not defined in DT?

As long as it's populated you should define it in the DT (the DT should represent your hardware) and if you don't want to use the populated device, just set the status property to "disabled" (I'm not sure it works for spi subdevices though).

OK, that's good idea.

But, I again try my patch in at91sam9x5.dtsi, it works. / # dmesg | grep fm25

[    1.238281] fm25 spi0.0: 128 KByte fm25 fram
/ # dmesg | grep "enable pin"
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as PIOB13 0x2000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as PIOB15 0x8000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as PIOC18 0x40000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as PIOC20 0x100000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as PIOC16 0x10000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as PIOA28 0x10000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as PIOA21 0x200000
[    0.355468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as GPIO
[    0.355468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as PIOA3 0x8
[    0.355468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as GPIO
[    0.355468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as PIOC28 0x10000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as GPIO
[    0.359375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as PIOC26 0x4000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as GPIO
[    0.359375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as PIOC30 0x40000000
[    0.359375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as GPIO
[    0.363281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as PIOA30 0x40000000
[    0.363281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as GPIO
[    0.363281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as PIOA31 0x80000000
[    0.367187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as GPIO
[    0.367187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as PIOA29 0x20000000
[    0.367187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as GPIO
[    0.367187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as PIOC25 0x2000000
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.234375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.234375] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.250000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.250000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000
[    1.656250] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as GPIO
[    1.656250] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as PIOD21 0x200000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as PIOB18 0x40000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as PIOB16 0x10000
[    1.750000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as GPIO
[    1.750000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as PIOB14 0x4000
[    1.750000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as GPIO
[    1.750000] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as PIOB12 0x1000

When I try it in my boerd dts, it works too.

				spi0 {
					pinctrl_spi0_cs: spi0-cs {
						atmel,pins =
						<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOC 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
						<AT91_PIOA 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
					};
				};

			spi0: spi at f0000000 {
				status = "okay";
				pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs>;
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

/ # dmesg | grep fm25

[    1.234375] fm25 spi0.0: 128 KByte fm25 fram
/ # dmesg | grep "enable pin"
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as PIOB13 0x2000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as PIOB15 0x8000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as PIOC18 0x40000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as PIOC20 0x100000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as PIOC16 0x10000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as PIOA28 0x10000000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as PIOA21 0x200000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as PIOA3 0x8
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as PIOC28 0x10000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as PIOC26 0x4000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as PIOC30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as PIOA30 0x40000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as PIOA31 0x80000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as PIOA29 0x20000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as PIOC25 0x2000000
[    0.964843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.964843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.964843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.964843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.230468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.230468] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as PIOB12 0x1000

When not, it doesn't work.

			spi0: spi at f0000000 {
				status = "okay";
				/*pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_cs>;*/
				cs-gpios = <&pioA 23 0
					    &pioA 22 0
					    &pioC 29 0
					    &pioA 14 0>;

/ # dmesg | grep fm25
/ # dmesg | grep "enable pin"

[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 45 as PIOB13 0x2000
[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 47 as PIOB15 0x8000
[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as GPIO
[    0.328125] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 82 as PIOC18 0x40000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 84 as PIOC20 0x100000
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as GPIO
[    0.332031] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 80 as PIOC16 0x10000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 28 as PIOA28 0x10000000
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as GPIO
[    0.335937] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 21 as PIOA21 0x200000
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 3 as PIOA3 0x8
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as GPIO
[    0.339843] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 92 as PIOC28 0x10000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 90 as PIOC26 0x4000000
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as GPIO
[    0.343750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 94 as PIOC30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 30 as PIOA30 0x40000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 31 as PIOA31 0x80000000
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as GPIO
[    0.347656] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 29 as PIOA29 0x20000000
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as GPIO
[    0.351562] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 89 as PIOC25 0x2000000
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 101 as PIOD5 0x20
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as GPIO
[    0.968750] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 100 as PIOD4 0x10
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 23 as PIOA23 0x800000
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as GPIO
[    1.238281] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 22 as PIOA22 0x400000
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as GPIO
[    1.242187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 93 as PIOC29 0x20000000
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as GPIO
[    1.246093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 14 as PIOA14 0x4000
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as GPIO
[    1.652343] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 117 as PIOD21 0x200000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 50 as PIOB18 0x40000
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as GPIO
[    1.742187] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 48 as PIOB16 0x10000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 46 as PIOB14 0x4000
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as GPIO
[    1.746093] pinctrl-at91 ahb:apb:pinctrl at fffff400: enable pin 44 as PIOB12 0x1000
Quoted 4 lines