Skip to contentSkip to conversation

edmqmx6: enet reset pin bugfix

PATCH New Silvio Fricke 2 participants 3 messages Aug 11, 2014 – Aug 18, 2014

Subsystems (2)
Device tree bindings Arm i.MX and Layerscape
lore
Share & tools
lore

Silvio Fricke

author
#0 lore raw

PATCH 1/1 edmqmx6: enet reset pin bugfix

Hi,

please add this little bugfix to your repo.

Cheers,
Silvio

Silvio Fricke (1):
ARM: dts: imx6: edmqmx6: change enet reset pin

 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Signature · 1 line
2.0.3
author
#1 lore raw

PATCH 1/1 ARM: dts: imx6: edmqmx6: change enet reset pin

Signed-off-by Silvio Fricke <[email protected]>
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +2 -1
index 8c1cb53..4fa2543 100644
@@ -119,7 +119,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii";
-	phy-reset-gpios = <&gpio3 23 0>;
+	phy-reset-gpios = <&gpio1 25 0>;
 	phy-supply = <&vgen2_1v2_eth>;
 	status = "okay";
 };

@@ -339,6 +339,7 @@
 				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
 				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
 				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
 				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
 			>;
 		};
Signature · 1 line
2.0.3
Applied
#2 lore raw

PATCH 1/1 ARM: dts: imx6: edmqmx6: change enet reset pin

Quoted 4 lines · Silvio Fricke
Signed-off-by Silvio Fricke <[email protected]>
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Applied, thanks.

Quoted 25 lines
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +2 -1
index 8c1cb53..4fa2543 100644
@@ -119,7 +119,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rgmii";
-	phy-reset-gpios = <&gpio3 23 0>;
+	phy-reset-gpios = <&gpio1 25 0>;
 	phy-supply = <&vgen2_1v2_eth>;
 	status = "okay";
 };

@@ -339,6 +339,7 @@
 				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
 				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
 				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
 				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
 			>;
 		};
Signature · 1 line
2.0.3