ARM: dts: imx6sx: fix the pad setting for uart CTS_B

PATCH New Fugang Duan 3 participants 4 messages Aug 18, 2014 – Aug 19, 2014 1 message not in the archive

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Device tree bindings Arm i.MX and Layerscape

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Fugang Duan

author

2014-08-18 08:11 UTC #0 lore raw

PATCH 1/1 ARM: dts: imx6sx: fix the pad setting for uart CTS_B

The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit.

Signed-off-by Fugang Duan <[email protected]>

---
 arch/arm/boot/dts/imx6sx-pinfunc.h |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)

arch/arm/boot/dts/imx6sx-pinfunc.h +13 ~~-13~~

index 3e0b816..bb9c6b7 100644
@@ -78,7 +78,7 @@
 #define MX6SX_PAD_GPIO1_IO07__USDHC2_WP                           0x0030 0x0378 0x0870 0x1 0x1
 #define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO                          0x0030 0x0378 0x0770 0x2 0x0
 #define MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK                         0x0030 0x0378 0x0000 0x3 0x0
-#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B                         0x0030 0x0378 0x082C 0x4 0x1
+#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B                         0x0030 0x0378 0x0000 0x4 0x0
 #define MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7                          0x0030 0x0378 0x0000 0x5 0x0
 #define MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET                     0x0030 0x0378 0x0000 0x6 0x0
 #define MX6SX_PAD_GPIO1_IO07__DCIC2_OUT                           0x0030 0x0378 0x0000 0x7 0x0

@@ -96,7 +96,7 @@
 #define MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B                        0x0038 0x0380 0x0000 0x1 0x0
 #define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1                    0x0038 0x0380 0x0820 0x2 0x0
 #define MX6SX_PAD_GPIO1_IO09__CCM_OUT0                            0x0038 0x0380 0x0000 0x3 0x0
-#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B                         0x0038 0x0380 0x0834 0x4 0x1
+#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B                         0x0038 0x0380 0x0000 0x4 0x0
 #define MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9                          0x0038 0x0380 0x0000 0x5 0x0
 #define MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT                        0x0038 0x0380 0x0000 0x6 0x0
 #define MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4                   0x0038 0x0380 0x0000 0x7 0x0

@@ -213,7 +213,7 @@
 #define MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2                        0x0068 0x03B0 0x079C 0x1 0x1
 #define MX6SX_PAD_CSI_DATA07__I2C4_SDA                            0x0068 0x03B0 0x07C4 0x2 0x2
 #define MX6SX_PAD_CSI_DATA07__KPP_ROW_7                           0x0068 0x03B0 0x07DC 0x3 0x0
-#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B                         0x0068 0x03B0 0x0854 0x4 0x1
+#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B                         0x0068 0x03B0 0x0000 0x4 0x0
 #define MX6SX_PAD_CSI_DATA07__GPIO1_IO_21                         0x0068 0x03B0 0x0000 0x5 0x0
 #define MX6SX_PAD_CSI_DATA07__WEIM_DATA_16                        0x0068 0x03B0 0x0000 0x6 0x0
 #define MX6SX_PAD_CSI_DATA07__DCIC1_OUT                           0x0068 0x03B0 0x0000 0x7 0x0

@@ -254,7 +254,7 @@
 #define MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC                           0x0078 0x03C0 0x0708 0x0 0x0
 #define MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0                         0x0078 0x03C0 0x07A4 0x1 0x1
 #define MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD                      0x0078 0x03C0 0x0674 0x2 0x1
-#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B                          0x0078 0x03C0 0x0844 0x3 0x3
+#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B                          0x0078 0x03C0 0x0000 0x3 0x0
 #define MX6SX_PAD_CSI_VSYNC__MQS_RIGHT                            0x0078 0x03C0 0x0000 0x4 0x0
 #define MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25                          0x0078 0x03C0 0x0000 0x5 0x0
 #define MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24                         0x0078 0x03C0 0x0000 0x6 0x0

@@ -352,7 +352,7 @@
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK                      0x00A0 0x03E8 0x0000 0x0 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2                    0x00A0 0x03E8 0x076C 0x1 0x1
 #define MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA                          0x00A0 0x03E8 0x07BC 0x2 0x1
-#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B                       0x00A0 0x03E8 0x082C 0x3 0x3
+#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B                       0x00A0 0x03E8 0x0000 0x3 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__MLB_CLK                           0x00A0 0x03E8 0x07E8 0x4 0x1
 #define MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9                        0x00A0 0x03E8 0x0000 0x5 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR                      0x00A0 0x03E8 0x0000 0x6 0x0

@@ -404,7 +404,7 @@
 #define MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK                          0x00B4 0x03FC 0x0808 0x7 0x0
 #define MX6SX_PAD_KEY_ROW0__KPP_ROW_0                             0x00B8 0x0400 0x0000 0x0 0x0
 #define MX6SX_PAD_KEY_ROW0__USDHC3_WP                             0x00B8 0x0400 0x0000 0x1 0x0
-#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B                           0x00B8 0x0400 0x0854 0x2 0x3
+#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B                           0x00B8 0x0400 0x0000 0x2 0x0
 #define MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI                           0x00B8 0x0400 0x0718 0x3 0x0
 #define MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD                       0x00B8 0x0400 0x0660 0x4 0x0
 #define MX6SX_PAD_KEY_ROW0__GPIO2_IO_15                           0x00B8 0x0400 0x0000 0x5 0x0

@@ -423,7 +423,7 @@
 #define MX6SX_PAD_KEY_ROW1__M4_NMI                                0x00BC 0x0404 0x0000 0x8 0x0
 #define MX6SX_PAD_KEY_ROW2__KPP_ROW_2                             0x00C0 0x0408 0x0000 0x0 0x0
 #define MX6SX_PAD_KEY_ROW2__USDHC4_WP                             0x00C0 0x0408 0x0878 0x1 0x1
-#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B                           0x00C0 0x0408 0x084C 0x2 0x3
+#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B                           0x00C0 0x0408 0x0000 0x2 0x0
 #define MX6SX_PAD_KEY_ROW2__CAN1_RX                               0x00C0 0x0408 0x068C 0x3 0x1
 #define MX6SX_PAD_KEY_ROW2__CANFD_RX1                             0x00C0 0x0408 0x0694 0x4 0x1
 #define MX6SX_PAD_KEY_ROW2__GPIO2_IO_17                           0x00C0 0x0408 0x0000 0x5 0x0

@@ -815,7 +815,7 @@
 #define MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05                     0x0164 0x04AC 0x0000 0x0 0x0
 #define MX6SX_PAD_NAND_DATA05__USDHC2_DATA5                       0x0164 0x04AC 0x0000 0x1 0x0
 #define MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS                        0x0164 0x04AC 0x0000 0x2 0x0
-#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B                        0x0164 0x04AC 0x083C 0x3 0x1
+#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B                        0x0164 0x04AC 0x0000 0x3 0x0
 #define MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC                    0x0164 0x04AC 0x064C 0x4 0x0
 #define MX6SX_PAD_NAND_DATA05__GPIO4_IO_9                         0x0164 0x04AC 0x0000 0x5 0x0
 #define MX6SX_PAD_NAND_DATA05__WEIM_AD_5                          0x0164 0x04AC 0x0000 0x6 0x0

@@ -957,7 +957,7 @@
 #define MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12                    0x019C 0x04E4 0x0000 0x7 0x0
 #define MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3                   0x019C 0x04E4 0x0000 0x9 0x0
 #define MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0                    0x01A0 0x04E8 0x0000 0x0 0x0
-#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B                       0x01A0 0x04E8 0x083C 0x1 0x4
+#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B                       0x01A0 0x04E8 0x0000 0x1 0x0
 #define MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI                       0x01A0 0x04E8 0x0738 0x2 0x1
 #define MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS                        0x01A0 0x04E8 0x0778 0x3 0x2
 #define MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22                      0x01A0 0x04E8 0x06F4 0x4 0x1

@@ -1236,7 +1236,7 @@
 #define MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS                     0x0230 0x0578 0x0670 0x1 0x1
 #define MX6SX_PAD_SD1_DATA2__PWM3_OUT                             0x0230 0x0578 0x0000 0x2 0x0
 #define MX6SX_PAD_SD1_DATA2__GPT_COMPARE2                         0x0230 0x0578 0x0000 0x3 0x0
-#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B                          0x0230 0x0578 0x0834 0x4 0x2
+#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B                          0x0230 0x0578 0x0000 0x4 0x0
 #define MX6SX_PAD_SD1_DATA2__GPIO6_IO_4                           0x0230 0x0578 0x0000 0x5 0x0
 #define MX6SX_PAD_SD1_DATA2__ECSPI4_RDY                           0x0230 0x0578 0x0000 0x6 0x0
 #define MX6SX_PAD_SD1_DATA2__CCM_OUT0                             0x0230 0x0578 0x0000 0x7 0x0

@@ -1315,7 +1315,7 @@
 #define MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3                 0x024C 0x0594 0x0000 0x8 0x0
 #define MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31                        0x024C 0x0594 0x0000 0x9 0x0
 #define MX6SX_PAD_SD3_CLK__USDHC3_CLK                             0x0250 0x0598 0x0000 0x0 0x0
-#define MX6SX_PAD_SD3_CLK__UART4_CTS_B                            0x0250 0x0598 0x0844 0x1 0x0
+#define MX6SX_PAD_SD3_CLK__UART4_CTS_B                            0x0250 0x0598 0x0000 0x1 0x0
 #define MX6SX_PAD_SD3_CLK__ECSPI4_SCLK                            0x0250 0x0598 0x0740 0x2 0x0
 #define MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS                       0x0250 0x0598 0x0680 0x3 0x0
 #define MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC                           0x0250 0x0598 0x0000 0x4 0x0

@@ -1409,7 +1409,7 @@
 #define MX6SX_PAD_SD3_DATA7__USDHC3_DATA7                         0x0274 0x05BC 0x0000 0x0 0x0
 #define MX6SX_PAD_SD3_DATA7__CAN1_RX                              0x0274 0x05BC 0x068C 0x1 0x0
 #define MX6SX_PAD_SD3_DATA7__CANFD_RX1                            0x0274 0x05BC 0x0694 0x2 0x0
-#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B                          0x0274 0x05BC 0x083C 0x3 0x3
+#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B                          0x0274 0x05BC 0x0000 0x3 0x0
 #define MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5                        0x0274 0x05BC 0x0000 0x4 0x0
 #define MX6SX_PAD_SD3_DATA7__GPIO7_IO_9                           0x0274 0x05BC 0x0000 0x5 0x0
 #define MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN                 0x0274 0x05BC 0x0000 0x6 0x0

@@ -1510,7 +1510,7 @@
 #define MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1           0x0298 0x05E0 0x0000 0x9 0x0
 #define MX6SX_PAD_SD4_DATA7__USDHC4_DATA7                         0x029C 0x05E4 0x0000 0x0 0x0
 #define MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08                       0x029C 0x05E4 0x0000 0x1 0x0
-#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B                          0x029C 0x05E4 0x084C 0x2 0x1
+#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B                          0x029C 0x05E4 0x0000 0x2 0x0
 #define MX6SX_PAD_SD4_DATA7__ECSPI3_SS0                           0x029C 0x05E4 0x073C 0x3 0x0
 #define MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15                       0x029C 0x05E4 0x0000 0x4 0x0
 #define MX6SX_PAD_SD4_DATA7__GPIO6_IO_21                          0x029C 0x05E4 0x0000 0x5 0x0

Signature · 1 line

1.7.8

Shawn Guo

2014-08-18 12:29 UTC #1 lore raw

PATCH 1/1 ARM: dts: imx6sx: fix the pad setting for uart CTS_B

Quoted 5 lines · Fugang Duan

The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit.
Signed-off-by Fugang Duan <[email protected]>

How did you find this error? Something is not working without this fix?

Since this file is generated by tool, we may need to feed it back to the tool owner. Oh, FSL kernel also needs this fix, right?

Shawn

Quoted 128 lines

---
 arch/arm/boot/dts/imx6sx-pinfunc.h |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)

arch/arm/boot/dts/imx6sx-pinfunc.h +13 ~~-13~~

index 3e0b816..bb9c6b7 100644
@@ -78,7 +78,7 @@
 #define MX6SX_PAD_GPIO1_IO07__USDHC2_WP                           0x0030 0x0378 0x0870 0x1 0x1
 #define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO                          0x0030 0x0378 0x0770 0x2 0x0
 #define MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK                         0x0030 0x0378 0x0000 0x3 0x0
-#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B                         0x0030 0x0378 0x082C 0x4 0x1
+#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B                         0x0030 0x0378 0x0000 0x4 0x0
 #define MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7                          0x0030 0x0378 0x0000 0x5 0x0
 #define MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET                     0x0030 0x0378 0x0000 0x6 0x0
 #define MX6SX_PAD_GPIO1_IO07__DCIC2_OUT                           0x0030 0x0378 0x0000 0x7 0x0

@@ -96,7 +96,7 @@
 #define MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B                        0x0038 0x0380 0x0000 0x1 0x0
 #define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1                    0x0038 0x0380 0x0820 0x2 0x0
 #define MX6SX_PAD_GPIO1_IO09__CCM_OUT0                            0x0038 0x0380 0x0000 0x3 0x0
-#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B                         0x0038 0x0380 0x0834 0x4 0x1
+#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B                         0x0038 0x0380 0x0000 0x4 0x0
 #define MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9                          0x0038 0x0380 0x0000 0x5 0x0
 #define MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT                        0x0038 0x0380 0x0000 0x6 0x0
 #define MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4                   0x0038 0x0380 0x0000 0x7 0x0

@@ -213,7 +213,7 @@
 #define MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2                        0x0068 0x03B0 0x079C 0x1 0x1
 #define MX6SX_PAD_CSI_DATA07__I2C4_SDA                            0x0068 0x03B0 0x07C4 0x2 0x2
 #define MX6SX_PAD_CSI_DATA07__KPP_ROW_7                           0x0068 0x03B0 0x07DC 0x3 0x0
-#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B                         0x0068 0x03B0 0x0854 0x4 0x1
+#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B                         0x0068 0x03B0 0x0000 0x4 0x0
 #define MX6SX_PAD_CSI_DATA07__GPIO1_IO_21                         0x0068 0x03B0 0x0000 0x5 0x0
 #define MX6SX_PAD_CSI_DATA07__WEIM_DATA_16                        0x0068 0x03B0 0x0000 0x6 0x0
 #define MX6SX_PAD_CSI_DATA07__DCIC1_OUT                           0x0068 0x03B0 0x0000 0x7 0x0

@@ -254,7 +254,7 @@
 #define MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC                           0x0078 0x03C0 0x0708 0x0 0x0
 #define MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0                         0x0078 0x03C0 0x07A4 0x1 0x1
 #define MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD                      0x0078 0x03C0 0x0674 0x2 0x1
-#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B                          0x0078 0x03C0 0x0844 0x3 0x3
+#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B                          0x0078 0x03C0 0x0000 0x3 0x0
 #define MX6SX_PAD_CSI_VSYNC__MQS_RIGHT                            0x0078 0x03C0 0x0000 0x4 0x0
 #define MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25                          0x0078 0x03C0 0x0000 0x5 0x0
 #define MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24                         0x0078 0x03C0 0x0000 0x6 0x0

@@ -352,7 +352,7 @@
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK                      0x00A0 0x03E8 0x0000 0x0 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2                    0x00A0 0x03E8 0x076C 0x1 0x1
 #define MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA                          0x00A0 0x03E8 0x07BC 0x2 0x1
-#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B                       0x00A0 0x03E8 0x082C 0x3 0x3
+#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B                       0x00A0 0x03E8 0x0000 0x3 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__MLB_CLK                           0x00A0 0x03E8 0x07E8 0x4 0x1
 #define MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9                        0x00A0 0x03E8 0x0000 0x5 0x0
 #define MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR                      0x00A0 0x03E8 0x0000 0x6 0x0

@@ -404,7 +404,7 @@
 #define MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK                          0x00B4 0x03FC 0x0808 0x7 0x0
 #define MX6SX_PAD_KEY_ROW0__KPP_ROW_0                             0x00B8 0x0400 0x0000 0x0 0x0
 #define MX6SX_PAD_KEY_ROW0__USDHC3_WP                             0x00B8 0x0400 0x0000 0x1 0x0
-#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B                           0x00B8 0x0400 0x0854 0x2 0x3
+#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B                           0x00B8 0x0400 0x0000 0x2 0x0
 #define MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI                           0x00B8 0x0400 0x0718 0x3 0x0
 #define MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD                       0x00B8 0x0400 0x0660 0x4 0x0
 #define MX6SX_PAD_KEY_ROW0__GPIO2_IO_15                           0x00B8 0x0400 0x0000 0x5 0x0

@@ -423,7 +423,7 @@
 #define MX6SX_PAD_KEY_ROW1__M4_NMI                                0x00BC 0x0404 0x0000 0x8 0x0
 #define MX6SX_PAD_KEY_ROW2__KPP_ROW_2                             0x00C0 0x0408 0x0000 0x0 0x0
 #define MX6SX_PAD_KEY_ROW2__USDHC4_WP                             0x00C0 0x0408 0x0878 0x1 0x1
-#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B                           0x00C0 0x0408 0x084C 0x2 0x3
+#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B                           0x00C0 0x0408 0x0000 0x2 0x0
 #define MX6SX_PAD_KEY_ROW2__CAN1_RX                               0x00C0 0x0408 0x068C 0x3 0x1
 #define MX6SX_PAD_KEY_ROW2__CANFD_RX1                             0x00C0 0x0408 0x0694 0x4 0x1
 #define MX6SX_PAD_KEY_ROW2__GPIO2_IO_17                           0x00C0 0x0408 0x0000 0x5 0x0

@@ -815,7 +815,7 @@
 #define MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05                     0x0164 0x04AC 0x0000 0x0 0x0
 #define MX6SX_PAD_NAND_DATA05__USDHC2_DATA5                       0x0164 0x04AC 0x0000 0x1 0x0
 #define MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS                        0x0164 0x04AC 0x0000 0x2 0x0
-#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B                        0x0164 0x04AC 0x083C 0x3 0x1
+#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B                        0x0164 0x04AC 0x0000 0x3 0x0
 #define MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC                    0x0164 0x04AC 0x064C 0x4 0x0
 #define MX6SX_PAD_NAND_DATA05__GPIO4_IO_9                         0x0164 0x04AC 0x0000 0x5 0x0
 #define MX6SX_PAD_NAND_DATA05__WEIM_AD_5                          0x0164 0x04AC 0x0000 0x6 0x0

@@ -957,7 +957,7 @@
 #define MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12                    0x019C 0x04E4 0x0000 0x7 0x0
 #define MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3                   0x019C 0x04E4 0x0000 0x9 0x0
 #define MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0                    0x01A0 0x04E8 0x0000 0x0 0x0
-#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B                       0x01A0 0x04E8 0x083C 0x1 0x4
+#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B                       0x01A0 0x04E8 0x0000 0x1 0x0
 #define MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI                       0x01A0 0x04E8 0x0738 0x2 0x1
 #define MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS                        0x01A0 0x04E8 0x0778 0x3 0x2
 #define MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22                      0x01A0 0x04E8 0x06F4 0x4 0x1

@@ -1236,7 +1236,7 @@
 #define MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS                     0x0230 0x0578 0x0670 0x1 0x1
 #define MX6SX_PAD_SD1_DATA2__PWM3_OUT                             0x0230 0x0578 0x0000 0x2 0x0
 #define MX6SX_PAD_SD1_DATA2__GPT_COMPARE2                         0x0230 0x0578 0x0000 0x3 0x0
-#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B                          0x0230 0x0578 0x0834 0x4 0x2
+#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B                          0x0230 0x0578 0x0000 0x4 0x0
 #define MX6SX_PAD_SD1_DATA2__GPIO6_IO_4                           0x0230 0x0578 0x0000 0x5 0x0
 #define MX6SX_PAD_SD1_DATA2__ECSPI4_RDY                           0x0230 0x0578 0x0000 0x6 0x0
 #define MX6SX_PAD_SD1_DATA2__CCM_OUT0                             0x0230 0x0578 0x0000 0x7 0x0

@@ -1315,7 +1315,7 @@
 #define MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3                 0x024C 0x0594 0x0000 0x8 0x0
 #define MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31                        0x024C 0x0594 0x0000 0x9 0x0
 #define MX6SX_PAD_SD3_CLK__USDHC3_CLK                             0x0250 0x0598 0x0000 0x0 0x0
-#define MX6SX_PAD_SD3_CLK__UART4_CTS_B                            0x0250 0x0598 0x0844 0x1 0x0
+#define MX6SX_PAD_SD3_CLK__UART4_CTS_B                            0x0250 0x0598 0x0000 0x1 0x0
 #define MX6SX_PAD_SD3_CLK__ECSPI4_SCLK                            0x0250 0x0598 0x0740 0x2 0x0
 #define MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS                       0x0250 0x0598 0x0680 0x3 0x0
 #define MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC                           0x0250 0x0598 0x0000 0x4 0x0

@@ -1409,7 +1409,7 @@
 #define MX6SX_PAD_SD3_DATA7__USDHC3_DATA7                         0x0274 0x05BC 0x0000 0x0 0x0
 #define MX6SX_PAD_SD3_DATA7__CAN1_RX                              0x0274 0x05BC 0x068C 0x1 0x0
 #define MX6SX_PAD_SD3_DATA7__CANFD_RX1                            0x0274 0x05BC 0x0694 0x2 0x0
-#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B                          0x0274 0x05BC 0x083C 0x3 0x3
+#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B                          0x0274 0x05BC 0x0000 0x3 0x0
 #define MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5                        0x0274 0x05BC 0x0000 0x4 0x0
 #define MX6SX_PAD_SD3_DATA7__GPIO7_IO_9                           0x0274 0x05BC 0x0000 0x5 0x0
 #define MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN                 0x0274 0x05BC 0x0000 0x6 0x0

@@ -1510,7 +1510,7 @@
 #define MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1           0x0298 0x05E0 0x0000 0x9 0x0
 #define MX6SX_PAD_SD4_DATA7__USDHC4_DATA7                         0x029C 0x05E4 0x0000 0x0 0x0
 #define MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08                       0x029C 0x05E4 0x0000 0x1 0x0
-#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B                          0x029C 0x05E4 0x084C 0x2 0x1
+#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B                          0x029C 0x05E4 0x0000 0x2 0x0
 #define MX6SX_PAD_SD4_DATA7__ECSPI3_SS0                           0x029C 0x05E4 0x073C 0x3 0x0
 #define MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15                       0x029C 0x05E4 0x0000 0x4 0x0
 #define MX6SX_PAD_SD4_DATA7__GPIO6_IO_21                          0x029C 0x05E4 0x0000 0x5 0x0

Signature · 1 line

1.7.8

A message that is not in the archive (sent off-list or not yet received): [email protected]

fugang.duan at freescale.com

2014-08-19 01:46 UTC #3 lore raw

PATCH 1/1 ARM: dts: imx6sx: fix the pad setting for uart CTS_B

From: David Wolfe <[email protected]> Sent: Monday, August 18, 2014 9:31 PM

Quoted 44 lines

To: Shawn Guo
Cc: Duan Fugang-B38611; linux-arm-kernel at lists.infradead.org; kernel at pengutronix.de
Subject: Re: [PATCH] ARM: dts: imx6sx: fix the pad setting for uart CTS_B
[ Shawn Guo writes: ]
Quoted 9 lines · Fugang Duan
Quoted 5 lines
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit.
Signed-off-by Fugang Duan <[email protected]>
How did you find this error? Something is not working without this fix?
A customer is attempting to change a UART from DCE to DTE mode using pinmux in the device tree. This works for 3-wire serial as in other i.MX6 parts. However, two problems prevent pinmux with hardware flow control on the i.MX6SX. E.g.
	fsl,pins = <
		MX6SX_PAD_SD4_DATA4__UART5_RX    0x1b0b1
		MX6SX_PAD_SD4_DATA5__UART5_TX    0x1b0b1
		MX6SX_PAD_SD4_DATA6__UART5_RTS_B 0x1b0b1
		MX6SX_PAD_SD4_DATA7__UART5_CTS_B 0x1b0b1
	>;
Using the above pinmux for DCE, the CTS_B definition overwrites the RTS_B DAISY register. If you swap the order of DATA6 and DATA7 above, the RTS_B DAISY setting overwrites the CTS_B DAISY register setting and hardware flow control happens to work. But since CTS_B is an output, setting DAISY at all is incorrect. This patch from Fugang Duan corrects this problem.
However, there is a second problem when trying to use pinmux to configure for DTE mode.
	fsl,pins = <
		MX6SX_PAD_SD4_DATA4__UART5_TX    0x1b0b1
		MX6SX_PAD_SD4_DATA5__UART5_RX    0x1b0b1
		MX6SX_PAD_SD4_DATA6__UART5_CTS_B 0x1b0b1
		MX6SX_PAD_SD4_DATA7__UART5_RTS_B 0x1b0b1
	>;

Quoted 8 lines

The definitions for MX6SX_PAD_SD4_DATA6__UART5_CTS_B and MX6SX_PAD_SD4_DATA7__UART5_RTS_B above are missing. They are missing for all UARTs, not just UART5. This patch does not address the missing RTS_B and CTS_B definitions; I assume a second patch is forthcoming. Using UART5 data pads as in the following example, one expects the following RTS/CTS definitions for all UARTs in order to satisfy the DTE pinmux example above.

Yes, the pinfunc file don't define DTE pad setting, so there will have the second patch For the DTE setting.

Thanks for your detail explanation.

Quoted 255 lines

	#define MX6SX_PAD_SD4_DATA6__UART5_RTS_B 0x0298 0x05E0 0x084C 0x2
0x0
	#define MX6SX_PAD_SD4_DATA6__UART5_CTS_B 0x0298 0x05E0 0x0000 0x2
0x0
	#define MX6SX_PAD_SD4_DATA7__UART5_RTS_B 0x029C 0x05E4 0x084C 0x2
0x1
	#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B 0x029C 0x05E4 0x0000 0x2
0x0
Quoted 2 lines
Since this file is generated by tool, we may need to feed it back to the tool owner. Oh, FSL kernel also needs this fix, right?
Yes, the FSL kernel also needs this fix.
Thank you.
Quoted 11 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 78
Quoted 11 lines
---
 arch/arm/boot/dts/imx6sx-pinfunc.h |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
index 3e0b816..bb9c6b7 100644
@@ -78,7 +78,7 @@
 #define MX6SX_PAD_GPIO1_IO07__USDHC2_WP
0x0030 0x0378 0x0870 0x1 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 79
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO07__ENET2_MDIO
0x0030 0x0378 0x0770 0x2 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 80
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO07__AUDMUX_MCLK
0x0030 0x0378 0x0000 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 81
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B
0x0030 0x0378 0x082C 0x4 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 81
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_GPIO1_IO07__UART1_CTS_B
0x0030 0x0378 0x0000 0x4 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 82
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO07__GPIO1_IO_7
0x0030 0x0378 0x0000 0x5 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 83
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO07__SRC_EARLY_RESET
0x0030 0x0378 0x0000 0x6 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 84
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO07__DCIC2_OUT
0x0030 0x0378 0x0000 0x7 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 96
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -96,7 +96,7 @@
 #define MX6SX_PAD_GPIO1_IO09__WDOG2_WDOG_B
0x0038 0x0380 0x0000 0x1 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 97
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO09__SDMA_EXT_EVENT_1
0x0038 0x0380 0x0820 0x2 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 98
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO09__CCM_OUT0
0x0038 0x0380 0x0000 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 99
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B
0x0038 0x0380 0x0834 0x4 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 99
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_GPIO1_IO09__UART2_CTS_B
0x0038 0x0380 0x0000 0x4 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 100
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9
0x0038 0x0380 0x0000 0x5 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 101
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO09__SRC_INT_BOOT
0x0038 0x0380 0x0000 0x6 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 102
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_GPIO1_IO09__OBSERVE_MUX_OUT_4
0x0038 0x0380 0x0000 0x7 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 213
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -213,7 +213,7 @@
 #define MX6SX_PAD_CSI_DATA07__ESAI_TX3_RX2
0x0068 0x03B0 0x079C 0x1 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 214
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_DATA07__I2C4_SDA
0x0068 0x03B0 0x07C4 0x2 0x2
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 215
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_DATA07__KPP_ROW_7
0x0068 0x03B0 0x07DC 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 216
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B
0x0068 0x03B0 0x0854 0x4 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 216
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_CSI_DATA07__UART6_CTS_B
0x0068 0x03B0 0x0000 0x4 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 217
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_DATA07__GPIO1_IO_21
0x0068 0x03B0 0x0000 0x5 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 218
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_DATA07__WEIM_DATA_16
0x0068 0x03B0 0x0000 0x6 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 219
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_DATA07__DCIC1_OUT
0x0068 0x03B0 0x0000 0x7 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 254
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -254,7 +254,7 @@
 #define MX6SX_PAD_CSI_VSYNC__CSI1_VSYNC
0x0078 0x03C0 0x0708 0x0 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 255
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_VSYNC__ESAI_TX5_RX0
0x0078 0x03C0 0x07A4 0x1 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 256
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD
0x0078 0x03C0 0x0674 0x2 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 257
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B
0x0078 0x03C0 0x0844 0x3 0x3
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 257
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_CSI_VSYNC__UART4_CTS_B
0x0078 0x03C0 0x0000 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 258
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_VSYNC__MQS_RIGHT
0x0078 0x03C0 0x0000 0x4 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 259
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_VSYNC__GPIO1_IO_25
0x0078 0x03C0 0x0000 0x5 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 260
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_CSI_VSYNC__WEIM_DATA_24
0x0078 0x03C0 0x0000 0x6 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 352
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -352,7 +352,7 @@
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_TX_CLK
0x00A0 0x03E8 0x0000 0x0 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 353
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_ENET2_TX_CLK__ENET2_REF_CLK2
0x00A0 0x03E8 0x076C 0x1 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 354
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_ENET2_TX_CLK__I2C3_SDA
0x00A0 0x03E8 0x07BC 0x2 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 355
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B
0x00A0 0x03E8 0x082C 0x3 0x3
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 355
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_ENET2_TX_CLK__UART1_CTS_B
0x00A0 0x03E8 0x0000 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 356
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_ENET2_TX_CLK__MLB_CLK
0x00A0 0x03E8 0x07E8 0x4 0x1
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 357
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9
0x00A0 0x03E8 0x0000 0x5 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 358
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_ENET2_TX_CLK__USB_OTG2_PWR
0x00A0 0x03E8 0x0000 0x6 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 404
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -404,7 +404,7 @@
 #define MX6SX_PAD_KEY_COL4__SAI2_RX_BCLK
0x00B4 0x03FC 0x0808 0x7 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 405
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW0__KPP_ROW_0
0x00B8 0x0400 0x0000 0x0 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 406
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW0__USDHC3_WP
0x00B8 0x0400 0x0000 0x1 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 407
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B
0x00B8 0x0400 0x0854 0x2 0x3
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 407
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_KEY_ROW0__UART6_CTS_B
0x00B8 0x0400 0x0000 0x2 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 408
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW0__ECSPI1_MOSI
0x00B8 0x0400 0x0718 0x3 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 409
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW0__AUDMUX_AUD5_TXD
0x00B8 0x0400 0x0660 0x4 0x0
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h line 410
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW0__GPIO2_IO_15
0x00B8 0x0400 0x0000 0x5 0x0
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h line 423
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -423,7 +423,7 @@
 #define MX6SX_PAD_KEY_ROW1__M4_NMI
0x00BC 0x0404 0x0000 0x8 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 424
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW2__KPP_ROW_2
0x00C0 0x0408 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 425
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW2__USDHC4_WP
0x00C0 0x0408 0x0878 0x1 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 426
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B
0x00C0 0x0408 0x084C 0x2 0x3
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arch/arm/boot/dts/imx6sx-pinfunc.h line 426
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arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_KEY_ROW2__UART5_CTS_B
0x00C0 0x0408 0x0000 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 427
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW2__CAN1_RX
0x00C0 0x0408 0x068C 0x3 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 428
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW2__CANFD_RX1
0x00C0 0x0408 0x0694 0x4 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 429
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_KEY_ROW2__GPIO2_IO_17
0x00C0 0x0408 0x0000 0x5 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 815
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -815,7 +815,7 @@
 #define MX6SX_PAD_NAND_DATA05__RAWNAND_DATA05
0x0164 0x04AC 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 816
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_NAND_DATA05__USDHC2_DATA5
0x0164 0x04AC 0x0000 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 817
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_NAND_DATA05__QSPI2_B_DQS
0x0164 0x04AC 0x0000 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 818
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B
0x0164 0x04AC 0x083C 0x3 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 818
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arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_NAND_DATA05__UART3_CTS_B
0x0164 0x04AC 0x0000 0x3 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 819
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_NAND_DATA05__AUDMUX_AUD4_RXC
0x0164 0x04AC 0x064C 0x4 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 820
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_NAND_DATA05__GPIO4_IO_9
0x0164 0x04AC 0x0000 0x5 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 821
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_NAND_DATA05__WEIM_AD_5
0x0164 0x04AC 0x0000 0x6 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 957
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -957,7 +957,7 @@
 #define MX6SX_PAD_QSPI1A_SS1_B__SIM_M_HADDR_12
0x019C 0x04E4 0x0000 0x7 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 958
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_QSPI1A_SS1_B__SDMA_DEBUG_PC_3
0x019C 0x04E4 0x0000 0x9 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 959
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0
0x01A0 0x04E8 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 960
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B
0x01A0 0x04E8 0x083C 0x1 0x4
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arch/arm/boot/dts/imx6sx-pinfunc.h line 960
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arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_QSPI1B_DATA0__UART3_CTS_B
0x01A0 0x04E8 0x0000 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 961
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_QSPI1B_DATA0__ECSPI3_MOSI
0x01A0 0x04E8 0x0738 0x2 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 962
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_QSPI1B_DATA0__ESAI_RX_FS
0x01A0 0x04E8 0x0778 0x3 0x2
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arch/arm/boot/dts/imx6sx-pinfunc.h line 963
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_QSPI1B_DATA0__CSI1_DATA_22
0x01A0 0x04E8 0x06F4 0x4 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1236
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -1236,7 +1236,7 @@
 #define MX6SX_PAD_SD1_DATA2__AUDMUX_AUD5_TXFS
0x0230 0x0578 0x0670 0x1 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1237
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD1_DATA2__PWM3_OUT
0x0230 0x0578 0x0000 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1238
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD1_DATA2__GPT_COMPARE2
0x0230 0x0578 0x0000 0x3 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1239
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B
0x0230 0x0578 0x0834 0x4 0x2
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1239
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arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_SD1_DATA2__UART2_CTS_B
0x0230 0x0578 0x0000 0x4 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1240
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD1_DATA2__GPIO6_IO_4
0x0230 0x0578 0x0000 0x5 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1241
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD1_DATA2__ECSPI4_RDY
0x0230 0x0578 0x0000 0x6 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1242
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD1_DATA2__CCM_OUT0
0x0230 0x0578 0x0000 0x7 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1315
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -1315,7 +1315,7 @@
 #define MX6SX_PAD_SD2_DATA3__VADC_CLAMP_CURRENT_3
0x024C 0x0594 0x0000 0x8 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1316
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD2_DATA3__MMDC_DEBUG_31
0x024C 0x0594 0x0000 0x9 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1317
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_CLK__USDHC3_CLK
0x0250 0x0598 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1318
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_SD3_CLK__UART4_CTS_B
0x0250 0x0598 0x0844 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1318
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arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_SD3_CLK__UART4_CTS_B
0x0250 0x0598 0x0000 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1319
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_CLK__ECSPI4_SCLK
0x0250 0x0598 0x0740 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1320
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_CLK__AUDMUX_AUD6_RXFS
0x0250 0x0598 0x0680 0x3 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1321
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_CLK__LCDIF2_VSYNC
0x0250 0x0598 0x0000 0x4 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1409
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -1409,7 +1409,7 @@
 #define MX6SX_PAD_SD3_DATA7__USDHC3_DATA7
0x0274 0x05BC 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1410
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_DATA7__CAN1_RX
0x0274 0x05BC 0x068C 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1411
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_DATA7__CANFD_RX1
0x0274 0x05BC 0x0694 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1412
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B
0x0274 0x05BC 0x083C 0x3 0x3
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1412
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_SD3_DATA7__UART3_CTS_B
0x0274 0x05BC 0x0000 0x3 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1413
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_DATA7__LCDIF2_DATA_5
0x0274 0x05BC 0x0000 0x4 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1414
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_DATA7__GPIO7_IO_9
0x0274 0x05BC 0x0000 0x5 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1415
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD3_DATA7__ENET1_1588_EVENT0_IN
0x0274 0x05BC 0x0000 0x6 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1510
Quoted 2 lines
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
@@ -1510,7 +1510,7 @@
 #define MX6SX_PAD_SD4_DATA6__SDMA_DEBUG_EVENT_CHANNEL_1
0x0298 0x05E0 0x0000 0x9 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1511
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD4_DATA7__USDHC4_DATA7
0x029C 0x05E4 0x0000 0x0 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1512
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD4_DATA7__RAWNAND_DATA08
0x029C 0x05E4 0x0000 0x1 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1513
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -1
-#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B
0x029C 0x05E4 0x084C 0x2 0x1
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1513
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +1 -0
+#define MX6SX_PAD_SD4_DATA7__UART5_CTS_B
0x029C 0x05E4 0x0000 0x2 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1514
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD4_DATA7__ECSPI3_SS0
0x029C 0x05E4 0x073C 0x3 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1515
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arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD4_DATA7__LCDIF2_DATA_15
0x029C 0x05E4 0x0000 0x4 0x0
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arch/arm/boot/dts/imx6sx-pinfunc.h line 1516
Quoted 1 line
arch/arm/boot/dts/imx6sx-pinfunc.h +0 -0
 #define MX6SX_PAD_SD4_DATA7__GPIO6_IO_21
0x029C 0x05E4 0x0000 0x5 0x0
Quoted 3 lines
Quoted 3 lines
--
1.7.8
--
David Wolfe
MPU Software Apps
Freescale Semiconductor, Inc.
david.wolfe at freescale.com

Shawn Guo

Applied

2014-08-19 12:07 UTC #4 lore raw

PATCH 1/1 ARM: dts: imx6sx: fix the pad setting for uart CTS_B

In reply to Fugang Duan

Quoted 5 lines · Fugang Duan

The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit.
Signed-off-by Fugang Duan <[email protected]>

Applied, thanks.