ARM: meson: add preliminary support for MesonX/Meson6 SoCs

The SoC has four fully functional UARTs which use the same programming model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On) which cannot be powered off.

Signed-off-by Carlo Caione <[email protected]>

---

The SoC has four fully functional UARTs which use the same programming model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On) which cannot be powered off.

Signed-off-by Carlo Caione <[email protected]>

---

Quoted 6 lines · Carlo Caione

The SoC has four fully functional UARTs which use the same programming model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On) which cannot be powered off.

Signed-off-by Carlo Caione <[email protected]>

---

Ping

Quoted 5 lines · Carlo Caione

Quoted 4 lines · Carlo Caione

The SoC has four fully functional UARTs which use the same programming model. They are named UART_A, UART_B, UART_C and UART_AO (Always-On) which cannot be powered off.

Quoted 4 lines

Quoted 2 lines

Signed-off-by Carlo Caione <[email protected]>

---

Ping

It's still in my queue, sorry, been busy with conferences and the like, should get to everything next week...

Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E.

The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A.

Signed-off-by Carlo Caione <[email protected]>

---
  drivers/clocksource/Kconfig        |   3 +
  drivers/clocksource/Makefile       |   1 +
  drivers/clocksource/meson6_timer.c | 187 +++++++++++++++++++++++++++++++++++++
  3 files changed, 191 insertions(+)

create mode 100644 drivers/clocksource/meson6_timer.c

drivers/clocksource/Kconfig +3 -0

index cfd6519..38029ca 100644
@@ -30,6 +30,9 @@ config ARMADA_370_XP_TIMER
  	bool
  	select CLKSRC_OF
 
+config MESON6_TIMER
+	bool
+
  config ORION_TIMER
  	select CLKSRC_OF
  	select CLKSRC_MMIO

drivers/clocksource/Makefile +1 -0

index 7fd9fd1..e4ae987 100644
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARCH_PRIMA2)	+= timer-prima2.o
  obj-$(CONFIG_ARCH_U300)		+= timer-u300.o
  obj-$(CONFIG_SUN4I_TIMER)	+= sun4i_timer.o
  obj-$(CONFIG_SUN5I_HSTIMER)	+= timer-sun5i.o
+obj-$(CONFIG_MESON6_TIMER)	+= meson6_timer.o
  obj-$(CONFIG_ARCH_TEGRA)	+= tegra20_timer.o
  obj-$(CONFIG_VT8500_TIMER)	+= vt8500_timer.o
  obj-$(CONFIG_ARCH_NSPIRE)	+= zevio-timer.o

drivers/clocksource/meson6_timer.c new file +20 -0

new file mode 100644
index 0000000..1ef1095
@@ -0,0 +1,187 @@
+/*
+ * Amlogic Meson6 SoCs timer handling.
+ *
+ * Copyright (C) 2014 Carlo Caione
+ *
+ * Carlo Caione <[email protected]>
+ *
+ * Based on code from Amlogic, Inc
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/sched_clock.h>

drivers/clocksource/meson6_timer.c new file +96 -0

+
+static void __iomem *timer_base;
+
+static cycle_t cycle_read_timer_e(struct clocksource *cs)
+{
+	return (cycle_t)readl(timer_base + TIMER_ISA_E_VAL);
+}
+
+static struct clocksource clocksource_timer_e = {
+	.name	= "meson6_timerE",
+	.rating	= 300,
+	.read	= cycle_read_timer_e,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static u64 notrace meson6_timer_sched_read(void)
+{
+	return (u64)readl(timer_base + TIMER_ISA_E_VAL);
+}
+
+static void meson6_clkevt_time_stop(unsigned char timer)
+{
+	u32 val = readl(timer_base + TIMER_ISA_MUX);
+
+	writel(val & ~TIMER_t_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX);
+}
+
+static void meson6_clkevt_time_setup(unsigned char timer, unsigned long delay)
+{
+	writel(delay, timer_base + TIMER_ISA_t_VAL(timer));
+}
+
+static void meson6_clkevt_time_start(unsigned char timer, bool periodic)
+{
+	u32 val = readl(timer_base + TIMER_ISA_MUX);
+
+	if (periodic)
+		val |= TIMER_t_PERIODIC_BIT(timer);
+	else
+		val &= ~TIMER_t_PERIODIC_BIT(timer);
+
+	writel(val | TIMER_t_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX);
+}
+
+static void meson6_clkevt_mode(enum clock_event_mode mode,
+			       struct clock_event_device *clk)
+{
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		meson6_clkevt_time_stop(A);
+		meson6_clkevt_time_setup(A, USEC_PER_SEC/HZ - 1);
+		meson6_clkevt_time_start(A, true);
+		break;
+	case CLOCK_EVT_MODE_ONESHOT:
+		meson6_clkevt_time_stop(A);
+		meson6_clkevt_time_start(A, false);
+		break;
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	default:
+		meson6_clkevt_time_stop(A);
+		break;
+	}
+}
+
+static int meson6_clkevt_next_event(unsigned long evt,
+				    struct clock_event_device *unused)
+{
+	meson6_clkevt_time_stop(A);
+	meson6_clkevt_time_setup(A, evt);
+	meson6_clkevt_time_start(A, false);
+
+	return 0;
+}
+
+static struct clock_event_device meson6_clockevent = {
+	.name		= "meson6_tick",
+	.rating		= 400,
+	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+	.set_mode	= meson6_clkevt_mode,
+	.set_next_event	= meson6_clkevt_next_event,
+};
+
+static irqreturn_t meson6_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction meson6_timer_irq = {
+	.name		= "meson6_timerA",
+	.flags		= IRQF_TIMER | IRQF_IRQPOLL,

drivers/clocksource/meson6_timer.c new file +5 -0

+	if (!timer_base)
+		panic("Can't map registers");
+
+	irq = irq_of_parse_and_map(node, 0);
+	if (irq <= 0)

drivers/clocksource/meson6_timer.c new file +16 -0

+
+	/* Stop the timer A */
+	meson6_clkevt_time_stop(A);
+
+	ret = setup_irq(irq, &meson6_timer_irq);
+	if (ret)
+		pr_warn("failed to setup irq %d\n", irq);
+
+	meson6_clockevent.cpumask = cpu_possible_mask;
+	meson6_clockevent.irq = irq;
+
+	clockevents_config_and_register(&meson6_clockevent, USEC_PER_SEC,
+					1, 0xfffe);
+}
+CLOCKSOURCE_OF_DECLARE(meson6, "amlogic,meson6-timer",
+		       meson6_timer_init);

drivers/clocksource/meson6_timer.c line 30

Quoted 6 lines · Carlo Caione

drivers/clocksource/meson6_timer.c new file +6 -0

+enum {
+	A = 0,
+	B,
+	C,
+	D,
+};

You are just using timer A, so this enum is unnecessary. Please use a define instead. Also it would be better, if the define would be explenatory then just the letter 'A'.

drivers/clocksource/meson6_timer.c line 36

Quoted 6 lines

drivers/clocksource/meson6_timer.c new file +6 -0

+
+#define TIMER_ISA_MUX		0
+#define TIMER_ISA_E_VAL		0x14
+#define TIMER_ISA_t_VAL(t)	((t + 1) << 2)
+
+#define TIMER_t_INPUT_BIT(t)	(2 * t)

Please put braces around 't'.

Quoted 1 line

+#define TIMER_E_INPUT_BIT 8

From the enum above, missing timer E would be 4 so you can use the TIMER_t_INPUT_BIT(t) macro, right?

drivers/clocksource/meson6_timer.c line 42

Quoted 5 lines

drivers/clocksource/meson6_timer.c new file +5 -0

+#define TIMER_t_INPUT_MASK(t)	(3UL << TIMER_t_INPUT_BIT(t))
+#define TIMER_E_INPUT_MASK	(7UL << TIMER_E_INPUT_BIT)
+#define TIMER_t_ENABLE_BIT(t)	(16 + t)
+#define TIMER_E_ENABLE_BIT	20
+#define TIMER_t_PERIODIC_BIT(t)	(12 + t)

Please put braces around 't'.

drivers/clocksource/meson6_timer.c line 45

Quoted 3 lines

drivers/clocksource/meson6_timer.c new file +3 -0

+
+#define TIMER_UNIT_1us		0
+#define TIMER_E_UNIT_1us	1

Please don't use lower case characters in defines.

drivers/clocksource/meson6_timer.c line 151

Quoted 6 lines

drivers/clocksource/meson6_timer.c new file +6 -0

+static void __init meson6_timer_init(struct device_node *node)
+{
+	u32 val;
+	int ret, irq;
+
+	timer_base = of_iomap(node, 0);

Please use of_io_request_and_map instead.

Quoted 9 lines

drivers/clocksource/meson6_timer.c new file +9 -0

+	if (!timer_base)
+		panic("Can't map registers");
+
+	irq = irq_of_parse_and_map(node, 0);
+	if (irq <= 0)
+		panic("Can't parse IRQ");
+
+	/* Set 1us for timer E */
+	val = readl(timer_base + TIMER_ISA_MUX);

drivers/clocksource/meson6_timer.c line 166

Quoted 6 lines

drivers/clocksource/meson6_timer.c new file +6 -0

+	val &= ~TIMER_E_INPUT_MASK;
+	val |= TIMER_E_UNIT_1us << TIMER_E_INPUT_BIT;
+	writel(val, timer_base + TIMER_ISA_MUX);
+
+	sched_clock_register(meson6_timer_sched_read, 32, USEC_PER_SEC);
+	clocksource_register_khz(&clocksource_timer_e, 1000);

Why don't you use clocksource_mmio_init?

drivers/clocksource/meson6_timer.c line 171

Quoted 5 lines

drivers/clocksource/meson6_timer.c new file +5 -0

+
+	/* Timer A base 1us */
+	val &= ~TIMER_t_INPUT_MASK(A);
+	val |= TIMER_UNIT_1us << TIMER_t_INPUT_BIT(A);
+	writel(val, timer_base + TIMER_ISA_MUX);

Is this dependant on any clocking of the timer?

Meson6 SoCs are equipped with 5 32-bit timers, called TIMER_A, TIMER_B, TIMER_C, TIMER_D and TIMER_E.

The driver is providing clocksource support for the 32-bit counter using TIMER_E. Clockevents are also supported using TIMER_A.

Signed-off-by Carlo Caione <[email protected]>

---
 drivers/clocksource/Kconfig        |   3 +
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/meson6_timer.c | 187 +++++++++++++++++++++++++++++++++++++
 3 files changed, 191 insertions(+)
 create mode 100644 drivers/clocksource/meson6_timer.c

drivers/clocksource/Kconfig +3 -0

index cfd6519..38029ca 100644
@@ -30,6 +30,9 @@ config ARMADA_370_XP_TIMER
 	bool
 	select CLKSRC_OF
 
+config MESON6_TIMER
+	bool
+
 config ORION_TIMER
 	select CLKSRC_OF
 	select CLKSRC_MMIO

drivers/clocksource/Makefile +1 -0

index 7fd9fd1..e4ae987 100644
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARCH_PRIMA2)	+= timer-prima2.o
 obj-$(CONFIG_ARCH_U300)		+= timer-u300.o
 obj-$(CONFIG_SUN4I_TIMER)	+= sun4i_timer.o
 obj-$(CONFIG_SUN5I_HSTIMER)	+= timer-sun5i.o
+obj-$(CONFIG_MESON6_TIMER)	+= meson6_timer.o
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra20_timer.o
 obj-$(CONFIG_VT8500_TIMER)	+= vt8500_timer.o
 obj-$(CONFIG_ARCH_NSPIRE)	+= zevio-timer.o

drivers/clocksource/meson6_timer.c new file +20 -0

new file mode 100644
index 0000000..1ef1095
@@ -0,0 +1,187 @@
+/*
+ * Amlogic Meson6 SoCs timer handling.
+ *
+ * Copyright (C) 2014 Carlo Caione
+ *
+ * Carlo Caione <[email protected]>
+ *
+ * Based on code from Amlogic, Inc
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/sched_clock.h>

drivers/clocksource/meson6_timer.c new file +5 -0

+	.rating	= 300,
+	.read	= cycle_read_timer_e,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};

drivers/clocksource/meson6_timer.c line 30

Quoted 6 lines · Carlo Caione

drivers/clocksource/meson6_timer.c new file +6 -0

+enum {
+	A = 0,
+	B,
+	C,
+	D,
+};

That's a very terse set of enum names. I would recomment something a little longer.

Any reason for missing E?

drivers/clocksource/meson6_timer.c line 42

Quoted 11 lines

drivers/clocksource/meson6_timer.c new file +11 -0

+#define TIMER_ISA_MUX		0
+#define TIMER_ISA_E_VAL		0x14
+#define TIMER_ISA_t_VAL(t)	((t + 1) << 2)
+
+#define TIMER_t_INPUT_BIT(t)	(2 * t)
+#define TIMER_E_INPUT_BIT	8
+#define TIMER_t_INPUT_MASK(t)	(3UL << TIMER_t_INPUT_BIT(t))
+#define TIMER_E_INPUT_MASK	(7UL << TIMER_E_INPUT_BIT)
+#define TIMER_t_ENABLE_BIT(t)	(16 + t)
+#define TIMER_E_ENABLE_BIT	20
+#define TIMER_t_PERIODIC_BIT(t)	(12 + t)

While I don't think it matters for any of these, it's usually good practice to add parentheses around arguments, e.g.

#define FOO(x) ((x) * 2)

So you can avoid bad expansions in cases like:

FOO(reg + 4)

drivers/clocksource/meson6_timer.c line 55

Quoted 13 lines

drivers/clocksource/meson6_timer.c new file +13 -0

+
+#define TIMER_UNIT_1us		0
+#define TIMER_E_UNIT_1us	1
+
+static void __iomem *timer_base;
+
+static cycle_t cycle_read_timer_e(struct clocksource *cs)
+{
+	return (cycle_t)readl(timer_base + TIMER_ISA_E_VAL);
+}
+
+static struct clocksource clocksource_timer_e = {
+	.name	= "meson6_timerE",

Do we really care which specific timer we're using within the block?

Why not just "meson6_clocksource"?

Quoted 5 lines

drivers/clocksource/meson6_timer.c new file +5 -0

+	.rating	= 300,
+	.read	= cycle_read_timer_e,
+	.mask	= CLOCKSOURCE_MASK(32),
+	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
+};

[...]

drivers/clocksource/meson6_timer.c line 140

Quoted 11 lines

drivers/clocksource/meson6_timer.c new file +11 -0

+static irqreturn_t meson6_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction meson6_timer_irq = {
+	.name		= "meson6_timerA",

Similarly to the clocksource naming, this might be better as "meson6_timer", without the 'A'.

Signed-off-by Carlo Caione <[email protected]>

---
 arch/arm/Kconfig             |  2 ++
 arch/arm/Makefile            |  1 +
 arch/arm/mach-meson/Kconfig  | 13 +++++++++++++
 arch/arm/mach-meson/Makefile |  1 +
 arch/arm/mach-meson/meson.c  | 36 ++++++++++++++++++++++++++++++++++++
 5 files changed, 53 insertions(+)
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/meson.c

arch/arm/Kconfig +2 -0

index c49a775..cc52a8f 100644
@@ -888,6 +888,8 @@ source "arch/arm/mach-keystone/Kconfig"
 
 source "arch/arm/mach-ks8695/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-msm/Kconfig"
 
 source "arch/arm/mach-moxart/Kconfig"

arch/arm/Makefile +1 -0

index 0ce9d0f..320aa57 100644
@@ -168,6 +168,7 @@ machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 machine-$(CONFIG_ARCH_KS8695)		+= ks8695
 machine-$(CONFIG_ARCH_LPC32XX)		+= lpc32xx
+machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MMP)		+= mmp
 machine-$(CONFIG_ARCH_MOXART)		+= moxart
 machine-$(CONFIG_ARCH_MSM)		+= msm

arch/arm/mach-meson/Kconfig new file +13 -0

new file mode 100644
index 0000000..2c1154e
@@ -0,0 +1,13 @@
+menuconfig ARCH_MESON
+	bool "Amlogic Meson SoCs" if ARCH_MULTI_V7
+	select GENERIC_IRQ_CHIP
+	select ARM_GIC
+
+if ARCH_MESON
+
+config MACH_MESON6
+	bool "Amlogic Meson6 (8726MX) SoCs support"
+	default ARCH_MESON
+	select MESON6_TIMER
+
+endif

arch/arm/mach-meson/Makefile new file +1 -0

new file mode 100644
index 0000000..9d7380e
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_MESON) += meson.o

arch/arm/mach-meson/meson.c new file +12 -0

new file mode 100644
index 0000000..4528312
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.

Hi Carlo,

arch/arm/mach-meson/meson.c line 22

Quoted 4 lines

arch/arm/mach-meson/meson.c new file +4 -0

+static __init void meson_init_machine_devicetree(void)
+{
+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}

This is the default, you can just remove it

arch/arm/mach-meson/meson.c line 28

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+static const char * const m6_common_board_compat[] = {
+	"amlogic,8726_mx",
+	"amlogic,8726_mxs",
+	"amlogic,8726_mxl",
+	"amlogic,meson6",

Why are all those compatibles needed? Usually, you add a single one per SoC (which would be the last in your case I guess.

arch/arm/mach-meson/meson.c line 33

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+	NULL,
+};
+
+DT_MACHINE_START(AML8726_MX, "Amlogic Meson6 platform")
+	.init_machine	= meson_init_machine_devicetree,

And since you don't need the init machine, you can just use the generic machine support. I'm not sure what's been decided on this, should we remove such empty machines?

Quoted 1 line

Hi Carlo,

Hi Maxime,
thank you for reviewing also these patches, I'll keep you in CC for the next revisions if you are interested.

Quoted 6 lines

arch/arm/mach-meson/meson.c line 22

Quoted 4 lines

arch/arm/mach-meson/meson.c new file +4 -0

+static __init void meson_init_machine_devicetree(void)
+{
+   of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}

This is the default, you can just remove it

Agree

Quoted 8 lines

arch/arm/mach-meson/meson.c line 28

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+static const char * const m6_common_board_compat[] = {
+   "amlogic,8726_mx",
+   "amlogic,8726_mxs",
+   "amlogic,8726_mxl",
+   "amlogic,meson6",

Why are all those compatibles needed? Usually, you add a single one per SoC (which would be the last in your case I guess.

They are taken from the weird DTS in the original Amlogic sources but I guess you are right. I am actually more inclined to just leave "8726_mx" and "meson6" since online you can find equally both the versions for exactly the same SoCs.

Quoted 9 lines

arch/arm/mach-meson/meson.c line 33

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+   NULL,
+};
+
+DT_MACHINE_START(AML8726_MX, "Amlogic Meson6 platform")
+   .init_machine   = meson_init_machine_devicetree,

And since you don't need the init machine, you can just use the generic machine support. I'm not sure what's been decided on this, should we remove such empty machines?

I can get rid of the .init_machine but what about the .dt_compat field?

Thanks,

--
Carlo Caione

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Quoted 1 line · Maxime Ripard

Hi Carlo,

Hi Maxime,
thank you for reviewing also these patches, I'll keep you in CC for the next revisions if you are interested.

Quoted 8 lines

arch/arm/mach-meson/meson.c line 28

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+static const char * const m6_common_board_compat[] = {
+	"amlogic,8726_mx",
+	"amlogic,8726_mxs",
+	"amlogic,8726_mxl",
+	"amlogic,meson6",

Why are all those compatibles needed? Usually, you add a single one per SoC (which would be the last in your case I guess.

They are taken from the weird DTS in the original Amlogic sources but I guess you are right. I am actually more inclined to just leave "8726_mx" and "meson6" since online you can find equally both the versions for exactly the same SoCs.

Quoted 9 lines

arch/arm/mach-meson/meson.c line 33

Quoted 5 lines

arch/arm/mach-meson/meson.c new file +5 -0

+	NULL,
+};
+
+DT_MACHINE_START(AML8726_MX, "Amlogic Meson6 platform")
+	.init_machine	= meson_init_machine_devicetree,

And since you don't need the init machine, you can just use the generic machine support. I'm not sure what's been decided on this, should we remove such empty machines?

I can get rid of the .init_machine but what about the .dt_compat field?

The Meson6 SoC is produced by Amlogic inc. and it is based on 2 Cortex A9 and an ARM Mali-400 GPU.
This patch adds two basic DTSI for the preliminary support of Meson and Meson6 SoCs. Another DTS is also added for supporting the atv1200 board, produced by Geniatech inc.
index 0000000..d62add4

arch/arm/boot/dts/meson6.dtsi new file +12 -0

@@ -0,0 +1,44 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "meson.dtsi"
+
+/ {

arch/arm/boot/dts/meson6.dtsi new file +13 -0

+		};
+	};
+
+	clocks {
+		#address-cells = <1>;
+
+		clk81: clk at 0 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <200000000>;
+		};
+	};
+}; /* end of / */

Signature · 1 line

1.9.1

Hi,

arch/arm/boot/dts/meson6.dtsi line 22

Quoted 13 lines

arch/arm/boot/dts/meson6.dtsi new file +13 -0

+/include/ "meson.dtsi"
+
+/ {
+     model = "Amlogic Meson6 SoC";
+     compatible = "amlogic,meson6", "amlogic,8726_mx";
+
+     interrupt-parent = <&gic>;
+
+     cpus {
+             #address-cells = <1>;
+             #size-cells = <0>;
+
+             cpu at 0 {

The address after the @ should match the value of the 'reg' property.

arch/arm/boot/dts/meson6.dtsi line 31

Quoted 9 lines

arch/arm/boot/dts/meson6.dtsi new file +9 -0

+                     device_type = "cpu";
+                     compatible = "arm,cortex-a9";
+                     reg = <0x200>;
+             };
+
+             cpu at 1 {
+                     device_type = "cpu";
+                     compatible = "arm,cortex-a9";
+                     reg = <0x1>;

According to Documentation/devicetree/bindings/arm/cpus.txt, this should be set to bits [23:0] of the CPU MPIDR register, in this case 0x201.

Quoted 17 lines · Beniamino Galvani

Hi,

arch/arm/boot/dts/meson6.dtsi line 22

Quoted 13 lines

arch/arm/boot/dts/meson6.dtsi new file +13 -0

+/include/ "meson.dtsi"
+
+/ {
+     model = "Amlogic Meson6 SoC";
+     compatible = "amlogic,meson6", "amlogic,8726_mx";
+
+     interrupt-parent = <&gic>;
+
+     cpus {
+             #address-cells = <1>;
+             #size-cells = <0>;
+
+             cpu at 0 {

The address after the @ should match the value of the 'reg' property.

The Meson6 SoC is produced by Amlogic inc. and it is based on 2 Cortex A9 and an ARM Mali-400 GPU.
This patch adds two basic DTSI for the preliminary support of Meson and Meson6 SoCs. Another DTS is also added for supporting the atv1200 board, produced by Geniatech inc.

Signed-off-by Carlo Caione <[email protected]>

---
 arch/arm/boot/dts/Makefile           |  1 +
 arch/arm/boot/dts/meson.dtsi         | 75 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/meson6-atv1200.dts | 27 +++++++++++++
 arch/arm/boot/dts/meson6.dtsi        | 44 +++++++++++++++++++++
 4 files changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/meson.dtsi
 create mode 100644 arch/arm/boot/dts/meson6-atv1200.dts
 create mode 100644 arch/arm/boot/dts/meson6.dtsi

arch/arm/boot/dts/Makefile +1 -0

index b8c5cd3..604acce 100644
@@ -159,6 +159,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
 	kirkwood-ts419-6282.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
+dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
 dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
 dtb-$(CONFIG_ARCH_MXC) += \
 	imx25-eukrea-mbimxsd25-baseboard.dtb \

arch/arm/boot/dts/meson.dtsi new file +26 -0

new file mode 100644
index 0000000..934bb2c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart_AO;
+		serial1 = &uart_A;
+		serial2 = &uart_B;
+		serial3 = &uart_C;
+	};
+
+	gic: interrupt-controller at c4301000 {
+		compatible = "arm,cortex-a9-gic";
+		reg = <0xc4301000 0x1000>,
+		      <0xc4300100 0x0100>;
+		interrupt-controller;

arch/arm/boot/dts/meson.dtsi new file +25 -0

+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		uart_AO: serial at c81004c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81004c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_A: serial at c81084c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_B: serial at c81084dc {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084dc 0x14>;
+			interrupts = <0 90 1>;

arch/arm/boot/dts/meson.dtsi new file +4 -0

+		};
+	};
+}; /* end of / */
+

arch/arm/boot/dts/meson6-atv1200.dts new file +27 -0

new file mode 100644
index 0000000..b358402
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/include/ "meson6.dtsi"
+
+/ {
+	model = "Geniatech ATV1200";
+	compatible = "geniatech,atv1200";
+
+	memory {
+		reg = <0x40000000 0x80000000>;
+	};
+
+	soc at c8100000 {
+		uart_AO: serial at c81004c0 {
+			status = "okay";
+		};
+	};
+}; /* end of / */
+

arch/arm/boot/dts/meson6.dtsi new file +33 -0

new file mode 100644
index 0000000..d62add4
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "meson.dtsi"
+
+/ {
+	model = "Amlogic Meson6 SoC";
+	compatible = "amlogic,meson6", "amlogic,8726_mx";
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x200>;
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x1>;
+		};
+	};

On Sun, Aug 17, 2014 at 11:49:52AM +0100, Carlo Caione wrote:

Review

Quoted 1 line

(quoted diff) +1 -0

+	soc at c8100000 {

What's the unit-address for? This node doesn't have a reg or compatible.

Quoted 29 lines

arch/arm/boot/dts/meson.dtsi new file +29 -0

+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		uart_AO: serial at c81004c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81004c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_A: serial at c81084c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_B: serial at c81084dc {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084dc 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+

arch/arm/boot/dts/meson.dtsi line 71

Quoted 6 lines

arch/arm/boot/dts/meson.dtsi new file +6 -0

+		uart_C: serial at c8108700 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc8108700 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";

I guess these are disabled because they aren't always wired up?

arch/arm/boot/dts/meson6.dtsi line 43

Quoted 9 lines

arch/arm/boot/dts/meson6.dtsi new file +9 -0

+	clocks {
+		#address-cells = <1>;
+
+		clk81: clk at 0 {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <200000000>;
+		};
+	};

There is really no need to put clocks in a container.

Just put them under the root, and drop the unit-address.

The Meson6 SoC is produced by Amlogic inc. and it is based on 2 Cortex A9 and an ARM Mali-400 GPU.
This patch adds two basic DTSI for the preliminary support of Meson and Meson6 SoCs. Another DTS is also added for supporting the atv1200 board, produced by Geniatech inc.

Signed-off-by Carlo Caione <[email protected]>

---
 arch/arm/boot/dts/Makefile           |  1 +
 arch/arm/boot/dts/meson.dtsi         | 75 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/meson6-atv1200.dts | 27 +++++++++++++
 arch/arm/boot/dts/meson6.dtsi        | 44 +++++++++++++++++++++
 4 files changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/meson.dtsi
 create mode 100644 arch/arm/boot/dts/meson6-atv1200.dts
 create mode 100644 arch/arm/boot/dts/meson6.dtsi

arch/arm/boot/dts/Makefile +1 -0

index b8c5cd3..604acce 100644
@@ -159,6 +159,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \
 	kirkwood-ts419-6282.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
+dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb
 dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
 dtb-$(CONFIG_ARCH_MXC) += \
 	imx25-eukrea-mbimxsd25-baseboard.dtb \

arch/arm/boot/dts/meson.dtsi new file +65 -0

new file mode 100644
index 0000000..934bb2c
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart_AO;
+		serial1 = &uart_A;
+		serial2 = &uart_B;
+		serial3 = &uart_C;
+	};
+
+	gic: interrupt-controller at c4301000 {
+		compatible = "arm,cortex-a9-gic";
+		reg = <0xc4301000 0x1000>,
+		      <0xc4300100 0x0100>;
+		interrupt-controller;
+		#interrupt-cells = <3>;
+	};
+
+	timer at c1109940 {
+		compatible = "amlogic,meson6-timer";
+		reg = <0xc1109940 0x14>;
+		interrupts = <0 10 1>;
+	};
+
+	soc at c8100000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		uart_AO: serial at c81004c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81004c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_A: serial at c81084c0 {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084c0 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+
+		uart_B: serial at c81084dc {
+			compatible = "amlogic,meson-uart";
+			reg = <0xc81084dc 0x14>;
+			interrupts = <0 90 1>;
+			clocks = <&clk81>;
+			status = "disabled";
+		};
+

arch/arm/boot/dts/meson6-atv1200.dts new file +17 -0

new file mode 100644
index 0000000..b358402
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/include/ "meson6.dtsi"
+
+/ {
+	model = "Geniatech ATV1200";
+	compatible = "geniatech,atv1200";
+
+	memory {

arch/arm/boot/dts/meson6.dtsi new file +4 -0

new file mode 100644
index 0000000..d62add4
@@ -0,0 +1,44 @@
+/*
+ * Copyright 2014 Carlo Caione <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it

arch/arm/boot/dts/meson6.dtsi new file +20 -0

+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x200>;
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x1>;
+		};
+	};
+

arch/arm/configs/meson_defconfig new file +99 -0

@@ -0,0 +1,99 @@
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_PERF_EVENTS=y
+CONFIG_ARCH_MESON=y
+CONFIG_SMP=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_ARM_PSCI=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+CONFIG_STMMAC_ETH=y
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_SERIAL_MESON=y
+CONFIG_SERIAL_MESON_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_SPI=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_MFD_AXP20X=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_MMC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_SYSFS is not set
+# CONFIG_RTC_INTF_PROC is not set
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_GENERIC_PHY=y
+CONFIG_EXT4_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_FS=y

arch/arm/configs/multi_v7_defconfig +3 -0

index 5fb95fb..5b44796 100644
@@ -29,6 +29,7 @@ CONFIG_ARCH_HISI=y
  CONFIG_ARCH_HI3xxx=y
  CONFIG_ARCH_HIX5HD2=y
  CONFIG_ARCH_KEYSTONE=y
+CONFIG_ARCH_MESON=y
  CONFIG_ARCH_MXC=y
  CONFIG_SOC_IMX51=y
  CONFIG_SOC_IMX53=y

@@ -173,6 +174,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
  CONFIG_SERIAL_8250_DW=y
  CONFIG_SERIAL_AMBA_PL011=y
  CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_MESON=y
+CONFIG_SERIAL_MESON_CONSOLE=y
  CONFIG_SERIAL_SAMSUNG=y
  CONFIG_SERIAL_SAMSUNG_CONSOLE=y
  CONFIG_SERIAL_SIRFSOC=y

Quoted 11 lines · Carlo Caione

This patch updates the multi_v7_defconfig with the CONFIG_* needed by the just added Meson anch. It also adds a new defconfig specifically for the Meson SoCs.

Signed-off-by Carlo Caione <[email protected]>

---
 arch/arm/configs/meson_defconfig    | 99 +++++++++++++++++++++++++++++++++++++
 arch/arm/configs/multi_v7_defconfig |  3 ++
 2 files changed, 102 insertions(+)
 create mode 100644 arch/arm/configs/meson_defconfig

arch/arm/configs/meson_defconfig

Quoted 5 lines

arch/arm/configs/meson_defconfig new file +0 -0

new file mode 100644
index 0000000..3c9d976

I doubt that we need a meson_defconfig when we can get the SoC up and running using multi_v7_defconfig.

New UART and timer bindings are documented. A new vendor is added to the vendors list.

Signed-off-by Carlo Caione <[email protected]>

---
  .../devicetree/bindings/serial/amlogic,meson-uart.txt   | 17 +++++++++++++++++
  .../devicetree/bindings/timer/amlogic,meson6-timer.txt  | 16 ++++++++++++++++
  Documentation/devicetree/bindings/vendor-prefixes.txt   |  1 +
  3 files changed, 34 insertions(+)

create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt create mode 100644 Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt

Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt new file +17 -0

new file mode 100644
index 0000000..fa1935a
@@ -0,0 +1,17 @@
+Amlogic Meson UART
+
+Required properties:
+- compatible : Should be "amlogic,meson-uart"
+- reg : Address and length of the register set
+- interrupts : Should contain uart interrupt
+- clocks: phandle to the source clock
+
+Example:
+
+uart0: serial at c81004c0 {
+	compatible = "amlogic,meson-uart";
+	reg = <0xc81004c0 0x14>;
+	interrupts = <0 90 1>;
+	clocks = <&clk81>;
+};
+

Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt new file +16 -0

new file mode 100644
index 0000000..cf89894
@@ -0,0 +1,16 @@
+Amlogic Meson6 SoCs Timer Controller
+
+Required properties:
+
+- compatible : should be "amlogic,meson6-timer.txt"
+- reg : Specifies base physical address and size of the registers.
+- interrupts : The interrupt of the first timer
+
+Example:
+
+timer at c1109940 {
+	compatible = "amlogic,meson6-timer";
+	reg = <0xc1109940 0x14>;
+	interrupts = <0 10 1>;
+};
+

Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0

index ac7269f..5cf0618 100644
@@ -14,6 +14,7 @@ allwinner	Allwinner Technology Co., Ltd.
  altr	Altera Corp.
  amcc	Applied Micro Circuits Corporation (APM, formally AMCC)
  amd	Advanced Micro Devices (AMD), Inc.
+amlogic	Amlogic, Inc.
  ams	AMS AG
  amstaos	AMS-Taos Inc.
  apm	Applied Micro Circuits Corporation (APM)

Quoted 11 lines · Carlo Caione

New UART and timer bindings are documented. A new vendor is added to the vendors list.

Signed-off-by Carlo Caione <[email protected]>

---
 .../devicetree/bindings/serial/amlogic,meson-uart.txt   | 17 +++++++++++++++++
 .../devicetree/bindings/timer/amlogic,meson6-timer.txt  | 16 ++++++++++++++++
 Documentation/devicetree/bindings/vendor-prefixes.txt   |  1 +
 3 files changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt

This should be three patches for the different files. It might happen, that for example your timer driver get merged through a different tree then arm-soc. For the merge, the driver and the documentation should go togehter.

New UART and timer bindings are documented. A new vendor is added to the vendors list.

Signed-off-by Carlo Caione <[email protected]>

---
 .../devicetree/bindings/serial/amlogic,meson-uart.txt   | 17 +++++++++++++++++
 .../devicetree/bindings/timer/amlogic,meson6-timer.txt  | 16 ++++++++++++++++
 Documentation/devicetree/bindings/vendor-prefixes.txt   |  1 +
 3 files changed, 34 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt

Amlogic AML8726-MX (codename Meson6) is a highly integrated multimedia application processor SoC for Multimedia Internet Device (MID), tablet and Set Top Box (STB). It integrates a powerful CPU, a 2D/3D graphics subsystem and a state-of-the-art video decoding engine together with all major peripherals. It is manufactured by Amlogic, inc.

This patchset introduces preliminary support for Meson6-based SoCs but several IPs and drivers are common among all the MesonX SoCs.

Amlogic doesn't release any documentation about their SoCs, so the code has been reverse-engineered from the messy source code released at:

http://openlinux.amlogic.com:8000/download/

Carlo Caione (7):
ARM: meson: debug: add debug UART for earlyprintk support
ARM: meson: serial: add MesonX SoC on-chip uart driver
ARM: meson6: clocksource: add Meson6 timer support
ARM: meson: add basic support for MesonX SoCs
ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
ARM: meson: update defconfigs
ARM: meson: update documentation (uart, timer and vendors)

 .../bindings/serial/amlogic,meson-uart.txt         |  17 +
 .../bindings/timer/amlogic,meson6-timer.txt        |  16 +
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 arch/arm/Kconfig                                   |   2 +
 arch/arm/Kconfig.debug                             |  14 +-
 arch/arm/Makefile                                  |   1 +
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/meson.dtsi                       |  75 +++
 arch/arm/boot/dts/meson6-atv1200.dts               |  27 +
 arch/arm/boot/dts/meson6.dtsi                      |  44 ++
 arch/arm/configs/meson_defconfig                   |  99 ++++
 arch/arm/configs/multi_v7_defconfig                |   3 +
 arch/arm/include/debug/meson.S                     |  35 ++
 arch/arm/mach-meson/Kconfig                        |  13 +
 arch/arm/mach-meson/Makefile                       |   1 +
 arch/arm/mach-meson/meson.c                        |  36 ++
 drivers/clocksource/Kconfig                        |   3 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/meson6_timer.c                 | 187 ++++++
 drivers/tty/serial/Kconfig                         |  18 +
 drivers/tty/serial/Makefile                        |   1 +
 drivers/tty/serial/meson_uart.c                    | 634 +++++++++++++++++++++
 include/uapi/linux/serial_core.h                   |   3 +
 23 files changed, 1230 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt
 create mode 100644 arch/arm/boot/dts/meson.dtsi
 create mode 100644 arch/arm/boot/dts/meson6-atv1200.dts
 create mode 100644 arch/arm/boot/dts/meson6.dtsi
 create mode 100644 arch/arm/configs/meson_defconfig
 create mode 100644 arch/arm/include/debug/meson.S
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/meson.c
 create mode 100644 drivers/clocksource/meson6_timer.c
 create mode 100644 drivers/tty/serial/meson_uart.c

Signature · 1 line

1.9.1

nice job! The patches work fine on a Tronsmart Vega S89 Elite TV box (Meson8 S802 SoC) just changing the fixed-clock frequency in the dts.