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ARM: sunxi: Add basic support for Allwinner A80 SoC

PATCH Applied Chen-Yu Tsai 2 participants 26 messages Sep 24, 2014 – Oct 7, 2014

Subsystems (6)

v2 of 3 Applied Latest is v3 →

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#0 lore raw

v2 cover ARM: sunxi: Add basic support for Allwinner A80 SoC

Hi everyone,

This is v2 of the initial Allwinner A80 support series. This patch series adds very basic support for Allwinner's A80 SoC, a big.LITTLE architecture with 4 Cortex-A7s and 4 Cortex-A15s.

Development is done on the A80 Optimus Board, the defacto development board for the A80, with the accompanying SDK as a reference.

So far I've been unable to get the board to boot from MMC, or using Android fastboot. I'm using Allwinner's FEL mode to load the bootloader and kernel+dtb image over USB. Notes on my attempts can be found here: http://linux-sunxi.org/User:Wens#A80_Optimus

Patch 1 introduces the compatible string for the A80.

Patch 2 adds options to use UART0 on the A80 as the debug port for earlyprintk.

Patch 3 adds a barebone dtsi with just the cpu, memory and uart nodes.

Patch 4 adds a barebone dts for the A80 Optimus Board.

Patch 5 documents the vendor prefix for Merrii Technology Co., Ltd, the designer and vendor of the A80 Optimus Board.

Patch 6 documents all the Allwinner SoCs we currently support.

Patch 7 updates the sunxi README with a link to the A80's datasheet.

Changes since v1:

- Use skeleton64.dtsi as basis to support maximum of 8GB DRAM
- Dropped dependency on ARCH_SUNXI for DEBUG_SUN9I_UART0
- Added empty lines separating cores in the DT cpu-map node
- Added patch 7 to update sunxi README

Cheers
ChenYu

Chen-Yu Tsai (7):
ARM: sunxi: Introduce Allwinner A80 support
ARM: sunxi: Add debug uart used by sun9i (Allwinner A80)
ARM: dts: sunxi: Add Allwinner A80 dtsi
ARM: dts: sun9i: Add A80 Optimus Board support
devicetree: bindings: Add vendor prefix for Merrii Technology Co.,
Ltd.
devicetree: bindings: Document supported Allwinner sunxi SoCs
Documentation: sunxi: Add A80 datasheet link

 Documentation/arm/sunxi/README                     |   3 +-
 Documentation/devicetree/bindings/arm/sunxi.txt    |  12 +
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 arch/arm/Kconfig.debug                             |  10 +
 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts            |  66 +++++
 arch/arm/boot/dts/sun9i-a80.dtsi                   | 287 +++++++++++++++++++++
 arch/arm/mach-sunxi/Kconfig                        |   5 +
 arch/arm/mach-sunxi/sunxi.c                        |   9 +
 9 files changed, 394 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
 create mode 100644 arch/arm/boot/dts/sun9i-a80.dtsi
Signature · 1 line
2.1.0
#1 lore raw

PATCH v2 1/7 ARM: sunxi: Introduce Allwinner A80 support

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +5 -0
index 1aaa1e1..72f222b 100644
@@ -42,4 +42,9 @@ config MACH_SUN8I
 	select MFD_SUN6I_PRCM
 	select RESET_CONTROLLER
 
+config MACH_SUN9I
+	bool "Allwinner A80 (sun9i) SoCs support"
+	default ARCH_SUNXI
+	select ARM_GIC
+
 endif
arch/arm/mach-sunxi/sunxi.c +9 -0
index 42d4753..4bd2117 100644
@@ -139,3 +139,12 @@ static const char * const sun8i_board_dt_compat[] = {
 DT_MACHINE_START(SUN8I_DT, "Allwinner sun8i (A23) Family")
 	.dt_compat	= sun8i_board_dt_compat,
 MACHINE_END
+
+static const char * const sun9i_board_dt_compat[] = {
+	"allwinner,sun9i-a80",
+	NULL,
+};
+
+DT_MACHINE_START(SUN9I_DT, "Allwinner sun9i (A80) Family")
+	.dt_compat	= sun9i_board_dt_compat,
+MACHINE_END
Signature · 1 line
2.1.0
#2 lore raw

Re: [PATCH v2 1/7] ARM: sunxi: Introduce Allwinner A80 support

Quoted 15 lines · Chen-Yu Tsai

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +0 -0
index 1aaa1e1..72f222b 100644

arch/arm/mach-sunxi/Kconfig config MACH_SUN8I · line 46

Quoted 5 lines
arch/arm/mach-sunxi/Kconfig +2 -0
@@ -42,4 +42,9 @@ config MACH_SUN8I
 	select MFD_SUN6I_PRCM
 	select RESET_CONTROLLER
 
+config MACH_SUN9I
+	bool "Allwinner A80 (sun9i) SoCs support"

With the new naming scheme, I wonder wether it makes sense to have the A80 displayed here and in the machine definition.

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#3 lore raw

Re: [PATCH v2 1/7] ARM: sunxi: Introduce Allwinner A80 support

Quoted 19 lines · Maxime Ripard
Quoted 18 lines · Chen-Yu Tsai

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +0 -0
index 1aaa1e1..72f222b 100644
@@ -42,4 +42,9 @@ config MACH_SUN8I
      select MFD_SUN6I_PRCM
      select RESET_CONTROLLER
 
Quoted 5 lines

arch/arm/mach-sunxi/Kconfig config MACH_SUN8I · line 46

Quoted 2 lines
arch/arm/mach-sunxi/Kconfig +2 -0
+config MACH_SUN9I
+     bool "Allwinner A80 (sun9i) SoCs support"

With the new naming scheme, I wonder wether it makes sense to have the A80 displayed here and in the machine definition.

I expect anything that falls under sun9i to be compatible, or a trimmed down version. But that's just me.

We know that Allwinner has released the A33, which should be compatible with the A23, sun8i. And the A83 has been announced, which looks like a trimmed down version of the A80. The next SoC should be arm64, and would not matter here.

Kevin, Shuge, could you provide us with the codenames for the A33 and A83, and what earlier SoC they are based on?

Thanks
ChenYu

#4 lore raw

Re: [PATCH v2 1/7] ARM: sunxi: Introduce Allwinner A80 support

Quoted 21 lines · Chen-Yu Tsai
Quoted 19 lines · Maxime Ripard
Quoted 18 lines · Chen-Yu Tsai

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +0 -0
index 1aaa1e1..72f222b 100644
@@ -42,4 +42,9 @@ config MACH_SUN8I
      select MFD_SUN6I_PRCM
      select RESET_CONTROLLER
 
Quoted 8 lines
Quoted 5 lines

arch/arm/mach-sunxi/Kconfig config MACH_SUN8I · line 46

Quoted 2 lines
arch/arm/mach-sunxi/Kconfig +2 -0
+config MACH_SUN9I
+     bool "Allwinner A80 (sun9i) SoCs support"

With the new naming scheme, I wonder wether it makes sense to have the A80 displayed here and in the machine definition.

I expect anything that falls under sun9i to be compatible, or a trimmed down version. But that's just me.

Well, compatible is a rather vague notion. They will be different for sure. Maybe not that different, but still.

Quoted 2 lines

We know that Allwinner has released the A33, which should be compatible with the A23, sun8i.

Except that it would not be straight forward for an A33 user for example that he needs to enable the A23 support.

Quoted 6 lines

And the A83 has been announced, which looks like a trimmed down version of the A80. The next SoC should be arm64, and would not matter here.

Kevin, Shuge, could you provide us with the codenames for the A33 and A83, and what earlier SoC they are based on?

Even though it would be nice to know, it's not really the issue here.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#5 lore raw

Re: [PATCH v2 1/7] ARM: sunxi: Introduce Allwinner A80 support

Quoted 28 lines · Maxime Ripard
Quoted 27 lines · Chen-Yu Tsai
Quoted 24 lines · Maxime Ripard
Quoted 15 lines · Chen-Yu Tsai

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +0 -0
index 1aaa1e1..72f222b 100644

arch/arm/mach-sunxi/Kconfig config MACH_SUN8I · line 46

Quoted 5 lines
arch/arm/mach-sunxi/Kconfig +2 -0
@@ -42,4 +42,9 @@ config MACH_SUN8I
      select MFD_SUN6I_PRCM
      select RESET_CONTROLLER
 
+config MACH_SUN9I
+     bool "Allwinner A80 (sun9i) SoCs support"

With the new naming scheme, I wonder wether it makes sense to have the A80 displayed here and in the machine definition.

Quoted 5 lines
Quoted 2 lines

I expect anything that falls under sun9i to be compatible, or a trimmed down version. But that's just me.

Well, compatible is a rather vague notion. They will be different for sure. Maybe not that different, but still.

So what you're saying is we have a MACH_* Kconfig symbol for each SoC. As we add or test drivers, we mark them as compatible by adding that symbol to the DEPENDS part?

I can live with that.

Quoted 5 lines
Quoted 2 lines

We know that Allwinner has released the A33, which should be compatible with the A23, sun8i.

Except that it would not be straight forward for an A33 user for example that he needs to enable the A23 support.

Having the SoC name in the description should be enough. But I suppose having the SoC name in the symbol is better, as it is searchable?

Is this what you want? I think it's a good idea.

ChenYu

Quoted 8 lines
Quoted 6 lines

And the A83 has been announced, which looks like a trimmed down version of the A80. The next SoC should be arm64, and would not matter here.

Kevin, Shuge, could you provide us with the codenames for the A33 and A83, and what earlier SoC they are based on?

Even though it would be nice to know, it's not really the issue here.

#6 lore raw

Re: [PATCH v2 1/7] ARM: sunxi: Introduce Allwinner A80 support

Quoted 33 lines · Chen-Yu Tsai
Quoted 31 lines · Maxime Ripard
Quoted 29 lines · Chen-Yu Tsai
Quoted 19 lines · Maxime Ripard
Quoted 18 lines · Chen-Yu Tsai

The Allwinner A80 is a new Cortex octo-core A7/A15 big.LITTLE SoC. While it's processor cores and interconnecting bus are new, it re-uses many peripherals found in earlier Allwinner SoCs.

---
 arch/arm/mach-sunxi/Kconfig | 5 +++++
 arch/arm/mach-sunxi/sunxi.c | 9 +++++++++
 2 files changed, 14 insertions(+)
arch/arm/mach-sunxi/Kconfig +0 -0
index 1aaa1e1..72f222b 100644
@@ -42,4 +42,9 @@ config MACH_SUN8I
      select MFD_SUN6I_PRCM
      select RESET_CONTROLLER
 
Quoted 5 lines

arch/arm/mach-sunxi/Kconfig config MACH_SUN8I · line 46

Quoted 2 lines
arch/arm/mach-sunxi/Kconfig +2 -0
+config MACH_SUN9I
+     bool "Allwinner A80 (sun9i) SoCs support"

With the new naming scheme, I wonder wether it makes sense to have the A80 displayed here and in the machine definition.

I expect anything that falls under sun9i to be compatible, or a trimmed down version. But that's just me.

Quoted 8 lines
Quoted 2 lines

Well, compatible is a rather vague notion. They will be different for sure. Maybe not that different, but still.

So what you're saying is we have a MACH_* Kconfig symbol for each SoC. As we add or test drivers, we mark them as compatible by adding that symbol to the DEPENDS part?

I can live with that.

No, what I'm saying is drop the A80 mention from the bool label, and only leave the family there.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#7 lore raw

PATCH v2 2/7 ARM: sunxi: Add debug uart used by sun9i (Allwinner A80)

In reply to Chen-Yu Tsai

The uarts on sun9i are still compatible with the dw_8250, but are located at different addresses.

---
 arch/arm/Kconfig.debug | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/Kconfig.debug +10 -0
index b11ad54..1e191d1 100644
@@ -707,6 +707,14 @@ choice
 		  Say Y here if you want kernel low-level debugging support
 		  on SOCFPGA based platforms.
 
+	config DEBUG_SUN9I_UART0
+		bool "Kernel low-level debugging messages via sun9i UART0"
+		depends on MACH_SUN9I
+		select DEBUG_UART_8250
+		help
+		  Say Y here if you want kernel low-level debugging support
+		  on Allwinner A80 based platforms on the UART0.
+
 	config DEBUG_SUNXI_UART0
 		bool "Kernel low-level debugging messages via sunXi UART0"
 		depends on ARCH_SUNXI
@@ -1068,6 +1076,7 @@ config DEBUG_UART_PHYS
 	default 0x02530c00 if DEBUG_KEYSTONE_UART0
 	default 0x02531000 if DEBUG_KEYSTONE_UART1
 	default 0x03010fe0 if ARCH_RPC
+	default 0x07000000 if DEBUG_SUN9I_UART0
 	default 0x10009000 if DEBUG_REALVIEW_STD_PORT || DEBUG_CNS3XXX || \
 				DEBUG_VEXPRESS_UART0_CA9
 	default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
@@ -1145,6 +1154,7 @@ config DEBUG_UART_VIRT
 	default 0xf2100000 if DEBUG_PXA_UART1
 	default 0xf4090000 if ARCH_LPC32XX
 	default 0xf4200000 if ARCH_GEMINI
+	default 0xf7000000 if DEBUG_SUN9I_UART0
 	default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
 				DEBUG_S3C2410_UART0)
 	default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
Signature · 1 line
2.1.0
#8 lore raw

Re: [PATCH v2 2/7] ARM: sunxi: Add debug uart used by sun9i (Allwinner A80)

Quoted 4 lines · Chen-Yu Tsai

The uarts on sun9i are still compatible with the dw_8250, but are located at different addresses.

Queued for 3.19, thanks.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#9 lore raw

PATCH v2 3/7 ARM: dts: sunxi: Add Allwinner A80 dtsi

In reply to Chen-Yu Tsai

The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and 4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core PowerVR G6230 GPU.

---
 arch/arm/boot/dts/sun9i-a80.dtsi | 287 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 287 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80.dtsi
arch/arm/boot/dts/sun9i-a80.dtsi new file +287 -0
new file mode 100644
index 0000000..34a0068
@@ -0,0 +1,287 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/include/ "skeleton64.dtsi"
+
+/ {
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &r_uart;
+	};
+
+	cpu-map {
+		cluster0 {
+			core0 {
+				cpu = <&cpu0>;
+			};
+
+			core1 {
+				cpu = <&cpu1>;
+			};
+
+			core2 {
+				cpu = <&cpu2>;
+			};
+
+			core3 {
+				cpu = <&cpu3>;
+			};
+		};
+
+		cluster1 {
+			core0 {
+				cpu = <&cpu4>;
+			};
+
+			core1 {
+				cpu = <&cpu5>;
+			};
+
+			core2 {
+				cpu = <&cpu6>;
+			};
+
+			core3 {
+				cpu = <&cpu7>;
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu at 0 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x0>;
+		};
+
+		cpu1: cpu at 1 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x1>;
+		};
+
+		cpu2: cpu at 2 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x2>;
+		};
+
+		cpu3: cpu at 3 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x3>;
+		};
+
+		cpu4: cpu at 100 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x100>;
+		};
+
+		cpu5: cpu at 101 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x101>;
+		};
+
+		cpu6: cpu at 102 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x102>;
+		};
+
+		cpu7: cpu at 103 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x103>;
+		};
+	};
+
+	memory {
+		/* 8GB max. with LPAE */
+		reg = <0 0x20000000 0x02 0>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x20000000>;
+
+		osc24M: osc24M_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			clock-output-names = "osc24M";
+		};
+
+		osc32k: osc32k_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <32768>;
+			clock-output-names = "osc32k";
+		};
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x20000000>;
+
+		gic: interrupt-controller at 01c41000 {
+			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+			reg = <0x01c41000 0x1000>,
+			      <0x01c42000 0x1000>,
+			      <0x01c44000 0x2000>,
+			      <0x01c46000 0x2000>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			interrupts = <1 9 0xf04>;
+		};
+
+		timer at 06000c00 {
+			compatible = "allwinner,sun4i-a10-timer";
+			reg = <0x06000c00 0xa0>;
+			interrupts = <0 18 4>,
+				     <0 19 4>,
+				     <0 20 4>,
+				     <0 21 4>,
+				     <0 22 4>,
+				     <0 23 4>;
+
+			clocks = <&osc24M>;
+		};
+
+		uart0: serial at 07000000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07000000 0x400>;
+			interrupts = <0 0 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		uart1: serial at 07000400 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07000400 0x400>;
+			interrupts = <0 1 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		uart2: serial at 07000800 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07000800 0x400>;
+			interrupts = <0 2 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		uart3: serial at 07000c00 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07000c00 0x400>;
+			interrupts = <0 3 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		uart4: serial at 07001000 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07001000 0x400>;
+			interrupts = <0 4 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		uart5: serial at 07001400 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x07001400 0x400>;
+			interrupts = <0 5 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+
+		r_wdt: watchdog at 08001000 {
+			compatible = "allwinner,sun6i-a31-wdt";
+			reg = <0x08001000 0x20>;
+			interrupts = <0 36 4>;
+		};
+
+		r_uart: serial at 08002800 {
+			compatible = "snps,dw-apb-uart";
+			reg = <0x08002800 0x400>;
+			interrupts = <0 38 4>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clocks = <&osc24M>;
+			status = "disabled";
+		};
+	};
+};
Signature · 1 line
2.1.0
#10 lore raw

Re: [PATCH v2 3/7] ARM: dts: sunxi: Add Allwinner A80 dtsi

Quoted 107 lines · Chen-Yu Tsai

The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and 4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core PowerVR G6230 GPU.

---
 arch/arm/boot/dts/sun9i-a80.dtsi | 287 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 287 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80.dtsi
arch/arm/boot/dts/sun9i-a80.dtsi new file +91 -0
new file mode 100644
index 0000000..34a0068
@@ -0,0 +1,287 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/include/ "skeleton64.dtsi"
+
+/ {
+	interrupt-parent = <&gic>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &r_uart;
+	};
+
+	cpu-map {
+		cluster0 {
+			core0 {
+				cpu = <&cpu0>;
+			};
+
+			core1 {
+				cpu = <&cpu1>;
+			};
+
+			core2 {
+				cpu = <&cpu2>;
+			};
+
+			core3 {
+				cpu = <&cpu3>;
+			};
+		};
+
+		cluster1 {
+			core0 {
+				cpu = <&cpu4>;
+			};
+
+			core1 {
+				cpu = <&cpu5>;
+			};

arch/arm/boot/dts/sun9i-a80.dtsi line 101

Quoted 10 lines
arch/arm/boot/dts/sun9i-a80.dtsi new file +10 -0
+
+			core2 {
+				cpu = <&cpu6>;
+			};
+
+			core3 {
+				cpu = <&cpu7>;
+			};
+		};
+	};

Like you already found out, the topology code doesn't use the cpu-map but only relies on the cpu compatible and max frequencies, so you can drop this.

Quoted 53 lines
arch/arm/boot/dts/sun9i-a80.dtsi new file +53 -0
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu at 0 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x0>;
+		};
+
+		cpu1: cpu at 1 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x1>;
+		};
+
+		cpu2: cpu at 2 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x2>;
+		};
+
+		cpu3: cpu at 3 {
+			compatible = "arm,cortex-a7";
+			device_type = "cpu";
+			reg = <0x3>;
+		};
+
+		cpu4: cpu at 100 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x100>;
+		};
+
+		cpu5: cpu at 101 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x101>;
+		};
+
+		cpu6: cpu at 102 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x102>;
+		};
+
+		cpu7: cpu at 103 {
+			compatible = "arm,cortex-a15";
+			device_type = "cpu";
+			reg = <0x103>;
+		};
+	};

arch/arm/boot/dts/sun9i-a80.dtsi line 164

Quoted 10 lines
arch/arm/boot/dts/sun9i-a80.dtsi new file +10 -0
+
+	memory {
+		/* 8GB max. with LPAE */
+		reg = <0 0x20000000 0x02 0>;
+	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0x20000000>;

A comment for this ranges would be nice.

I looks fine otherwise.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#11 lore raw

PATCH v2 4/7 ARM: dts: sun9i: Add A80 Optimus Board support

In reply to Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
 	sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+	sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-iris-512.dtb \
 	tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +66 -0

66 lines not on this page · raw message

Signature · 1 line
2.1.0
#12 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 85 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
 	sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
 	sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+	sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-iris-512.dtb \
 	tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +49 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 10 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +10 -0
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+	model = "Merrii A80 Optimus Board";
+	compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+	chosen {
+		bootargs = "earlyprintk console=ttyS0,115200";
+	};

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#13 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 91 lines · Maxime Ripard
Quoted 90 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +54 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
Quoted 8 lines

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 5 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +5 -0
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

ChenYu

#14 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 102 lines · Chen-Yu Tsai
Quoted 91 lines · Maxime Ripard
Quoted 90 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +54 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
Quoted 8 lines

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 5 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +5 -0
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

Quoted 2 lines

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

Yes, but does the A80 bootloader supports DT and actually fixes it? If not, then you'll still have to have a memory node, just like on the A31 (and presumably on the A23).

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#15 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 103 lines · Maxime Ripard
Quoted 102 lines · Chen-Yu Tsai
Quoted 99 lines · Maxime Ripard
Quoted 85 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +49 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 10 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +10 -0
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

Quoted 6 lines
Quoted 2 lines

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

Yes, but does the A80 bootloader supports DT and actually fixes it? If not, then you'll still have to have a memory node, just like on the A31 (and presumably on the A23).

Not at the moment no. But last I checked none of our board dts files have separate memory nodes. We only have them in the dtsi, with the largest supported ram size as its value. Also the bootloader (u-boot that is) can pass the memory size via atags I think.

At least I'm only getting 512MB RAM on my Optimus, due to u-boot incorrectly assuming I only have as much. But that's another problem. :(

Would this be a problem when using Android fastboot from the stock u-boot?

Cheers
ChenYu

#16 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 108 lines · Chen-Yu Tsai
Quoted 106 lines · Maxime Ripard
Quoted 104 lines · Chen-Yu Tsai
Quoted 91 lines · Maxime Ripard
Quoted 90 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +54 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
Quoted 8 lines

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 5 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +5 -0
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

Quoted 8 lines
Quoted 3 lines

Yes, but does the A80 bootloader supports DT and actually fixes it? If not, then you'll still have to have a memory node, just like on the A31 (and presumably on the A23).

Not at the moment no. But last I checked none of our board dts files have separate memory nodes. We only have them in the dtsi, with the largest supported ram size as its value. Also the bootloader (u-boot that is) can pass the memory size via atags I think.

Only if CONFIG_ARM_ATAG_DTB_COMPAT is set.

Quoted 2 lines

At least I'm only getting 512MB RAM on my Optimus, due to u-boot incorrectly assuming I only have as much. But that's another problem. :(

And does it initialize the rest of the memory?

Quoted 2 lines

Would this be a problem when using Android fastboot from the stock u-boot?

IIRC, fastboot passes ATAGS anyway, so as long as you have the configuration option mentionned above, you should be safe.

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#17 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 113 lines · Maxime Ripard
Quoted 112 lines · Chen-Yu Tsai
Quoted 109 lines · Maxime Ripard
Quoted 102 lines · Chen-Yu Tsai
Quoted 91 lines · Maxime Ripard
Quoted 90 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +54 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
Quoted 8 lines

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 5 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +5 -0
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

Quoted 2 lines

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

Yes, but does the A80 bootloader supports DT and actually fixes it? If not, then you'll still have to have a memory node, just like on the A31 (and presumably on the A23).

Quoted 6 lines
Quoted 4 lines

Not at the moment no. But last I checked none of our board dts files have separate memory nodes. We only have them in the dtsi, with the largest supported ram size as its value. Also the bootloader (u-boot that is) can pass the memory size via atags I think.

Only if CONFIG_ARM_ATAG_DTB_COMPAT is set.

Right. Last time I checked, this is set in both sunxi_defconfig and multiv7_defconfig.

Quoted 4 lines
Quoted 2 lines

At least I'm only getting 512MB RAM on my Optimus, due to u-boot incorrectly assuming I only have as much. But that's another problem. :(

And does it initialize the rest of the memory?

It does. Very weird. But it may have something to do with the u-boot blob not being patched with all dram parameters.

Quoted 5 lines
Quoted 2 lines

Would this be a problem when using Android fastboot from the stock u-boot?

IIRC, fastboot passes ATAGS anyway, so as long as you have the configuration option mentionned above, you should be safe.

I take this as an OK for this patch?

Cheers
ChenYu

#18 lore raw

Re: [PATCH v2 4/7] ARM: dts: sun9i: Add A80 Optimus Board support

Quoted 125 lines · Chen-Yu Tsai
Quoted 113 lines · Maxime Ripard
Quoted 112 lines · Chen-Yu Tsai
Quoted 109 lines · Maxime Ripard
Quoted 102 lines · Chen-Yu Tsai
Quoted 91 lines · Maxime Ripard
Quoted 90 lines · Chen-Yu Tsai

The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers.

This patch adds only basic support.

---
 arch/arm/boot/dts/Makefile              |  2 +
 arch/arm/boot/dts/sun9i-a80-optimus.dts | 66 +++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun9i-a80-optimus.dts
arch/arm/boot/dts/Makefile +2 -0
index 2f42b18..098f319 100644
@@ -424,6 +424,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \
      sun7i-a20-pcduino3.dtb
 dtb-$(CONFIG_MACH_SUN8I) += \
      sun8i-a23-ippo-q8h-v5.dtb
+dtb-$(CONFIG_MACH_SUN9I) += \
+     sun9i-a80-optimus.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
      tegra20-iris-512.dtb \
      tegra20-medcom-wide.dtb \
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +54 -0
new file mode 100644
index 0000000..f83abab
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2014 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "sun9i-a80.dtsi"
+
+/ {
+     model = "Merrii A80 Optimus Board";
Quoted 8 lines

arch/arm/boot/dts/sun9i-a80-optimus.dts line 59

Quoted 5 lines
arch/arm/boot/dts/sun9i-a80-optimus.dts new file +5 -0
+     compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
+
+     chosen {
+             bootargs = "earlyprintk console=ttyS0,115200";
+     };

Since you changed the memory node in the DTSI, you should probably add one here too, don't you?

Quoted 2 lines

I thought we left fixing that to the bootloader?
I don't see any memory nodes in our other DTS.

Yes, but does the A80 bootloader supports DT and actually fixes it? If not, then you'll still have to have a memory node, just like on the A31 (and presumably on the A23).

Quoted 6 lines
Quoted 4 lines

Not at the moment no. But last I checked none of our board dts files have separate memory nodes. We only have them in the dtsi, with the largest supported ram size as its value. Also the bootloader (u-boot that is) can pass the memory size via atags I think.

Only if CONFIG_ARM_ATAG_DTB_COMPAT is set.

Right. Last time I checked, this is set in both sunxi_defconfig and multiv7_defconfig.

Quoted 7 lines
Quoted 4 lines
Quoted 2 lines

At least I'm only getting 512MB RAM on my Optimus, due to u-boot incorrectly assuming I only have as much. But that's another problem. :(

And does it initialize the rest of the memory?

It does. Very weird. But it may have something to do with the u-boot blob not being patched with all dram parameters.

Interesting :)

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

Would this be a problem when using Android fastboot from the stock u-boot?

IIRC, fastboot passes ATAGS anyway, so as long as you have the configuration option mentionned above, you should be safe.

I take this as an OK for this patch?

Hmmm, yep, I guess :)

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#19 lore raw

PATCH v2 5/7 devicetree: bindings: Add vendor prefix for Merrii Technology Co., Ltd.

In reply to Chen-Yu Tsai

Merrii Technology Co., Ltd. is a Chinese ARM integration developer that specializes in Allwinner SoC based designs.

---
 Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
index ac7269f..d3a96ac 100644
@@ -81,6 +81,7 @@ lltc	Linear Technology Corporation
 marvell	Marvell Technology Group Ltd.
 maxim	Maxim Integrated Products
 mediatek	MediaTek Inc.
+merrii	Merrii Technology Co., Ltd.
 micrel	Micrel Inc.
 microchip	Microchip Technology Inc.
 mosaixtech	Mosaix Technologies, Inc.
Signature · 1 line
2.1.0
#20 lore raw

Re: [PATCH v2 5/7] devicetree: bindings: Add vendor prefix for Merrii Technology Co., Ltd.

Quoted 4 lines · Chen-Yu Tsai

Merrii Technology Co., Ltd. is a Chinese ARM integration developer that specializes in Allwinner SoC based designs.

Queued, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#21 lore raw

PATCH v2 6/7 devicetree: bindings: Document supported Allwinner sunxi SoCs

In reply to Chen-Yu Tsai

This adds a list of supported Allwinner SoC bindings.

---
 Documentation/devicetree/bindings/arm/sunxi.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
Documentation/devicetree/bindings/arm/sunxi.txt new file +12 -0
new file mode 100644
index 0000000..d7d1039
@@ -0,0 +1,12 @@
+Allwinner sunXi Platforms Device Tree Bindings
+
+Each device tree must specify which Allwinner SoC it uses,
+using one of the following compatible stirngs:
+
+  allwinner,sun4i-a10
+  allwinner,sun5i-a10s
+  allwinner,sun5i-a13
+  allwinner,sun6i-a31
+  allwinner,sun7i-a20
+  allwinner,sun8i-a23
+  allwinner,sun9i-a80
Signature · 1 line
2.1.0
#22 lore raw

Re: [PATCH v2 6/7] devicetree: bindings: Document supported Allwinner sunxi SoCs

Quoted 14 lines · Chen-Yu Tsai

This adds a list of supported Allwinner SoC bindings.

---
 Documentation/devicetree/bindings/arm/sunxi.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
Documentation/devicetree/bindings/arm/sunxi.txt new file +0 -0
new file mode 100644
index 0000000..d7d1039

Documentation/devicetree/bindings/arm/sunxi.txt line 4

Quoted 4 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +4 -0
@@ -0,0 +1,12 @@
+Allwinner sunXi Platforms Device Tree Bindings
+
+Each device tree must specify which Allwinner SoC it uses,
+using one of the following compatible stirngs:

^ strings

Documentation/devicetree/bindings/arm/sunxi.txt line 12

Quoted 8 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +8 -0
+
+  allwinner,sun4i-a10
+  allwinner,sun5i-a10s
+  allwinner,sun5i-a13
+  allwinner,sun6i-a31
+  allwinner,sun7i-a20
+  allwinner,sun8i-a23
+  allwinner,sun9i-a80

Maybe you can just add this info to the already existing README?

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#23 lore raw

Re: [PATCH v2 6/7] devicetree: bindings: Document supported Allwinner sunxi SoCs

Quoted 9 lines · Maxime Ripard
Quoted 8 lines · Chen-Yu Tsai

This adds a list of supported Allwinner SoC bindings.

---
 Documentation/devicetree/bindings/arm/sunxi.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
Quoted 11 lines

Documentation/devicetree/bindings/arm/sunxi.txt line 4

Quoted 10 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +4 -0
new file mode 100644
index 0000000..d7d1039
@@ -0,0 +1,12 @@
+Allwinner sunXi Platforms Device Tree Bindings
+
+Each device tree must specify which Allwinner SoC it uses,
+using one of the following compatible stirngs:

^ strings

Will fix.

Quoted 10 lines

Documentation/devicetree/bindings/arm/sunxi.txt line 12

Quoted 8 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +8 -0
+
+  allwinner,sun4i-a10
+  allwinner,sun5i-a10s
+  allwinner,sun5i-a13
+  allwinner,sun6i-a31
+  allwinner,sun7i-a20
+  allwinner,sun8i-a23
+  allwinner,sun9i-a80

Maybe you can just add this info to the already existing README?

AFAIK the bindings are where they're supposed to be.

Putting the bindings outside of devicetree/bindings is unexpected and confusing.

Cheers
ChenYu

#24 lore raw

Re: [PATCH v2 6/7] devicetree: bindings: Document supported Allwinner sunxi SoCs

Quoted 34 lines · Chen-Yu Tsai
Quoted 9 lines · Maxime Ripard
Quoted 8 lines · Chen-Yu Tsai

This adds a list of supported Allwinner SoC bindings.

---
 Documentation/devicetree/bindings/arm/sunxi.txt | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi.txt
Quoted 11 lines

Documentation/devicetree/bindings/arm/sunxi.txt line 4

Quoted 10 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +4 -0
new file mode 100644
index 0000000..d7d1039
@@ -0,0 +1,12 @@
+Allwinner sunXi Platforms Device Tree Bindings
+
+Each device tree must specify which Allwinner SoC it uses,
+using one of the following compatible stirngs:

^ strings

Will fix.

Quoted 9 lines
Quoted 8 lines
Documentation/devicetree/bindings/arm/sunxi.txt new file +8 -0
+
+  allwinner,sun4i-a10
+  allwinner,sun5i-a10s
+  allwinner,sun5i-a13
+  allwinner,sun6i-a31
+  allwinner,sun7i-a20
+  allwinner,sun8i-a23
+  allwinner,sun9i-a80
Quoted 6 lines
Quoted 1 line

Maybe you can just add this info to the already existing README?

AFAIK the bindings are where they're supposed to be.

Putting the bindings outside of devicetree/bindings is unexpected and confusing.

Ah, yes...

Sorry about the noise, I was somehow convinced our README were under that directory, but you're obviously right :)

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#25 lore raw

PATCH v2 7/7 Documentation: sunxi: Add A80 datasheet link

In reply to Chen-Yu Tsai

We now have initial support for the A80, as well a the datasheet. Update the documents to reflect this.

---
 Documentation/arm/sunxi/README | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
Documentation/arm/sunxi/README +2 -1
index 7945238..9477d6e 100644
@@ -49,4 +49,5 @@ SunXi family
 
     * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs
       - Allwinner A80
-        + Not Supported
\ No newline at end of file
+        + Datasheet
+	  http://dl.linux-sunxi.org/A80/A80_Datasheet_Revision_1.0_0404.pdf
Signature · 1 line
2.1.0