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ARM: shmobile: Add clock to DT

PATCH New Yoshihiro Kaneko 3 participants 7 messages Oct 14, 2014 – Oct 16, 2014

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Yoshihiro Kaneko

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#0 lore raw

cover ARM: shmobile: Add clock to DT

This patch series is based on the renesas-devel-20141007-v3.17 tag of Simon's renesas tree.

Changes from v1:
- change the clock name to "3dg" from "pvrsrvkm".
- use the clock name "fdp1-2", "fdp1-1", "fdp1-0", instead of "fdp2", "fdp1" and "fdp0".
- change the definition according to the clock name.

Kouei Abe (2):
ARM: shmobile: r8a7790: Add RGX clock to device tree
ARM: shmobile: r8a7791: Add SGX clock to device tree

Yoshifumi Hosoya (2):
ARM: shmobile: r8a7790: Add MMP clock to device tree
ARM: shmobile: r8a7791: Add MMP clock to device tree

 arch/arm/boot/dts/r8a7790.dtsi            | 23 +++++++++++++++--------
 arch/arm/boot/dts/r8a7791.dtsi            | 22 ++++++++++++++--------
 include/dt-bindings/clock/r8a7790-clock.h | 12 +++++++++++-
 include/dt-bindings/clock/r8a7791-clock.h |  9 ++++++++-
 4 files changed, 48 insertions(+), 18 deletions(-)
Signature · 1 line
1.9.1
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#1 lore raw

PATCH 1/4 ARM: shmobile: r8a7790: Add RGX clock to device tree

From: Kouei Abe <[email protected]>

Signed-off-by Kouei Abe <[email protected]>
Signed-off-by Yoshihiro Kaneko <[email protected]>
---
 arch/arm/boot/dts/r8a7790.dtsi            | 9 +++++----
 include/dt-bindings/clock/r8a7790-clock.h | 1 +
 2 files changed, 6 insertions(+), 4 deletions(-)
arch/arm/boot/dts/r8a7790.dtsi +5 -4
index 2380fd5..1e96705 100644
@@ -938,18 +938,19 @@
 		mstp1_clks: mstp1_clks at e6150134 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-			clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+			clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
 				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
 				 <&zs_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
+				R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_3DG
+				R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
 				R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
 				R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
 			>;
 			clock-output-names =
-				"jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-				"vsp1-du0", "vsp1-rt", "vsp1-sy";
+				"jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0",
+				"vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
 		};
 		mstp2_clks: mstp2_clks at e6150138 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7790-clock.h +1 -0
index 8ea7ab0..14a3f12 100644
@@ -28,6 +28,7 @@
 /* MSTP1 */
 #define R8A7790_CLK_JPU		6
 #define R8A7790_CLK_TMU1		11
+#define R8A7790_CLK_3DG			12
 #define R8A7790_CLK_TMU3		21
 #define R8A7790_CLK_TMU2		22
 #define R8A7790_CLK_CMT0		24
Signature · 1 line
1.9.1
author
#2 lore raw

PATCH 2/4 ARM: shmobile: r8a7791: Add SGX clock to device tree

In reply to Yoshihiro Kaneko

From: Kouei Abe <[email protected]>

Signed-off-by Kouei Abe <[email protected]>
Signed-off-by Yoshihiro Kaneko <[email protected]>
---
 arch/arm/boot/dts/r8a7791.dtsi            | 11 ++++++-----
 include/dt-bindings/clock/r8a7791-clock.h |  1 +
 2 files changed, 7 insertions(+), 5 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +6 -5
index d343099..5a26c1a 100644
@@ -1,7 +1,7 @@
 /*
  * Device Tree Source for the r8a7791 SoC
  *
- * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013-2014 Renesas Electronics Corporation
  * Copyright (C) 2013-2014 Renesas Solutions Corp.
  * Copyright (C) 2014 Cogent Embedded Inc.
  *

@@ -947,17 +947,18 @@
 		mstp1_clks: mstp1_clks at e6150134 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-			clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+			clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
 				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
+				R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_3DG
+				R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
 				R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
 				R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
 			>;
 			clock-output-names =
-				"jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-				"vsp1-du0", "vsp1-sy";
+				"jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0",
+				"vsp1-du1", "vsp1-du0", "vsp1-sy";
 		};
 		mstp2_clks: mstp2_clks at e6150138 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7791-clock.h +1 -0
index 58c3f49..9570b7c 100644
@@ -27,6 +27,7 @@
 /* MSTP1 */
 #define R8A7791_CLK_JPU		6
 #define R8A7791_CLK_TMU1		11
+#define R8A7791_CLK_3DG			12
 #define R8A7791_CLK_TMU3		21
 #define R8A7791_CLK_TMU2		22
 #define R8A7791_CLK_CMT0		24
Signature · 1 line
1.9.1
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#3 lore raw

PATCH 3/4 ARM: shmobile: r8a7790: Add MMP clock to device tree

In reply to Yoshihiro Kaneko

From: Yoshifumi Hosoya <[email protected]>

Signed-off-by Yoshifumi Hosoya <[email protected]>
Signed-off-by Yoshihiro Kaneko <[email protected]>
---
 arch/arm/boot/dts/r8a7790.dtsi            | 22 ++++++++++++++--------
 include/dt-bindings/clock/r8a7790-clock.h | 11 ++++++++++-
 2 files changed, 24 insertions(+), 9 deletions(-)
arch/arm/boot/dts/r8a7790.dtsi +14 -8
index 1e96705..3f1e4b3 100644
@@ -938,18 +938,24 @@
 		mstp1_clks: mstp1_clks at e6150134 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-			clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
-				 <&zs_clk>;
+			clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
+				 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
+				 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
+				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_3DG
-				R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
-				R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
-				R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
+				R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
+				R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
+				R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
+				R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
+				R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
+				R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
+				R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
 			>;
 			clock-output-names =
-				"jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0",
+				"vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
+				"tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
+				"fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
 				"vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
 		};
 		mstp2_clks: mstp2_clks at e6150138 {
include/dt-bindings/clock/r8a7790-clock.h +10 -1
index 14a3f12..e3a3fb8 100644
@@ -26,9 +26,18 @@
 #define R8A7790_CLK_MSIOF0		0
 
 /* MSTP1 */
-#define R8A7790_CLK_JPU		6
+#define R8A7790_CLK_VCP1		0
+#define R8A7790_CLK_VCP0		1
+#define R8A7790_CLK_VPC1		2
+#define R8A7790_CLK_VPC0		3
+#define R8A7790_CLK_JPU			6
+#define R8A7790_CLK_SSP1		9
 #define R8A7790_CLK_TMU1		11
 #define R8A7790_CLK_3DG			12
+#define R8A7790_CLK_2DDMAC		15
+#define R8A7790_CLK_FDP1_2		17
+#define R8A7790_CLK_FDP1_1		18
+#define R8A7790_CLK_FDP1_0		19
 #define R8A7790_CLK_TMU3		21
 #define R8A7790_CLK_TMU2		22
 #define R8A7790_CLK_CMT0		24
Signature · 1 line
1.9.1
author
#4 lore raw

PATCH 4/4 ARM: shmobile: r8a7791: Add MMP clock to device tree

In reply to Yoshihiro Kaneko

From: Yoshifumi Hosoya <[email protected]>

Signed-off-by Yoshifumi Hosoya <[email protected]>
Signed-off-by Yoshihiro Kaneko <[email protected]>
---
 arch/arm/boot/dts/r8a7791.dtsi            | 21 +++++++++++++--------
 include/dt-bindings/clock/r8a7791-clock.h |  8 +++++++-
 2 files changed, 20 insertions(+), 9 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +13 -8
index 5a26c1a..74f18d8 100644
@@ -947,18 +947,23 @@
 		mstp1_clks: mstp1_clks at e6150134 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-			clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
+			clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
+				 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
+				 <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
+				 <&zs_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
-				R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_3DG
-				R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
-				R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
-				R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
+				R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
+				R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
+				R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
+				R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
+				R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
+				R8A7791_CLK_VSP1_S
 			>;
 			clock-output-names =
-				"jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0",
-				"vsp1-du1", "vsp1-du0", "vsp1-sy";
+				"vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
+				"2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
+				"tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
 		};
 		mstp2_clks: mstp2_clks at e6150138 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7791-clock.h +7 -1
index 9570b7c..dcececd 100644
@@ -25,9 +25,15 @@
 #define R8A7791_CLK_MSIOF0		0
 
 /* MSTP1 */
-#define R8A7791_CLK_JPU		6
+#define R8A7791_CLK_VCP0		1
+#define R8A7791_CLK_VPC0		3
+#define R8A7791_CLK_JPU			6
+#define R8A7791_CLK_SSP1		9
 #define R8A7791_CLK_TMU1		11
 #define R8A7791_CLK_3DG			12
+#define R8A7791_CLK_2DDMAC		15
+#define R8A7791_CLK_FDP1_1		18
+#define R8A7791_CLK_FDP1_0		19
 #define R8A7791_CLK_TMU3		21
 #define R8A7791_CLK_TMU2		22
 #define R8A7791_CLK_CMT0		24
Signature · 1 line
1.9.1
#5 lore raw

cover ARM: shmobile: Add clock to DT

In reply to Yoshihiro Kaneko

Hi Kaneko-san,

Quoted 8 lines · Yoshihiro Kaneko

This patch series is based on the renesas-devel-20141007-v3.17 tag of Simon's renesas tree.

Changes from v1:
- change the clock name to "3dg" from "pvrsrvkm".
- use the clock name "fdp1-2", "fdp1-1", "fdp1-0", instead of "fdp2", "fdp1" and "fdp0".
- change the definition according to the clock name.

Thanks for this new version.

Acked-by Geert Uytterhoeven <[email protected]>

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#6 lore raw

cover ARM: shmobile: Add clock to DT

Quoted 12 lines · Geert Uytterhoeven

Hi Kaneko-san,

Quoted 8 lines · Yoshihiro Kaneko

This patch series is based on the renesas-devel-20141007-v3.17 tag of Simon's renesas tree.

Changes from v1:
- change the clock name to "3dg" from "pvrsrvkm".
- use the clock name "fdp1-2", "fdp1-1", "fdp1-0", instead of "fdp2", "fdp1" and "fdp0".
- change the definition according to the clock name.

Quoted 3 lines

Thanks for this new version.

Acked-by Geert Uytterhoeven <[email protected]>

Thanks everyone,

I have queued these up for v3.19.