ARM: ls1021a: add gating clocks to IP blocks.
Subsystems (5)
PATCH v4 1/1 ARM: ls1021a: add gating clocks to IP blocks.
A given application may not use all the peripherals on the device. In this case, it may be desirable to disable unused peripherals. DCFG provides a mechanism for gating clocks to IP blocks that are not used when running an application.
---
Change in V4:
- Convert all the bits BE as default.
- Follow some tips from Shawn to be the same with other clk drivers of fsl.
.../devicetree/bindings/clock/ls1021a-clock.txt | 27 +++ arch/arm/mach-imx/Makefile | 2 + arch/arm/mach-imx/clk-ls1021a.c | 191 +++++++++++++++++++++ arch/arm/mach-imx/clk.h | 8 + include/dt-bindings/clock/ls1021a-clock.h | 55 ++++++ 5 files changed, 283 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ls1021a-clock.txt create mode 100644 arch/arm/mach-imx/clk-ls1021a.c create mode 100644 include/dt-bindings/clock/ls1021a-clock.h
Documentation/devicetree/bindings/clock/ls1021a-clock.txt new file +27 -0
@@ -0,0 +1,27 @@ +Gating clock bindings for Freescale LS1021A SOC + +Required properties: +- compatible: Should be "fsl,ls1021a-gate" +- reg: Address and length of the register set +- #clock-cells: Should be <1> + +The clock consumers should specify the desired clock by having one clock +ID in its "clocks" phandle cell. +Please see include/dt-bindings/clock/ls1021a-clock.h for the full list of +LS1021A clock IDs. + +Example: + +gate: gate at 1ee0000 { + compatible = "fsl,ls1021a-gate"; + reg = <0x0 0x1ee0000 0x0 0x10000>; + #clock-cells = <1>; +}; + +wdog0: wdog at 2ad0000 { + compatible = "fsl,ls1021a-wdt", "fsl,imx21-wdt"; + reg = <0x0 0x2ad0000 0x0 0x10000>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gate LS1021A_CLK_WDOG12_EN>; + clock-names = "wdog12_en"; +};
arch/arm/mach-imx/Makefile +2 -0
@@ -110,4 +110,6 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o obj-$(CONFIG_SOC_VF610) += clk-vf610.o mach-vf610.o +obj-$(CONFIG_SOC_LS1021A) += clk-ls1021a.o + obj-y += devices/
arch/arm/mach-imx/clk-ls1021a.c new file +191 -0
191 lines not on this page · raw message
arch/arm/mach-imx/clk.h +8 -0
@@ -107,6 +107,14 @@ static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); } +static inline struct clk *ls1021a_clk_gate (const char *name,const char *parent, +void __iomem *reg,u8 shift) +{ +return clk_register_gate (NULL , name, parent,CLK_SET_RATE_PARENT | +CLK_IGNORE_UNUSED , reg, shift, +CLK_GATE_SET_TO_DISABLE , &imx_ccm_lock); +} +static inline struct clk *imx_clk_mux (const char *name,void __iomem *reg,u8 shift,u8 width,const char **parents,int num_parents) {
include/dt-bindings/clock/ls1021a-clock.h new file +55 -0
55 lines not on this page · raw message
Signature · 1 line
2.1.0.27.g96db324
PATCH v4 1/1 ARM: ls1021a: add gating clocks to IP blocks.
Quoted 14 lines · Xiubo Li
A given application may not use all the peripherals on the device. In this case, it may be desirable to disable unused peripherals. DCFG provides a mechanism for gating clocks to IP blocks that are not used when running an application.
Signed-off-by Xiubo Li <[email protected]>---
Change in V4:
- Convert all the bits BE as default.
- Follow some tips from Shawn to be the same with other clk drivers of fsl.
Quoted 5 lines
.../devicetree/bindings/clock/ls1021a-clock.txt | 27 +++ arch/arm/mach-imx/Makefile | 2 + arch/arm/mach-imx/clk-ls1021a.c | 191 +++++++++++++++++++++ arch/arm/mach-imx/clk.h | 8 + include/dt-bindings/clock/ls1021a-clock.h | 55 ++++++
Why is clock support for a new platform in mach-imx instead of drivers/clk ?
Quoted 4 lines
5 files changed, 283 insertions(+)create mode 100644
Documentation/devicetree/bindings/clock/ls1021a-clock.txtcreate mode 100644arch/arm/mach-imx/clk-ls1021a.c
create mode 100644include/dt-bindings/clock/ls1021a-clock.h
- k
Signature · 3 lines
Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v4 1/1 ARM: ls1021a: add gating clocks to IP blocks.
Quoted 9 lines
Quoted 3 lines
.../devicetree/bindings/clock/ls1021a-clock.txt | 27 +++ arch/arm/mach-imx/Makefile | 2 + arch/arm/mach-imx/clk-ls1021a.c | 191+++++++++++++++++++++
Quoted 2 lines
arch/arm/mach-imx/clk.h| 8 +include/dt-bindings/clock/ls1021a-clock.h| 55 ++++++Why is clock support for a new platform in mach-imx instead of
drivers/clk?
@Shawn,
Has any suggestions about move this to drivers/clk/ ?
Thanks,
BRs
Xiubo
Quoted 11 lines
Quoted 4 lines
5 files changed, 283 insertions(+)create mode 100644
Documentation/devicetree/bindings/clock/ls1021a-clock.txtcreate mode 100644arch/arm/mach-imx/clk-ls1021a.c
create mode 100644include/dt-bindings/clock/ls1021a-clock.h- k
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH v4 1/1 ARM: ls1021a: add gating clocks to IP blocks.
Quoted 7 lines · Li.Xiubo at freescale.com
Quoted 7 lines
Quoted 3 lines
.../devicetree/bindings/clock/ls1021a-clock.txt | 27 +++ arch/arm/mach-imx/Makefile | 2 + arch/arm/mach-imx/clk-ls1021a.c | 191+++++++++++++++++++++
Quoted 2 lines
arch/arm/mach-imx/clk.h| 8 +include/dt-bindings/clock/ls1021a-clock.h| 55 ++++++
Quoted 6 lines
Quoted 2 lines
Why is clock support for a new platform in mach-imx instead of
drivers/clk?@Shawn,
Has any suggestions about move this to
drivers/clk/?
Oh, yes, if you do not rely on anything that mach-imx clock facilities:
helpers, locking and so on, you should really have it in drivers/clk.
Shawn