ARM: meson: Add reset controller

Apparently several IPs found in the MesonX SoCs can be reset by programming a specific bit in a register in the so called AO (Always-On) domain. From the documentation released by Amlogic under NDA it is not clear which devices can be reset acting on this register. So far from the sources release by Amlogic it seems that at least two IPs use this register for reset: RTC and UART. Since I need it to reset the RTC, I wrote this small driver.

v3:
* few changes at comments
* removed register offset

v2:
* removed useless comment
* added platform_get_drvdata
* removed owner field

Carlo Caione (3):
ARM: meson: reset: Add reset controller for MesonX SoCs
ARM: meson: DTSI: Enable reset controller
ARM: meson: docs: Add docs for MesonX reset controller

 .../bindings/reset/amlogic,meson6-rst-mgr-ao.txt   |  14 +++
 arch/arm/boot/dts/meson.dtsi                       |   6 +
 drivers/reset/Makefile                             |   1 +
 drivers/reset/reset-meson.c                        | 138 +++++++++++++++++++++
 4 files changed, 159 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt
 create mode 100644 drivers/reset/reset-meson.c

1.9.1

This patch adds support for the reset controller found on the Amlogic MesonX SoCs. For several devices in the AO (Always-On) power domain, it is possible to reset them by programming a specific bit in a register.

---

Hi Philipp,
from the documentation and the sources I have, it seems that in the register together with the bits for resetting the ICs there are also bits for turning the ICs on and off. I really wanted to avoid create a new of_xlate function just to map the reset IDs to the correct bit in the register so I left the nr_resets to BITS_PER_LONG and I'm using the default of_xlate. This way I can also avoid to use obscure reset IDs to be remapped when I can use directly the bit number in the register as reset ID.

---
 drivers/reset/Makefile      |   1 +
 drivers/reset/reset-meson.c | 138 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 139 insertions(+)
 create mode 100644 drivers/reset/reset-meson.c

index 60fed3d..74f2372 100644
@@ -1,4 +1,5 @@
 obj-$(CONFIG_RESET_CONTROLLER) += core.o
 obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
+obj-$(CONFIG_ARCH_MESON) += reset-meson.o
 obj-$(CONFIG_ARCH_STI) += sti/

1.9.1

Am Montag, den 20.10.2014, 13:19 +0200 schrieb Carlo Caione:

I'm fine with reusing of_reset_simple_xlate and using the bit offsets as reset control number. Do you already know what abstraction you'll choose for the IC enable bits? (Are those clock gates, or maybe power domains?) Hopefully the documentation you obtained will help to decide.

regards
Philipp

Those are clock gates actually. Arnd suggested to add a driver for the entire block (resets and clock gates) so probably I need to dig deeper in the CCF.

Carlo Caione

Add the node for the reset controller in the DTSI.

---
 arch/arm/boot/dts/meson.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

index e6539ea..1ca864e 100644
@@ -75,6 +75,12 @@
 			reg = <0xc1109900 0x8>;
 		};
 
+		reset_AO: reset at c8100040 {
+			#reset-cells = <1>;
+			compatible = "amlogic,meson6-rst-mgr-ao";
+			reg = <0xc8100040 0x4>;
+		};
+
 		uart_AO: serial at c81004c0 {
 			compatible = "amlogic,meson-uart";
 			reg = <0xc81004c0 0x14>;

1.9.1

---
 .../bindings/reset/amlogic,meson6-rst-mgr-ao.txt           | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt

new file mode 100644
index 0000000..4a8fd41
@@ -0,0 +1,14 @@
+Amlogic MesonX Reset Manager (AO domain)
+
+Required properties:
+- compatible : "amlogic,meson6-rst-mgr-ao"
+- reg : Should contain 1 register ranges(address and length)
+- #reset-cells: 1
+
+Example:
+
+	reset: reset at c8100040 {
+		#reset-cells = <1>;
+		compatible = "amlogic,meson6-rst-mgr-ao";
+		reg = <0xc8100040 0x4>;
+	};

1.9.1

Hi Philipp,
a couple of minutes ago I received new documentation about the controller. I'll submit a v4 soon.

Thanks,

Carlo Caione