eeprom: Cleanup and support for multiple i2c busses

index 90c7e61..b8dc14d 100644
@@ -126,7 +126,6 @@ void cpu_init_f (volatile immap_t * immr)
 	 */
 
 #if defined(CONFIG_HERMES)	|| \
-    defined(CONFIG_ICU862)	|| \
     defined(CONFIG_IP860)	|| \
     defined(CONFIG_IVML24)	|| \
     defined(CONFIG_IVMS8)	|| \

index d12b3df..22b8ec7 100644
@@ -205,11 +205,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
 
 	j = 0;
 	while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
-#if defined(CONFIG_ICU862)
-		udelay(10);
-#else
 		udelay(1);
-#endif
 		j++;
 	}
 	if (j>=TOUT_LOOP) {

@@ -424,7 +420,7 @@ static void fec_pin_init(int fecidx)
 
 #endif /* !CONFIG_RMII */
 
-#elif !defined(CONFIG_ICU862)
+#else
 		/*
 		 * Configure all of port D for MII.
 		 */

@@ -437,42 +433,8 @@ static void fec_pin_init(int fecidx)
 			immr->im_ioport.iop_pddir = 0x1c58;	/* Pre rev. D */
 		else
 			immr->im_ioport.iop_pddir = 0x1fff;	/* Rev. D and later */
-#else
-		/*
-		 * Configure port A for MII.
-		 */
-
-#if defined(CONFIG_ICU862) && defined(CONFIG_SYS_DISCOVER_PHY)
-
-		/*
-		 * On the ICU862 board the MII-MDC pin is routed to PD8 pin
-		 * * of CPU, so for this board we need to configure Utopia and
-		 * * enable PD8 to MII-MDC function
-		 */
-		immr->im_ioport.iop_pdpar |= 0x4080;
 #endif
 
-		/*
-		 * Has Utopia been configured?
-		 */
-		if (immr->im_ioport.iop_pdpar & (0x8000 >> 1)) {
-			/*
-			 * YES - Use MUXED mode for UTOPIA bus.
-			 * This frees Port A for use by MII (see 862UM table 41-6).
-			 */
-			immr->im_ioport.utmode &= ~0x80;
-		} else {
-			/*
-			 * NO - set SPLIT mode for UTOPIA bus.
-			 *
-			 * This doesn't really effect UTOPIA (which isn't
-			 * enabled anyway) but just tells the 862
-			 * to use port A for MII (see 862UM table 41-6).
-			 */
-			immr->im_ioport.utmode |= 0x80;
-		}
-#endif				/* !defined(CONFIG_ICU862) */
-
 #endif	/* CONFIG_ETHER_ON_FEC1 */
 	} else if (fecidx == 1) {
 

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index 82a1a98..d481707 100644
@@ -563,16 +563,6 @@ typedef struct scc_enet {
 
 #endif	/* CONFIG_HERMES */
 
-/*** ICU862  **********************************************************/
-
-#if defined(CONFIG_ICU862)
-
-#ifdef CONFIG_FEC_ENET
-#define FEC_ENET	/* use FEC for EThernet */
-#endif  /* CONFIG_FEC_ETHERNET */
-
-#endif /* CONFIG_ICU862 */
-
 /***  IP860  **********************************************************/
 
 #if defined(CONFIG_IP860)

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index 4b667f4..00065b2 100644
@@ -29,8 +29,6 @@
 # define CONFIG_PCMCIA_SLOT_A
 #elif defined(CONFIG_LWMON)		/* The LWMON  use SLOT_B	*/
 # define CONFIG_PCMCIA_SLOT_B
-#elif defined(CONFIG_ICU862)		/* The ICU862 use SLOT_B	*/
-# define CONFIG_PCMCIA_SLOT_B
 #elif defined(CONFIG_R360MPI)		/* The R360MPI use SLOT_B	*/
 # define CONFIG_PCMCIA_SLOT_B
 #elif defined(CONFIG_ATC)		/* The ATC use SLOT_A	*/

index c1d2242..c5de894 100644
@@ -114,25 +114,6 @@ void status_led_set  (int led, int state);
 # define STATUS_LED_GREEN	1
 # define STATUS_LED_BOOT	2		/* IDE LED used for boot status */
 
-/*****  ICU862   ********************************************************/
-#elif defined(CONFIG_ICU862)
-
-# define STATUS_LED_PAR		im_ioport.iop_papar
-# define STATUS_LED_DIR		im_ioport.iop_padir
-# define STATUS_LED_ODR		im_ioport.iop_paodr
-# define STATUS_LED_DAT		im_ioport.iop_padat
-
-# define STATUS_LED_BIT		0x4000		/* LED 0 is on PA.1 */
-# define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 2)
-# define STATUS_LED_STATE	STATUS_LED_BLINKING
-# define STATUS_LED_BIT1	0x1000		/* LED 1 is on PA.3 */
-# define STATUS_LED_PERIOD1	(CONFIG_SYS_HZ)
-# define STATUS_LED_STATE1	STATUS_LED_OFF
-
-# define STATUS_LED_ACTIVE	1		/* LED on for bit == 1	*/
-
-# define STATUS_LED_BOOT	0		/* LED 0 used for boot status */
-
 /*****  Someone else defines these  *************************************/
 #elif defined(STATUS_LED_PAR)
 

index b8dc14d..60c401e 100644
@@ -130,7 +130,6 @@ void cpu_init_f (volatile immap_t * immr)
     defined(CONFIG_IVML24)	|| \
     defined(CONFIG_IVMS8)	|| \
     defined(CONFIG_LWMON)	|| \
-    defined(CONFIG_MHPC)	|| \
     defined(CONFIG_R360MPI)	|| \
     defined(CONFIG_RMU)		|| \
     defined(CONFIG_SPD823TS)

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index d481707..d78ab00 100644
@@ -703,28 +703,6 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00250000)
 #endif	/* CONFIG_KM8XX */
 
-
-/***  MHPC  ********************************************************/
-
-#if defined(CONFIG_MHPC)
-/* This ENET stuff is for the MHPC with ethernet on SCC2.
- * Note TENA is on Port B.
- */
-#define	PROFF_ENET	PROFF_SCC2
-#define	CPM_CR_ENET	CPM_CR_CH_SCC2
-#define	SCC_ENET	1
-#define PA_ENET_RXD	((ushort)0x0004)	/* PA 13 */
-#define PA_ENET_TXD	((ushort)0x0008)	/* PA 12 */
-#define PA_ENET_RCLK	((ushort)0x0200)	/* PA 6 */
-#define PA_ENET_TCLK	((ushort)0x0400)	/* PA 5 */
-#define PB_ENET_TENA	((uint)0x00002000)	/* PB 18 */
-#define PC_ENET_CLSN	((ushort)0x0040)	/* PC 9 */
-#define PC_ENET_RENA	((ushort)0x0080)	/* PC 8 */
-
-#define SICR_ENET_MASK	((uint)0x0000ff00)
-#define SICR_ENET_CLKRT	((uint)0x00002e00)	/* RCLK-CLK2, TCLK-CLK3 */
-#endif	/* CONFIG_MHPC */
-
 /***  NETVIA  *******************************************************/
 
 #if defined(CONFIG_NETVIA)

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index d93a991..f9f15b5 100644
@@ -645,32 +645,7 @@ eth_loopback_test (void)
 
 	/* 28.9 - (1-2): ioports have been set up already */
 
-#if defined(CONFIG_HYMOD)
-	/*
-	 * Attention: this is board-specific
-	 * 0, FCC1
-	 * 1, FCC2
-	 * 2, FCC3
-	 */
-#       define FCC_START_LOOP 0
-#       define FCC_END_LOOP   2
-
-	/*
-	 * Attention: this is board-specific
-	 * - FCC1 Rx-CLK is CLK10
-	 * - FCC1 Tx-CLK is CLK11
-	 * - FCC2 Rx-CLK is CLK13
-	 * - FCC2 Tx-CLK is CLK14
-	 * - FCC3 Rx-CLK is CLK15
-	 * - FCC3 Tx-CLK is CLK16
-	 */
-
-	/* 28.9 - (3): connect FCC's tx and rx clocks */
-	immr->im_cpmux.cmx_uar = 0;
-	immr->im_cpmux.cmx_fcr = CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11|\
-	    CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14|\
-	    CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16;
-#elif defined(CONFIG_SACSng)
+#if defined(CONFIG_SACSng)
 	/*
 	 * Attention: this is board-specific
 	 * 1, FCC2

index 30125a7..41d2c04 100644
@@ -142,15 +142,7 @@ int interrupt_init_cpu (unsigned *decrementer_count)
 	immr->im_intctl.ic_sipnrh = 0xffffffff;
 	immr->im_intctl.ic_sipnrl = 0xffffffff;
 
-#ifdef CONFIG_HYMOD
-	/*
-	 * ensure all external interrupt sources default to trigger on
-	 * high-to-low transition (i.e. edge triggered active low)
-	 */
-	immr->im_intctl.ic_siexr = -1;
-#endif
-
-	return (0);
+	return 0;
 }
 
 /****************************************************************************/

index e1b566f..a61e998 100644
@@ -77,9 +77,6 @@ typedef struct bd_info {
 	unsigned int	bi_pci_busfreq;	/* PCI Bus speed, in Hz */
 	unsigned char	bi_pci_enetaddr[6];	/* PCI Ethernet MAC address */
 #endif
-#if defined(CONFIG_HYMOD)
-	hymod_conf_t	bi_hymod_conf;	/* hymod configuration information */
-#endif
 
 #ifdef CONFIG_HAS_ETH1
 	unsigned char   bi_enet1addr[6];	/* OLD: see README.enetaddr */

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index 62cb1ea..aef39d7 100644

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index d5020c8..c96b58e 100644

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deleted file mode 100644
index e1f6865..0000000
@@ -1,34 +0,0 @@
-/*
- * Copyright 2009-2010 eXMeritus, A Boeing Company
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
- */
-
-#include <common.h>
-
-#include <fsl_ddr_sdram.h>
-#include <fsl_ddr_dimm_params.h>
-
-void fsl_ddr_board_options(memctl_options_t *popts,
-				dimm_params_t *pdimm,
-				unsigned int ctrl_num)
-{
-	/*
-	 * We only support one DIMM, so according to the P2020 docs we should
-	 * set the options as follows:
-	 */
-	popts->cs_local_opts[0].odt_rd_cfg = 0;
-	popts->cs_local_opts[0].odt_wr_cfg = 4;
-	popts->cs_local_opts[1].odt_rd_cfg = 0;
-	popts->cs_local_opts[1].odt_wr_cfg = 0;
-	popts->half_strength_driver_enable = 0;
-
-	/* Manually configured for our static clock rate */
-	popts->clk_adjust = 4;
-	popts->cpo_override = 4;
-	popts->write_data_delay = 2;
-	popts->twot_en = 0;
-}

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deleted file mode 100644
index c7dc58d..0000000
@@ -1,18 +0,0 @@
-/*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, [email protected].
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/fsl_law.h>
-#include <asm/mmu.h>
-
-struct law_entry law_table[] = {
-	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
-};
-
-int num_law_entries = ARRAY_SIZE(law_table);

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index 0a47fdc..f7bb05d 100644
@@ -262,8 +262,6 @@ void pci_mpc8250_init (struct pci_controller *hose)
 				  | SIUMCR_CS10PC00
 				  | SIUMCR_BCTLC00
 				  | SIUMCR_MMR11;
-#elif defined(CONFIG_TQM8272)
-/* nothing to do for this Board here */
 #else
 	/*
 	 * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),

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deleted file mode 100644
index 1eeaf0e..0000000
@@ -1,37 +0,0 @@
-/*
- * (C) Copyright 2008
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef	_TQM8272_HEADER_H
-#define	_TQM8272_HEADER_H
-
-#define _NOT_USED_	0xFFFFFFFF
-
-typedef struct{
-	int	Bus;
-	int	flash;
-	int	flash_nr;
-	int	ram;
-	int	ram_cs;
-	int	nand;
-	int	nand_cs;
-	int	eeprom;
-	int	can;
-	unsigned long	cpunr;
-	unsigned long	option;
-	int	SecEng;
-	int	cpucl;
-	int	cpmcl;
-	int	buscl;
-	int	busclk_real_ok;
-	int	busclk_real;
-	unsigned char	OK;
-	unsigned char  ethaddr[20];
-} HWIB_INFO;
-
-static HWIB_INFO	hwinf = {0, 0, 1, 0, 1, 0, 0, 0, 0, 8272, 0 ,0,
-			 0, 0, 0, 0, 0, 0};
-#endif	/* __CONFIG_H */

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index 1c74a0f..340a009 100644
@@ -77,17 +77,13 @@ static int handle_eeprom_v1(struct tricorder_eeprom *eeprom)
 
 int tricorder_get_eeprom(int addr, struct tricorder_eeprom *eeprom)
 {
-#ifdef CONFIG_SYS_EEPROM_BUS_NUM
 	unsigned int bus = i2c_get_bus_num();
 	i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
-#endif
 
 	memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
 
 	i2c_read(addr, 0, 2, (unsigned char *)eeprom, TRICORDER_EEPROM_SIZE);
-#ifdef CONFIG_SYS_EEPROM_BUS_NUM
 	i2c_set_bus_num(bus);
-#endif
 
 	if (be32_to_cpu(eeprom->magic) != TRICORDER_EEPROM_MAGIC) {
 		warn_wrong_value("magic", TRICORDER_EEPROM_MAGIC,

@@ -138,9 +134,6 @@ int tricorder_eeprom_write(unsigned devaddr, const char *name,
 	int ret;
 	unsigned char *p;
 	int i;
-#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-	unsigned int bus;
-#endif
 
 	memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
 	memset(eeprom_verify, 0, TRICORDER_EEPROM_SIZE);

@@ -172,33 +165,23 @@ int tricorder_eeprom_write(unsigned devaddr, const char *name,
 	print_buffer(0, &eeprom, 1, sizeof(eeprom), 16);
 #endif
 
-#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-	bus = i2c_get_bus_num();
-	i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
-#endif
+	eeprom_init(CONFIG_SYS_EEPROM_BUS_NUM);
 
-	/* do page write to the eeprom */
-	for (i = 0, p = (unsigned char *)&eeprom;
-	     i < sizeof(eeprom);
-	     i += 32, p += 32) {
-		ret = i2c_write(devaddr, i, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
-				p, min(sizeof(eeprom) - i, 32));
-		if (ret)
-			break;
-		udelay(5000); /* 5ms write cycle timing */
-	}
+	ret = eeprom_write(devaddr, 0, (unsigned char *)&eeprom,
+			TRICORDER_EEPROM_SIZE);
+	if (ret)
+		printf("Tricorder: Could not write EEPROM content!\n");
 
-	ret = i2c_read(devaddr, 0, 2, (unsigned char *)&eeprom_verify,
+	ret = eeprom_read(devaddr, 0, (unsigned char *)&eeprom_verify,
 			TRICORDER_EEPROM_SIZE);
+	if (ret)
+		printf("Tricorder: Could not read EEPROM content!\n");
 
 	if (memcmp(&eeprom, &eeprom_verify, sizeof(eeprom)) != 0) {
 		printf("Tricorder: Could not verify EEPROM content!\n");
 		ret = 1;
 	}
 
-#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-	i2c_set_bus_num(bus);
-#endif
 	return ret;
 }
 

@@ -206,7 +189,7 @@ int do_tricorder_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	if (argc == 3) {
 		ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
-		eeprom_init();
+
 		if (strcmp(argv[1], "read") == 0) {
 			int rcode;
 

@@ -220,7 +203,6 @@ int do_tricorder_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		char *version = argv[4];
 		char *serial = argv[5];
 		char *interface = NULL;
-		eeprom_init();
 
 		if (argc == 7)
 			interface = argv[6];

index a02f0cb..17d241d 100644
@@ -25,94 +25,60 @@
 #include <command.h>
 #include <i2c.h>
 
-extern void eeprom_init  (void);
-extern int  eeprom_read  (unsigned dev_addr, unsigned offset,
-			  uchar *buffer, unsigned cnt);
-extern int  eeprom_write (unsigned dev_addr, unsigned offset,
-			  uchar *buffer, unsigned cnt);
-#if defined(CONFIG_SYS_EEPROM_WREN)
-extern int eeprom_write_enable (unsigned dev_addr, int state);
+#ifndef	CONFIG_SYS_I2C_SPEED
+#define	CONFIG_SYS_I2C_SPEED	50000
 #endif
 
-
+/* Maximum number of times to poll for acknowledge after write */
 #if defined(CONFIG_SYS_EEPROM_X40430)
-	/* Maximum number of times to poll for acknowledge after write */
 #define MAX_ACKNOWLEDGE_POLLS	10
 #endif
 
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_CMD_EEPROM)
-static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	const char *const fmt =
-		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";
-
-#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
-	if (argc == 6) {
-		ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
-		ulong addr = simple_strtoul (argv[3], NULL, 16);
-		ulong off  = simple_strtoul (argv[4], NULL, 16);
-		ulong cnt  = simple_strtoul (argv[5], NULL, 16);
-#else
-	if (argc == 5) {
-		ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
-		ulong addr = simple_strtoul (argv[2], NULL, 16);
-		ulong off  = simple_strtoul (argv[3], NULL, 16);
-		ulong cnt  = simple_strtoul (argv[4], NULL, 16);
-#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
-
-# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-		eeprom_init ();
-# endif /* !CONFIG_SPI */
-
-		if (strcmp (argv[1], "read") == 0) {
-			int rcode;
-
-			printf (fmt, dev_addr, argv[1], addr, off, cnt);
-
-			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
-
-			puts ("done\n");
-			return rcode;
-		} else if (strcmp (argv[1], "write") == 0) {
-			int rcode;
-
-			printf (fmt, dev_addr, argv[1], addr, off, cnt);
-
-			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
-
-			puts ("done\n");
-			return rcode;
-		}
-	}
-
-	return CMD_RET_USAGE;
-}
-#endif
-
-/*-----------------------------------------------------------------------
- *
+/*
  * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
  *
  * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
  *   0x00000nxx for EEPROM address selectors and page number at n.
  */
-
 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
+#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
+    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
+    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
 #endif
 #endif
 
+#if defined(CONFIG_SYS_EEPROM_WREN)
+extern int eeprom_write_enable (unsigned dev_addr, int state);
+#endif
+
+void eeprom_init(void)
+{
+	/* SPI EEPROM */
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+	spi_init_f ();
+#endif
+
+	/* I2C EEPROM */
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) || \
+	defined(CONFIG_SYS_I2C)
+#ifdef CONFIG_SYS_I2C
+	i2c_init_all();
+#else
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
+#endif
+}
+
 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
 	unsigned end = offset + cnt;
 	unsigned blk_off;
 	int rcode = 0;
 
-	/* Read data until done or would cross a page boundary.
+	/*
+	 * Read data until done or would cross a page boundary.
 	 * We must write the address again when changing pages
 	 * because the next page may be in a different device.
 	 */

@@ -171,15 +137,6 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 	return rcode;
 }
 
-/*-----------------------------------------------------------------------
- *
- * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
- *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
- *
- * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
- *   0x00000nxx for EEPROM address selectors and page number at n.
- */
-
 int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
 	unsigned end = offset + cnt;

@@ -197,7 +154,8 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 #if defined(CONFIG_SYS_EEPROM_WREN)
 	eeprom_write_enable (dev_addr,1);
 #endif
-	/* Write data until done or would cross a write page boundary.
+	/*
+	 * Write data until done or would cross a write page boundary.
 	 * We must write the address again when changing pages
 	 * because the address counter only increments within a page.
 	 */

@@ -357,8 +315,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 }
 
 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-int
-eeprom_probe (unsigned dev_addr, unsigned offset)
+int eeprom_probe(unsigned dev_addr, unsigned offset)
 {
 	unsigned char chip;
 

@@ -376,35 +333,52 @@ eeprom_probe (unsigned dev_addr, unsigned offset)
 }
 #endif
 
-/*-----------------------------------------------------------------------
- * Set default values
- */
-#ifndef	CONFIG_SYS_I2C_SPEED
-#define	CONFIG_SYS_I2C_SPEED	50000
-#endif
-
-void eeprom_init  (void)
+static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
+	const char *const fmt =
+		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";
 
-#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-	spi_init_f ();
-#endif
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) || \
-	defined(CONFIG_SYS_I2C)
-#ifdef CONFIG_SYS_I2C
-	i2c_init_all();
+#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
+	if (argc == 6) {
+		ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
+		ulong addr = simple_strtoul (argv[3], NULL, 16);
+		ulong off  = simple_strtoul (argv[4], NULL, 16);
+		ulong cnt  = simple_strtoul (argv[5], NULL, 16);
 #else
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-#endif
-#endif
-}
+	if (argc == 5) {
+		ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
+		ulong addr = simple_strtoul (argv[2], NULL, 16);
+		ulong off  = simple_strtoul (argv[3], NULL, 16);
+		ulong cnt  = simple_strtoul (argv[4], NULL, 16);
+#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
 
-/*-----------------------------------------------------------------------
- */
+# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+		eeprom_init ();
+# endif /* !CONFIG_SPI */
 
-/***************************************************/
+		if (strcmp (argv[1], "read") == 0) {
+			int rcode;
 
-#if defined(CONFIG_CMD_EEPROM)
+			printf (fmt, dev_addr, argv[1], addr, off, cnt);
+
+			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
+
+			puts ("done\n");
+			return rcode;
+		} else if (strcmp (argv[1], "write") == 0) {
+			int rcode;
+
+			printf (fmt, dev_addr, argv[1], addr, off, cnt);
+
+			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
+
+			puts ("done\n");
+			return rcode;
+		}
+	}
+
+	return CMD_RET_USAGE;
+}
 
 #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
 U_BOOT_CMD(

@@ -423,5 +397,3 @@ U_BOOT_CMD(
 	"       - read/write `cnt' bytes at EEPROM offset `off'"
 )
 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
-
-#endif

index 17d241d..67de730 100644
@@ -337,50 +337,50 @@ static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	const char *const fmt =
 		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";
+	char * const *args = &argv[2];
+	int rcode;
+	ulong dev_addr, addr, off, cnt;
+
+	switch (argc) {
+#ifdef CONFIG_SYS_DEF_EEPROM_ADDR
+	case 5:
+		dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
+		break;
+#endif
+	case 6:
+		dev_addr = simple_strtoul(*args++, NULL, 16);
+		break;
+	default:
+		return CMD_RET_USAGE;
+	}
 
-#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
-	if (argc == 6) {
-		ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
-		ulong addr = simple_strtoul (argv[3], NULL, 16);
-		ulong off  = simple_strtoul (argv[4], NULL, 16);
-		ulong cnt  = simple_strtoul (argv[5], NULL, 16);
-#else
-	if (argc == 5) {
-		ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
-		ulong addr = simple_strtoul (argv[2], NULL, 16);
-		ulong off  = simple_strtoul (argv[3], NULL, 16);
-		ulong cnt  = simple_strtoul (argv[4], NULL, 16);
-#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
+	addr = simple_strtoul(*args++, NULL, 16);
+	off = simple_strtoul(*args++, NULL, 16);
+	cnt = simple_strtoul(*args++, NULL, 16);
 
 # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-		eeprom_init ();
+	eeprom_init ();
 # endif /* !CONFIG_SPI */
 
-		if (strcmp (argv[1], "read") == 0) {
-			int rcode;
-
-			printf (fmt, dev_addr, argv[1], addr, off, cnt);
-
-			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
+	if (strcmp (argv[1], "read") == 0) {
+		printf(fmt, dev_addr, argv[1], addr, off, cnt);
 
-			puts ("done\n");
-			return rcode;
-		} else if (strcmp (argv[1], "write") == 0) {
-			int rcode;
+		rcode = eeprom_read(dev_addr, off, (uchar *) addr, cnt);
 
-			printf (fmt, dev_addr, argv[1], addr, off, cnt);
+		puts ("done\n");
+		return rcode;
+	} else if (strcmp (argv[1], "write") == 0) {
+		printf(fmt, dev_addr, argv[1], addr, off, cnt);
 
-			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
+		rcode = eeprom_write(dev_addr, off, (uchar *) addr, cnt);
 
-			puts ("done\n");
-			return rcode;
-		}
+		puts ("done\n");
+		return rcode;
 	}
 
 	return CMD_RET_USAGE;
 }
 
-#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
 U_BOOT_CMD(
 	eeprom,	6,	1,	do_eeprom,
 	"EEPROM sub-system",

@@ -388,12 +388,3 @@ U_BOOT_CMD(
 	"eeprom write devaddr addr off cnt\n"
 	"       - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
 )
-#else /* One EEPROM */
-U_BOOT_CMD(
-	eeprom,	5,	1,	do_eeprom,
-	"EEPROM sub-system",
-	"read  addr off cnt\n"
-	"eeprom write addr off cnt\n"
-	"       - read/write `cnt' bytes at EEPROM offset `off'"
-)
-#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */

index 56a3e94..3d488c7 100644
@@ -265,7 +265,6 @@ extern unsigned long get_sdram_size(void);
 
 /* I2C EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index aeded6d..a75775a 100644
@@ -464,7 +464,6 @@ combinations. this should be removed later
 
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index 715616d..a8da16d 100644
@@ -422,7 +422,6 @@
 /* I2C EEPROM */
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index 7d58e9d..94b3efa 100644
@@ -253,7 +253,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2	/* Bytes of address		*/
 /* mask of address bits that overflow into the "EEPROM chip address"	*/
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x01
-#define CONFIG_SYS_I2C_MULTI_EEPROMS   1       /* more than one eeprom used!   */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5	/* The Catalyst CAT24WC32 has	*/
 					/* 32 byte page write mode using*/
 					/* last 5 bits of the address	*/

index 304a12b..c57457b 100644
@@ -167,7 +167,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_SPEED	80000		/* I2C speed default */
 
 #define CONFIG_PRAM 0

index b77c8b2..03f38c2 100644
@@ -250,7 +250,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_SPEED	40000		/* I2C speed default */
 
 /* #define CONFIG_SYS_GT_DUAL_CPU	 also for JTAG even with one cpu */

index abc4434..96a6254 100644
@@ -188,7 +188,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_SPEED	40000		/* I2C speed default */
 
 /* #define CONFIG_SYS_GT_DUAL_CPU	 also for JTAG even with one cpu */

index be5494b..4409553 100644
@@ -170,7 +170,6 @@
 #define IIC1_USB2507_ADDR	0x2c
 #define CONFIG_SYS_I2C_NOPROBES		{ {1, IIC1_USB2507_ADDR} }
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x54
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5

index a373990..eed836b 100644
@@ -661,7 +661,6 @@ extern unsigned long get_sdram_size(void);
 #endif
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index c5e2f16..eb23839 100644
@@ -156,7 +156,6 @@
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_1		400000
 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_1		0x7F
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2

index 6762e3a..7792ccb 100644
@@ -181,7 +181,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2	/* 16 bit */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5	/* 32 bytes/write */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	12	/* 10ms +/- 20% */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS		/* more than one eeprom */
 
 /* I2C RTC */
 #define CONFIG_RTC_DS1337			/* use ds1337 rtc via i2c */

index 895ad46..de4585d 100644
@@ -273,7 +273,6 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4	/* The Catalyst CAT24WC08 has	*/
 					/* 16 byte page write mode using*/
 					/* last	4 bits of the address	*/
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 /*-----------------------------------------------------------------------
  * Definitions for Serial Presence Detect EEPROM address
  * (to get SDRAM settings)

index 2a38116..bac5ba9 100644
@@ -276,7 +276,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* EEPROM ATMEL 24C04N		*/
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* Bytes of address		*/
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 /*-----------------------------------------------------------------------
  * Definitions for Serial Presence Detect EEPROM address
  * (to get SDRAM settings)

index 4dd5720..2f53d73 100644
@@ -120,7 +120,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 476430d..07cd2d8 100644
@@ -209,7 +209,6 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 /* PMIC support */
 #define CONFIG_POWER_TPS65217

index 0707827..3f92dd2 100644
@@ -30,7 +30,6 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 /* Power */
 #define CONFIG_POWER

index 1bf8390..008d394 100644
@@ -98,7 +98,6 @@
 /*
  * EEPROM configuration
  */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR		(0xA8 >> 1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	1

index 6ba4aaf..5b8b22f 100644
@@ -139,7 +139,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 8eeb15c..5349511 100644
@@ -246,7 +246,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR		(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3

index ec926fd..92c1900 100644
@@ -173,7 +173,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
-#define CONFIG_SYS_I2C_MULTI_EEPROMS		1
 /*
  * Flash configuration
  */

index 3f0ad69..18012bb 100644
@@ -123,7 +123,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index bbe9b59..d9a3671 100644
@@ -107,7 +107,6 @@
 
 #define CONFIG_SYS_SPD_BUS_NUM	0	/* The I2C bus for SPD		*/
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 928eb5b..1accb64 100644
@@ -217,7 +217,6 @@
  */
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR		(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3

index fa72eb0..664896b 100644
@@ -109,7 +109,6 @@
 #define IIC0_BOOTPROM_ADDR	0x50
 #define IIC0_ALT_BOOTPROM_ADDR	0x54
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0x50)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index eb85a74..2b0b9dc 100644
@@ -21,7 +21,6 @@
 #define CONFIG_KM_COMMON_ETH_INIT
 
 /* EEprom support 24C08, 24C16, 24C64 */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3  /* 8 Byte write page */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10

index d31e674..1061d1d 100644
@@ -218,7 +218,6 @@ int get_scl(void);
 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
 
 /* EEprom support 24C128, 24C256 valid for environment eeprom */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10

index 5494a60..1085237 100644
@@ -147,7 +147,6 @@
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0		0x7F
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 51926f7..c6cee42 100644
@@ -120,7 +120,6 @@
 #define I2C_BUS_MAX			3
 
 /* EEPROM definitions */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
 #define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6

index 15e4a7e..e22d0e8 100644
@@ -119,7 +119,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index efe770b..b566e54 100644
@@ -97,7 +97,6 @@
 
 /* EEPROM */
 #ifdef CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
 #endif
 

index b270429..aab787d 100644
@@ -148,7 +148,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
-#define CONFIG_SYS_I2C_MULTI_EEPROMS		1
 /*
  * Flash configuration
  */

index e8b0593..2d2fcd8 100644
@@ -296,7 +296,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	1	/* 2 bytes per write cycle */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5	/* 2ms/cycle + 3ms extra */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS		1	/* 2 EEPROMs (addr:50,52) */
 
 /*
  * RTC configuration

index 4ff2f05..cd9e5ea 100644
@@ -136,7 +136,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 9b58950..95250f3 100644
@@ -665,7 +665,6 @@
 
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index 911203d..203d041 100644
@@ -261,7 +261,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 /* enable read and write access to EEPROM */
 #define CONFIG_CMD_EEPROM
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5

index 7d102a4..e99a5c6 100644
@@ -109,7 +109,6 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }

index 4684ad6..fdb103f 100644
@@ -112,7 +112,6 @@
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 /* SPL */
 #define CONFIG_SPL_POWER_SUPPORT

index be76478..af334f7 100644
@@ -165,7 +165,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	5
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20
-#define CONFIG_SYS_I2C_MULTI_EEPROMS		1
 /*
  * Flash configuration
  */

index b6a5e6a..5af751b 100644
@@ -160,7 +160,6 @@
  */
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 502e795..7942865 100644
@@ -307,7 +307,6 @@
  */
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0			400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR		(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3

index 3d5c351..64568fe 100644
@@ -121,7 +121,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#undef CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 6ddf3d5..7a46e60 100644
@@ -109,7 +109,6 @@
  
 
 /* EEPROM */
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_CMD_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
 #define CONFIG_SYS_EEPROM_BUS_NUM	1

index 8b803a2..dd6b519 100644
@@ -80,7 +80,6 @@
  */
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 8508a80..0cffab8 100644
@@ -122,7 +122,6 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0		400000
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR	(0xa8>>1)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3

index 67de730..b0acf11 100644
@@ -29,11 +29,6 @@
 #define	CONFIG_SYS_I2C_SPEED	50000
 #endif
 
-/* Maximum number of times to poll for acknowledge after write */
-#if defined(CONFIG_SYS_EEPROM_X40430)
-#define MAX_ACKNOWLEDGE_POLLS	10
-#endif
-
 /*
  * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.

@@ -143,14 +138,6 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 	unsigned blk_off;
 	int rcode = 0;
 
-#if defined(CONFIG_SYS_EEPROM_X40430)
-	uchar	contr_r_addr[2];
-	uchar	addr_void[2];
-	uchar	contr_reg[2];
-	uchar	ctrl_reg_v;
-	int	i;
-#endif
-
 #if defined(CONFIG_SYS_EEPROM_WREN)
 	eeprom_write_enable (dev_addr,1);
 #endif

@@ -215,88 +202,6 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 		spi_write (addr, alen, buffer, len);
 #else
-#if defined(CONFIG_SYS_EEPROM_X40430)
-		/* Get the value of the control register.
-		 * Set current address (internal pointer in the x40430)
-		 * to 0x1ff.
-		 */
-		contr_r_addr[0] = 9;
-		contr_r_addr[1] = 0xff;
-		addr_void[0]    = 0;
-		addr_void[1]    = addr[1];
-#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
-		contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
-		addr_void[0]    |= CONFIG_SYS_I2C_EEPROM_ADDR;
-#endif
-		contr_reg[0] = 0xff;
-		if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
-			rcode = 1;
-		}
-		ctrl_reg_v = contr_reg[0];
-
-		/* Are any of the eeprom blocks write protected?
-		 */
-		if (ctrl_reg_v & 0x18) {
-			ctrl_reg_v &= ~0x18;   /* reset block protect bits  */
-			ctrl_reg_v |=  0x02;   /* set write enable latch    */
-			ctrl_reg_v &= ~0x04;   /* clear RWEL                */
-
-			/* Set write enable latch.
-			 */
-			contr_reg[0] = 0x02;
-			if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
-				rcode = 1;
-			}
-
-			/* Set register write enable latch.
-			 */
-			contr_reg[0] = 0x06;
-			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
-				rcode = 1;
-			}
-
-			/* Modify ctrl register.
-			 */
-			contr_reg[0] = ctrl_reg_v;
-			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
-				rcode = 1;
-			}
-
-			/* The write (above) is an operation on NV memory.
-			 * These can take some time (~5ms), and the device
-			 * will not respond to further I2C messages till
-			 * it's completed the write.
-			 * So poll device for an I2C acknowledge.
-			 * When we get one we know we can continue with other
-			 * operations.
-			 */
-			contr_reg[0] = 0;
-			for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
-				if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
-					break;	/* got ack */
-#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
-				udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
-#endif
-			}
-			if (i == MAX_ACKNOWLEDGE_POLLS) {
-				puts ("EEPROM poll acknowledge failed\n");
-				rcode = 1;
-			}
-		}
-
-		/* Is the write enable latch on?.
-		 */
-		else if (!(ctrl_reg_v & 0x02)) {
-			/* Set write enable latch.
-			 */
-			contr_reg[0] = 0x02;
-			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
-			       rcode = 1;
-			}
-		}
-		/* Write is enabled ... now write eeprom value.
-		 */
-#endif
 		if (i2c_write(addr[0], offset, alen - 1, buffer, len))
 			rcode = 1;
 

index b0acf11..ff492c4 100644
@@ -219,25 +219,6 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 	return rcode;
 }
 
-#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-int eeprom_probe(unsigned dev_addr, unsigned offset)
-{
-	unsigned char chip;
-
-	/* Probe the chip address
-	 */
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
-	chip = offset >> 8;		/* block number */
-#else
-	chip = offset >> 16;		/* block number */
-#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
-
-	chip |= dev_addr;		/* insert device address */
-
-	return (i2c_probe (chip));
-}
-#endif
-
 static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	const char *const fmt =

index c96b58e..68596fc 100644
@@ -456,9 +456,6 @@ void	fdc_hw_init   (void);
 
 /* $(BOARD)/eeprom.c */
 void eeprom_init  (void);
-#ifndef CONFIG_SPI
-int  eeprom_probe (unsigned dev_addr, unsigned offset);
-#endif
 int  eeprom_read  (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
 int  eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
 #ifdef CONFIG_LWMON

index ff492c4..d00598b 100644
@@ -83,7 +83,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 		unsigned maxlen;
 #endif
 
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
 		uchar addr[2];
 
 		blk_off = offset & 0xFF;	/* block offset */

@@ -100,7 +100,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 		addr[1] = offset >>  8;		/* upper address octet */
 		addr[2] = blk_off;		/* lower address octet */
 		alen	= 3;
-#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
 
 		addr[0] |= dev_addr;		/* insert device address */
 

@@ -153,7 +153,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		unsigned maxlen;
 #endif
 
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
 		uchar addr[2];
 
 		blk_off = offset & 0xFF;	/* block offset */

@@ -170,7 +170,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		addr[1] = offset >>  8;		/* upper address octet */
 		addr[2] = blk_off;		/* lower address octet */
 		alen	= 3;
-#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
 
 		addr[0] |= dev_addr;		/* insert device address */
 

index d00598b..b956233 100644
@@ -66,6 +66,29 @@ void eeprom_init(void)
 #endif
 }
 
+static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
+			   uchar *buffer, unsigned len, bool read)
+{
+	int ret = 0;
+
+	/* SPI */
+#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+	if (read)
+		spi_read(addr, alen, buffer, len);
+	else
+		spi_write(addr, alen, buffer, len);
+#else	/* I2C */
+	if (read)
+		ret = i2c_read(addr[0], offset, alen - 1, buffer, len);
+	else
+		ret = i2c_write(addr[0], offset, alen - 1, buffer, len);
+
+	if (ret)
+		ret = 1;
+#endif
+	return ret;
+}
+
 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
 	unsigned end = offset + cnt;

@@ -119,12 +142,8 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 			len = maxlen;
 #endif
 
-#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-		spi_read (addr, alen, buffer, len);
-#else
-		if (i2c_read(addr[0], offset, alen - 1, buffer, len))
-			rcode = 1;
-#endif
+		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 1);
+
 		buffer += len;
 		offset += len;
 	}

@@ -199,13 +218,8 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 			len = maxlen;
 #endif
 
-#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-		spi_write (addr, alen, buffer, len);
-#else
-		if (i2c_write(addr[0], offset, alen - 1, buffer, len))
-			rcode = 1;
+		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 0);
 
-#endif
 		buffer += len;
 		offset += len;
 

index b956233..78c6121 100644
@@ -66,6 +66,28 @@ void eeprom_init(void)
 #endif
 }
 
+static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
+{
+	unsigned blk_off;
+	int alen;
+
+	blk_off = offset & 0xff;	/* block offset */
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
+	addr[0] = offset >> 8;		/* block number */
+	addr[1] = blk_off;		/* block offset */
+	alen = 2;
+#else
+	addr[0] = offset >> 16;		/* block number */
+	addr[1] = offset >>  8;		/* upper address octet */
+	addr[2] = blk_off;		/* lower address octet */
+	alen = 3;
+#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
+
+	addr[0] |= dev_addr;		/* insert device address */
+
+	return alen;
+}
+
 static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
 			   uchar *buffer, unsigned len, bool read)
 {

@@ -94,6 +116,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 	unsigned end = offset + cnt;
 	unsigned blk_off;
 	int rcode = 0;
+	uchar addr[3];
 
 	/*
 	 * Read data until done or would cross a page boundary.

@@ -106,26 +129,8 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 		unsigned maxlen;
 #endif
 
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
-		uchar addr[2];
-
-		blk_off = offset & 0xFF;	/* block offset */
-
-		addr[0] = offset >> 8;		/* block number */
-		addr[1] = blk_off;		/* block offset */
-		alen	= 2;
-#else
-		uchar addr[3];
-
 		blk_off = offset & 0xFF;	/* block offset */
-
-		addr[0] = offset >> 16;		/* block number */
-		addr[1] = offset >>  8;		/* upper address octet */
-		addr[2] = blk_off;		/* lower address octet */
-		alen	= 3;
-#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
-
-		addr[0] |= dev_addr;		/* insert device address */
+		alen = eeprom_addr(dev_addr, offset, addr);
 
 		len = end - offset;
 

@@ -156,6 +161,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 	unsigned end = offset + cnt;
 	unsigned blk_off;
 	int rcode = 0;
+	uchar addr[3];
 
 #if defined(CONFIG_SYS_EEPROM_WREN)
 	eeprom_write_enable (dev_addr,1);

@@ -172,26 +178,8 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		unsigned maxlen;
 #endif
 
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
-		uchar addr[2];
-
 		blk_off = offset & 0xFF;	/* block offset */
-
-		addr[0] = offset >> 8;		/* block number */
-		addr[1] = blk_off;		/* block offset */
-		alen	= 2;
-#else
-		uchar addr[3];
-
-		blk_off = offset & 0xFF;	/* block offset */
-
-		addr[0] = offset >> 16;		/* block number */
-		addr[1] = offset >>  8;		/* upper address octet */
-		addr[2] = blk_off;		/* lower address octet */
-		alen	= 3;
-#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
-
-		addr[0] |= dev_addr;		/* insert device address */
+		alen = eeprom_addr(dev_addr, offset, addr);
 
 		len = end - offset;
 

index 78c6121..3fc3706 100644
@@ -44,9 +44,10 @@
 #endif
 #endif
 
-#if defined(CONFIG_SYS_EEPROM_WREN)
-extern int eeprom_write_enable (unsigned dev_addr, int state);
-#endif
+__weak int eeprom_write_enable(unsigned dev_addr, int state)
+{
+	return 0;
+}
 
 void eeprom_init(void)
 {

@@ -163,9 +164,8 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 	int rcode = 0;
 	uchar addr[3];
 
-#if defined(CONFIG_SYS_EEPROM_WREN)
-	eeprom_write_enable (dev_addr,1);
-#endif
+	eeprom_write_enable(dev_addr, 1);
+
 	/*
 	 * Write data until done or would cross a write page boundary.
 	 * We must write the address again when changing pages

@@ -215,9 +215,9 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
 #endif
 	}
-#if defined(CONFIG_SYS_EEPROM_WREN)
-	eeprom_write_enable (dev_addr,0);
-#endif
+
+	eeprom_write_enable(dev_addr, 0);
+
 	return rcode;
 }
 

index 3fc3706..918def4 100644
@@ -29,6 +29,10 @@
 #define	CONFIG_SYS_I2C_SPEED	50000
 #endif
 
+#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	0
+#endif
+
 /*
  * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.

@@ -211,9 +215,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		buffer += len;
 		offset += len;
 
-#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
 		udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
-#endif
 	}
 
 	eeprom_write_enable(dev_addr, 0);

index 918def4..97747de 100644
@@ -55,6 +55,8 @@ __weak int eeprom_write_enable(unsigned dev_addr, int state)
 
 void eeprom_init(void)
 {
+# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
+
 	/* SPI EEPROM */
 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
 	spi_init_f ();

@@ -69,6 +71,8 @@ void eeprom_init(void)
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 #endif
 #endif
+
+# endif /* !CONFIG_SPI */
 }
 
 static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)

@@ -248,9 +252,7 @@ static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	off = simple_strtoul(*args++, NULL, 16);
 	cnt = simple_strtoul(*args++, NULL, 16);
 
-# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-	eeprom_init ();
-# endif /* !CONFIG_SPI */
+	eeprom_init();
 
 	if (strcmp (argv[1], "read") == 0) {
 		printf(fmt, dev_addr, argv[1], addr, off, cnt);

index 97747de..6f55306 100644
@@ -33,6 +33,13 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	0
 #endif
 
+#ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	8
+#endif
+
+#define	EEPROM_PAGE_SIZE	(1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
+#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))
+
 /*
  * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
  *   0x000nxxxx for EEPROM address selectors@n, offset xxxx in EEPROM.

@@ -198,15 +205,8 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 		 */
 #if !defined(CONFIG_SYS_I2C_FRAM)
 
-#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
-
-#define	EEPROM_PAGE_SIZE	(1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
-#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))
-
 		maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
-#else
-		maxlen = 0x100 - blk_off;
-#endif
+
 		if (maxlen > I2C_RXTX_LEN)
 			maxlen = I2C_RXTX_LEN;
 

index 6f55306..231f424 100644
@@ -104,6 +104,29 @@ static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)
 	return alen;
 }
 
+static int eeprom_len(unsigned offset, unsigned end)
+{
+	unsigned len = end - offset;
+
+	/*
+	 * For a FRAM device there is no limit on the number of the
+	 * bytes that can be ccessed with the single read or write
+	 * operation.
+	 */
+#if !defined(CONFIG_SYS_I2C_FRAM)
+	unsigned blk_off = offset & 0xff;
+	unsigned maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
+
+	if (maxlen > I2C_RXTX_LEN)
+		maxlen = I2C_RXTX_LEN;
+
+	if (len > maxlen)
+		len = maxlen;
+#endif
+
+	return len;
+}
+
 static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
 			   uchar *buffer, unsigned len, bool read)
 {

@@ -130,7 +153,6 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
 	unsigned end = offset + cnt;
-	unsigned blk_off;
 	int rcode = 0;
 	uchar addr[3];
 

@@ -141,27 +163,10 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 	 */
 	while (offset < end) {
 		unsigned alen, len;
-#if !defined(CONFIG_SYS_I2C_FRAM)
-		unsigned maxlen;
-#endif
 
-		blk_off = offset & 0xFF;	/* block offset */
 		alen = eeprom_addr(dev_addr, offset, addr);
 
-		len = end - offset;
-
-		/*
-		 * For a FRAM device there is no limit on the number of the
-		 * bytes that can be ccessed with the single read or write
-		 * operation.
-		 */
-#if !defined(CONFIG_SYS_I2C_FRAM)
-		maxlen = 0x100 - blk_off;
-		if (maxlen > I2C_RXTX_LEN)
-			maxlen = I2C_RXTX_LEN;
-		if (len > maxlen)
-			len = maxlen;
-#endif
+		len = eeprom_len(offset, end);
 
 		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 1);
 

@@ -175,7 +180,6 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
 int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
 	unsigned end = offset + cnt;
-	unsigned blk_off;
 	int rcode = 0;
 	uchar addr[3];
 

@@ -189,30 +193,10 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 
 	while (offset < end) {
 		unsigned alen, len;
-#if !defined(CONFIG_SYS_I2C_FRAM)
-		unsigned maxlen;
-#endif
 
-		blk_off = offset & 0xFF;	/* block offset */
 		alen = eeprom_addr(dev_addr, offset, addr);
 
-		len = end - offset;
-
-		/*
-		 * For a FRAM device there is no limit on the number of the
-		 * bytes that can be accessed with the single read or write
-		 * operation.
-		 */
-#if !defined(CONFIG_SYS_I2C_FRAM)
-
-		maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
-
-		if (maxlen > I2C_RXTX_LEN)
-			maxlen = I2C_RXTX_LEN;
-
-		if (len > maxlen)
-			len = maxlen;
-#endif
+		len = eeprom_len(offset, end);
 
 		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 0);
 

index 231f424..6a02496 100644
@@ -150,38 +150,44 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
 	return ret;
 }
 
-int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
+static int eeprom_rw(unsigned dev_addr, unsigned offset, uchar *buffer,
+		     unsigned cnt, bool read)
 {
 	unsigned end = offset + cnt;
+	unsigned alen, len;
 	int rcode = 0;
 	uchar addr[3];
 
-	/*
-	 * Read data until done or would cross a page boundary.
-	 * We must write the address again when changing pages
-	 * because the next page may be in a different device.
-	 */
 	while (offset < end) {
-		unsigned alen, len;
-
 		alen = eeprom_addr(dev_addr, offset, addr);
 
 		len = eeprom_len(offset, end);
 
-		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 1);
+		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, read);
 
 		buffer += len;
 		offset += len;
+
+		if (!read)
+			udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
 	}
 
 	return rcode;
 }
 
-int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
+int eeprom_read(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
 {
-	unsigned end = offset + cnt;
-	int rcode = 0;
-	uchar addr[3];
+	/*
+	 * Read data until done or would cross a page boundary.
+	 * We must write the address again when changing pages
+	 * because the next page may be in a different device.
+	 */
+	return eeprom_rw(dev_addr, offset, buffer, cnt, 1);
+}
+
+int eeprom_write(unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
+{
+	int ret;
 
 	eeprom_write_enable(dev_addr, 1);
 

@@ -190,25 +196,10 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 	 * We must write the address again when changing pages
 	 * because the address counter only increments within a page.
 	 */
-
-	while (offset < end) {
-		unsigned alen, len;
-
-		alen = eeprom_addr(dev_addr, offset, addr);
-
-		len = eeprom_len(offset, end);
-
-		rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 0);
-
-		buffer += len;
-		offset += len;
-
-		udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
-	}
+	ret = eeprom_rw(dev_addr, offset, buffer, cnt, 1);
 
 	eeprom_write_enable(dev_addr, 0);
-
-	return rcode;
+	return ret;
 }
 
 static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

index 6a02496..5bc836f 100644
@@ -62,24 +62,18 @@ __weak int eeprom_write_enable(unsigned dev_addr, int state)
 
 void eeprom_init(void)
 {
-# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-
 	/* SPI EEPROM */
 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
-	spi_init_f ();
-#endif
-
+	spi_init_f();
+#else
 	/* I2C EEPROM */
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) || \
-	defined(CONFIG_SYS_I2C)
 #ifdef CONFIG_SYS_I2C
 	i2c_init_all();
 #else
 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 #endif
-#endif
 
-# endif /* !CONFIG_SPI */
+#endif
 }
 
 static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr)