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arm: hwcap: add new hwcap for identifying PXN bits

PATCH Superseded Jungseung Lee 3 participants 5 messages Oct 24, 2014 Arm (32-bit)

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Jungseung Lee

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#0 lore raw

PATCH 1/2 arm: hwcap: add new hwcap for identifying PXN bits

Modern ARMv7-A/R cores can optionally implement below new hardware feature:

- PXN:
Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack.

This patch adds new HWCAP defines to describe new feature. On an implementation that does not include the LPAE, PXN is optionally supported.

Signed-off-by Jungseung Lee <[email protected]>
---
 arch/arm/include/uapi/asm/hwcap.h | 1 +
 arch/arm/kernel/setup.c           | 5 +++++
 2 files changed, 6 insertions(+)
arch/arm/include/uapi/asm/hwcap.h +1 -0
index 20d12f2..a06faba 100644
@@ -27,6 +27,7 @@
 #define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)
 #define HWCAP_LPAE	(1 << 20)
 #define HWCAP_EVTSTRM	(1 << 21)
+#define HWCAP_PXN   (1 << 22)       /* Privileged execute-never */
 
 /*
  * HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2
arch/arm/kernel/setup.c +5 -0
index c031063..48828fe 100644
@@ -390,6 +390,10 @@ static void __init cpuid_init_hwcaps(void)
 
 	/* LPAE implies atomic ldrd/strd instructions */
 	vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0;
+
+	if (vmsa >= 4)
+		elf_hwcap |= HWCAP_PXN;
+
 	if (vmsa >= 5)
 		elf_hwcap |= HWCAP_LPAE;
 }

@@ -1015,6 +1019,7 @@ static const char *hwcap_str[] = {
 	"vfpd32",
 	"lpae",
 	"evtstrm",
+	"pxn",
 	NULL
 };
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 2/2 arm: Support for the PXN CPU feature on ARMv7.

- PXN:
Privileged execute-never(PXN) is a security feature. PXN bits determines whether the processor can execute software from the region. This is effective solution against ret2usr attack.

This patch set PXN bit on user page table for preventing user code execution with privilege mode.

Signed-off-by Jungseung Lee <[email protected]>
---
 arch/arm/include/asm/pgalloc.h              | 8 +++++++-
 arch/arm/include/asm/pgtable-2level-hwdef.h | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)
arch/arm/include/asm/pgalloc.h +7 -1
index 78a7793..f4f4fd3 100644
@@ -157,7 +157,13 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
 static inline void
 pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
 {
-	__pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE);
+#ifdef CONFIG_CPU_V7
+	if (elf_hwcap & HWCAP_PXN)
+		__pmd_populate(pmdp, page_to_phys(ptep),
+				_PAGE_USER_TABLE | PMD_PXNTABLE);
+	else
+#endif
+		__pmd_populate(pmdp, page_to_phys(ptep), _PAGE_USER_TABLE);
 }
 #define pmd_pgtable(pmd) pmd_page(pmd)
arch/arm/include/asm/pgtable-2level-hwdef.h +2 -0
index 5cfba15..89a620f 100644
@@ -20,12 +20,14 @@
 #define PMD_TYPE_FAULT		(_AT(pmdval_t, 0) << 0)
 #define PMD_TYPE_TABLE		(_AT(pmdval_t, 1) << 0)
 #define PMD_TYPE_SECT		(_AT(pmdval_t, 2) << 0)
+#define PMD_PXNTABLE		(_AT(pmdval_t, 1) << 2)     /* v7 (optional) */
 #define PMD_BIT4		(_AT(pmdval_t, 1) << 4)
 #define PMD_DOMAIN(x)		(_AT(pmdval_t, (x)) << 5)
 #define PMD_PROTECTION		(_AT(pmdval_t, 1) << 9)		/* v5 */
 /*
  *   - section
  */
+#define PMD_SECT_PXN    (_AT(pmdval_t, 1) << 0)     /* v7 (optional) */
 #define PMD_SECT_BUFFERABLE	(_AT(pmdval_t, 1) << 2)
 #define PMD_SECT_CACHEABLE	(_AT(pmdval_t, 1) << 3)
 #define PMD_SECT_XN		(_AT(pmdval_t, 1) << 4)		/* v6 */
Signature · 1 line
1.9.1
#2 lore raw

PATCH 1/2 arm: hwcap: add new hwcap for identifying PXN bits

In reply to Jungseung Lee
Quoted 11 lines · Jungseung Lee

Modern ARMv7-A/R cores can optionally implement below new hardware feature:

- PXN:
Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack.

This patch adds new HWCAP defines to describe new feature. On an implementation that does not include the LPAE, PXN is optionally supported.

Why does userspace need to know about this?

Signature · 2 lines
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according to speedtest.net.
#3 lore raw

PATCH 1/2 arm: hwcap: add new hwcap for identifying PXN bits

In reply to Jungseung Lee
Quoted 11 lines · Jungseung Lee

Modern ARMv7-A/R cores can optionally implement below new hardware feature:

- PXN:
Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack.

This patch adds new HWCAP defines to describe new feature. On an implementation that does not include the LPAE, PXN is optionally supported.

Why does the user need to know about such feature? Just enable it in the kernel if available.

Signature · 1 line
Catalin
author
#4 lore raw

PATCH 1/2 arm: hwcap: add new hwcap for identifying PXN bits

Hi, Russell and Catalin

2014-10-24 19:11 GMT+09:00 Catalin Marinas <[email protected]>:

Quoted 13 lines · Jungseung Lee
Quoted 11 lines

Modern ARMv7-A/R cores can optionally implement below new hardware feature:

- PXN:
Privileged execute-never(PXN) is a security feature. PXN bit determines whether the processor can execute software from the region. This is effective solution against ret2usr attack.

This patch adds new HWCAP defines to describe new feature. On an implementation that does not include the LPAE, PXN is optionally supported.

Quoted 5 lines

Why does the user need to know about such feature? Just enable it in the kernel if available.

--
Catalin

Yes, there is no reason to need to know.
I'll find another route to get vmsa and send patch later.

Signature · 2 lines
Regards,
Jungseung Lee