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ARM: socfpga: Add driver for the L3 interconnect

PATCH Superseded Steffen Trumtrar 3 participants 5 messages Oct 29, 2014 Device tree bindings

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/2 ARM: socfpga: Add driver for the L3 interconnect

The L3 interconnect provides Global Programmer View (GPV) registers for every AXI master and slave on the SoC.
Although this is just a bunch of bits, syscon is not the right approach for this IP core.
The L3 interconnect is configured with a lot of reserved "holes" in its memory space. Just mapping this with regmap, what syscon would do, would lead to the system completely hanging, if one of those areas would be touched. One example for when this might happen is the regmap registers dump in the debugfs.

This driver specifies also the valid readable and writable ranges of the L3 interconnect. Other drivers that want to access their GPV registers can do so with this driver via socfpga_l3nic_regmap_by_phandle.

---
 .../bindings/soc/socfpga/altr,l3-nic.txt           |  15 ++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   1 +
 drivers/soc/socfpga/Kconfig                        |  11 +
 drivers/soc/socfpga/Makefile                       |   1 +
 drivers/soc/socfpga/l3nic.c                        | 221 +++++++++++++++++++++
 include/soc/socfpga/gpv.h                          |  63 ++++++
 include/soc/socfpga/l3regs.h                       | 194 ++++++++++++++++++
 8 files changed, 507 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt
 create mode 100644 drivers/soc/socfpga/Kconfig
 create mode 100644 drivers/soc/socfpga/Makefile
 create mode 100644 drivers/soc/socfpga/l3nic.c
 create mode 100644 include/soc/socfpga/gpv.h
 create mode 100644 include/soc/socfpga/l3regs.h
Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt new file +15 -0
new file mode 100644
index 000000000000..d9491f14eed3
@@ -0,0 +1,15 @@
+Altera SOCFPGA L3 Network Interconnect
+--------------------------------------
+
+The L3 NIC provides access to Global Programmer View (GPV) registers for all
+AXI slaves and masters on the SoC.
+
+Required properties:
+- compatible : "altr,l3-nic"
+- reg : Should contain 1 register range (address and length)
+
+Example:
+	 gpv at ff800000 {
+		compatible = "altr,l3-nic";
+		reg = <0xff800000 0x100000>;
+	};
drivers/soc/Kconfig +1 -0
index 76d6bd4da138..11db07da894f 100644
@@ -1,6 +1,7 @@
 menu "SOC (System On Chip) specific Drivers"
 
 source "drivers/soc/qcom/Kconfig"
+source "drivers/soc/socfpga/Kconfig"
 source "drivers/soc/ti/Kconfig"
 source "drivers/soc/versatile/Kconfig"
 
drivers/soc/Makefile +1 -0
index 063113d0bd38..0f89173e328a 100644
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
+obj-$(CONFIG_ARCH_SOCFPGA)	+= socfpga/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_SOC_TI)		+= ti/
 obj-$(CONFIG_PLAT_VERSATILE)	+= versatile/
drivers/soc/socfpga/Kconfig new file +11 -0
new file mode 100644
index 000000000000..0478c959ab2c
@@ -0,0 +1,11 @@
+#
+# SoCFPGA Soc drivers
+#
+
+config SOCFPGA_L3NIC
+	tristate "SoCFPGA L3 NIC-301 driver"
+	depends on ARCH_SOCFPGA
+	select REGMAP_MMIO
+	default y
+	help
+	  Enable configuration support for the SoCFPGA L3 AMBA Network Interconnect.
drivers/soc/socfpga/Makefile new file +1 -0
new file mode 100644
index 000000000000..e6616d079226
@@ -0,0 +1 @@
+obj-$(CONFIG_SOCFPGA_L3NIC) += l3nic.o
drivers/soc/socfpga/l3nic.c new file +221 -0

221 lines not on this page · raw message

include/soc/socfpga/gpv.h new file +63 -0

63 lines not on this page · raw message

include/soc/socfpga/l3regs.h new file +194 -0

194 lines not on this page · raw message

Signature · 1 line
2.1.1
#1 lore raw

PATCH 2/2 ARM: dts: socfpga: Add l3nic node

---
 arch/arm/boot/dts/socfpga.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/socfpga.dtsi +5 -0
index 58c4a2eabd2d..4cdcd5f9772d 100644
@@ -654,6 +654,11 @@
 			arm,data-latency = <2 1 1>;
 		};
 
+		l3regs: gpv at ff800000 {
+			compatible = "altr,l3-nic";
+			reg = <0xff800000 0x100000>;
+		};
+
 		mmc: dwmmc0 at ff704000 {
 			compatible = "altr,socfpga-dw-mshc";
 			reg = <0xff704000 0x1000>;
Signature · 1 line
2.1.1
#2 lore raw

PATCH 1/2 ARM: socfpga: Add driver for the L3 interconnect

In reply to Steffen Trumtrar
Quoted 15 lines · Steffen Trumtrar

The L3 interconnect provides Global Programmer View (GPV) registers for every AXI master and slave on the SoC.
Although this is just a bunch of bits, syscon is not the right approach for this IP core.
The L3 interconnect is configured with a lot of reserved "holes" in its memory space. Just mapping this with regmap, what syscon would do, would lead to the system completely hanging, if one of those areas would be touched. One example for when this might happen is the regmap registers dump in the debugfs.

This driver specifies also the valid readable and writable ranges of the L3 interconnect. Other drivers that want to access their GPV registers can do so with this driver via socfpga_l3nic_regmap_by_phandle.

Quoted 17 lines
---
 .../bindings/soc/socfpga/altr,l3-nic.txt           |  15 ++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   1 +
 drivers/soc/socfpga/Kconfig                        |  11 +
 drivers/soc/socfpga/Makefile                       |   1 +
 drivers/soc/socfpga/l3nic.c                        | 221 +++++++++++++++++++++
 include/soc/socfpga/gpv.h                          |  63 ++++++
 include/soc/socfpga/l3regs.h                       | 194 ++++++++++++++++++
 8 files changed, 507 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt
 create mode 100644 drivers/soc/socfpga/Kconfig
 create mode 100644 drivers/soc/socfpga/Makefile
 create mode 100644 drivers/soc/socfpga/l3nic.c
 create mode 100644 include/soc/socfpga/gpv.h
 create mode 100644 include/soc/socfpga/l3regs.h

Hi Steffen,

This looks really nice and useful.

I tried it out with my bridge driver and at least with my superficial testing it looked good.

drivers/soc/socfpga/l3nic.c line 151

Quoted 5 lines
drivers/soc/socfpga/l3nic.c new file +5 -0
+
+int socfpga_l3nic_regmap_by_phandle(struct device_node *np,
+				    struct regmap **regmap,
+				    const char *name)
+{

This could return the regmap or ERR_PTR(-ENODEV) and just have the np and name parameter, similar to syscon_regmap_lookup_by_phandle.

Thanks!

Alan

#3 lore raw

PATCH 1/2 ARM: socfpga: Add driver for the L3 interconnect

Hi!

Quoted 35 lines · atull
Quoted 15 lines · Steffen Trumtrar

The L3 interconnect provides Global Programmer View (GPV) registers for every AXI master and slave on the SoC.
Although this is just a bunch of bits, syscon is not the right approach for this IP core.
The L3 interconnect is configured with a lot of reserved "holes" in its memory space. Just mapping this with regmap, what syscon would do, would lead to the system completely hanging, if one of those areas would be touched. One example for when this might happen is the regmap registers dump in the debugfs.

This driver specifies also the valid readable and writable ranges of the L3 interconnect. Other drivers that want to access their GPV registers can do so with this driver via socfpga_l3nic_regmap_by_phandle.

Quoted 17 lines
---
 .../bindings/soc/socfpga/altr,l3-nic.txt           |  15 ++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   1 +
 drivers/soc/socfpga/Kconfig                        |  11 +
 drivers/soc/socfpga/Makefile                       |   1 +
 drivers/soc/socfpga/l3nic.c                        | 221 +++++++++++++++++++++
 include/soc/socfpga/gpv.h                          |  63 ++++++
 include/soc/socfpga/l3regs.h                       | 194 ++++++++++++++++++
 8 files changed, 507 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/socfpga/altr,l3-nic.txt
 create mode 100644 drivers/soc/socfpga/Kconfig
 create mode 100644 drivers/soc/socfpga/Makefile
 create mode 100644 drivers/soc/socfpga/l3nic.c
 create mode 100644 include/soc/socfpga/gpv.h
 create mode 100644 include/soc/socfpga/l3regs.h
Quoted 7 lines

Hi Steffen,

This looks really nice and useful.

I tried it out with my bridge driver and at least with my superficial testing it looked good.

\o/

Thanks for testing.

Quoted 10 lines

drivers/soc/socfpga/l3nic.c line 151

Quoted 5 lines
drivers/soc/socfpga/l3nic.c new file +5 -0
+
+int socfpga_l3nic_regmap_by_phandle(struct device_node *np,
+				    struct regmap **regmap,
+				    const char *name)
+{

This could return the regmap or ERR_PTR(-ENODEV) and just have the np and name parameter, similar to syscon_regmap_lookup_by_phandle.

I wanted to do that, but I also want to propagate the return value of socfpga_gpv_device_by_phandle and this doesn't seem to work than. Open for suggestions, though.

Regards,
Steffen

Signature · 4 lines
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#4 lore raw

PATCH 1/2 ARM: socfpga: Add driver for the L3 interconnect

Hello Steffen,

Quoted 11 lines · Steffen Trumtrar
Quoted 10 lines

drivers/soc/socfpga/l3nic.c line 151

Quoted 5 lines
drivers/soc/socfpga/l3nic.c new file +5 -0
+
+int socfpga_l3nic_regmap_by_phandle(struct device_node *np,
+				    struct regmap **regmap,
+				    const char *name)
+{

This could return the regmap or ERR_PTR(-ENODEV) and just have the np and name parameter, similar to syscon_regmap_lookup_by_phandle.

Quoted 3 lines

I wanted to do that, but I also want to propagate the return value of socfpga_gpv_device_by_phandle and this doesn't seem to work than. Open for suggestions, though.

Doesn't the following work:

	struct regmap *socfpga_l3nic_regmap_by_phandle(struct device_node *np,
						       const char *name)
	{
		struct socfpga_l3nic *l3nic;
		struct platform_device *pdev;

		pdev = socfpga_gpv_device_by_phandle(np, name);
		if (!pdev)
			/* it's wrong to apply ERR_PTR to NULL */
			return ERR_PTR(-ENODEV);

		l3nic = dev_get_drvdata(&pdev->dev);
		if (!l3nic)
			return ERR_PTR(-EINVAL);

		/* do you need to check l3nic->regmap for being != NULL? */
		return l3nic->regmap;
	}

?

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |