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tegra: beaver: set hostname in board init

PATCH Applied Lucas Stach 2 participants 13 messages Nov 3, 2014 – Nov 4, 2014

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#0 lore raw

PATCH 1/12 tegra: beaver: set hostname in board init

---
 arch/arm/boards/nvidia-beaver/board.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)
arch/arm/boards/nvidia-beaver/board.c +13 -2
index 20707d8..d270301 100644
@@ -20,7 +20,7 @@
 #include <i2c/i2c.h>
 #include <init.h>
 
-static int nvidia_beaver_devices_init(void)
+static int nvidia_beaver_fs_init(void)
 {
 	struct i2c_client client;
 	u8 data;
@@ -44,4 +44,15 @@ static int nvidia_beaver_devices_init(void)
 
 	return 0;
 }
-fs_initcall(nvidia_beaver_devices_init);
+fs_initcall(nvidia_beaver_fs_init);
+
+static int nvidia_beaver_device_init(void)
+{
+	if (!of_machine_is_compatible("nvidia,beaver"))
+		return 0;
+
+	barebox_set_hostname("beaver");
+
+	return 0;
+}
+device_initcall(nvidia_beaver_device_init);
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#1 lore raw

PATCH 2/12 tegra: jetson-tk1: set hostname in board init

---
 arch/arm/boards/nvidia-jetson-tk1/board.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)
arch/arm/boards/nvidia-jetson-tk1/board.c +13 -2
index c20f56a..564e6a0 100644
@@ -26,7 +26,7 @@
 #define AS3722_GPIO_SIGNAL_OUT	0x20
 #define AS3722_SD_CONTROL	0x4d
 
-static int nvidia_jetson_tk1_devices_init(void)
+static int nvidia_jetson_tk1_fs_init(void)
 {
 	struct i2c_client client;
 	u8 data;
@@ -47,4 +47,15 @@ static int nvidia_jetson_tk1_devices_init(void)
 
 	return 0;
 }
-fs_initcall(nvidia_jetson_tk1_devices_init);
+fs_initcall(nvidia_jetson_tk1_fs_init);
+
+static int nvidia_jetson_tk1_device_init(void)
+{
+	if (!of_machine_is_compatible("nvidia,jetson-tk1"))
+		return 0;
+
+	barebox_set_hostname("jetson-tk1");
+
+	return 0;
+}
+device_initcall(nvidia_jetson_tk1_device_init);
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#2 lore raw

PATCH 3/12 tegra: colibri-t20: set hostname in board init

In reply to Lucas Stach
---
 arch/arm/boards/toradex-colibri-t20/Makefile |  1 +
 arch/arm/boards/toradex-colibri-t20/board.c  | 29 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boards/toradex-colibri-t20/board.c
arch/arm/boards/toradex-colibri-t20/Makefile +1 -0
index 1f76732..d0347f2 100644
@@ -3,6 +3,7 @@ CFLAGS_pbl-entry.o := \
 	-fno-tree-switch-conversion -fno-jump-tables
 soc := tegra20
 lwl-y += entry.o
+obj-y += board.o
 extra-y += colibri-t20_256_hsmmc.bct colibri-t20_256_v11_nand.bct \
            colibri-t20_256_v12_nand.bct colibri-t20_512_hsmmc.bct \
            colibri-t20_512_v11_nand.bct colibri-t20_512_v12_nand.bct
\ No newline at end of file
arch/arm/boards/toradex-colibri-t20/board.c new file +29 -0
new file mode 100644
index 0000000..7061981
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2014 Lucas Stach <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int toradex_colibri_t20_device_init(void)
+{
+	if (!of_machine_is_compatible("toradex,colibri_t20-512"))
+		return 0;
+
+	barebox_set_hostname("colibri-t20");
+
+	return 0;
+}
+device_initcall(toradex_colibri_t20_device_init);
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#3 lore raw

PATCH 4/12 tegra: beaver: switch to upstream Tegra30 dtsi

In reply to Lucas Stach

It's the same as our version, so no need to carry it around any longer.

---
 arch/arm/dts/tegra30-beaver.dts |   2 +-
 arch/arm/dts/tegra30.dtsi       | 892 ----------------------------------------
 2 files changed, 1 insertion(+), 893 deletions(-)
 delete mode 100644 arch/arm/dts/tegra30.dtsi
arch/arm/dts/tegra30-beaver.dts +1 -1
index 94955f9..d2809bb 100644
@@ -1,6 +1,6 @@
 /dts-v1/;
 
-#include "tegra30.dtsi"
+#include <arm/tegra30.dtsi>
 
 / {
 	model = "NVIDIA Tegra30 Beaver evaluation board";
arch/arm/dts/tegra30.dtsi deleted +0 -892

892 lines not on this page · raw message

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#4 lore raw

PATCH 5/12 tegra: beaver: add stdout-path

In reply to Lucas Stach
---
 arch/arm/dts/tegra30-beaver.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/dts/tegra30-beaver.dts +2 -0
index d2809bb..5879353 100644
@@ -12,6 +12,8 @@
 	};
 
 	chosen {
+		stdout-path = &uarta;
+
 		environment@0 {
 			compatible = "barebox,environment";
 			device-path = &emmc, "partname:boot1";
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#5 lore raw

PATCH 6/12 tegra: colibri-t20: add stdout-path

In reply to Lucas Stach
---
 arch/arm/dts/tegra20-colibri-iris.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/dts/tegra20-colibri-iris.dts +4 -0
index adfa917..9c61581 100644
@@ -6,6 +6,10 @@
 	model = "Toradex Colibri T20 on Iris";
 	compatible = "toradex,iris", "toradex,colibri_t20", "nvidia,tegra20";
 
+	chosen {
+		stdout-path = &uarta;
+	};
+
 	host1x@50000000 {
 		hdmi@54280000 {
 			status = "okay";
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#6 lore raw

PATCH 7/12 tegra: tegra124: add serial alias nodes

In reply to Lucas Stach

They are missing in the upstream DT. Add them
locally for now.

---
 arch/arm/dts/tegra124.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
arch/arm/dts/tegra124.dtsi +8 -1
index 7d0fafa..c795811 100644
@@ -1 +1,8 @@
-#include <arm/tegra124.dtsi>
+/ {
+	aliases {
+		serial0 = "/serial@0,70006000/";
+		serial1 = "/serial@0,70006040/";
+		serial2 = "/serial@0,70006200/";
+		serial3 = "/serial@0,70006300/";
+	};
+};
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#7 lore raw

PATCH 8/12 tegra: jetson-tk1: add stdout-path

In reply to Lucas Stach
---
 arch/arm/dts/tegra124-jetson-tk1.dts | 3 +++
 1 file changed, 3 insertions(+)
arch/arm/dts/tegra124-jetson-tk1.dts +3 -0
index d2933bd..26f405c 100644
@@ -1,7 +1,10 @@
 #include <arm/tegra124-jetson-tk1.dts>
+#include "tegra124.dtsi"
 
 / {
 	chosen {
+		stdout-path = "/serial@0,70006300/";
+
 		environment@0 {
 			compatible = "barebox,environment";
 			device-path = &emmc, "partname:boot1";
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#8 lore raw

PATCH 9/12 serial: ns16550: enable clock if available

In reply to Lucas Stach
---
 drivers/serial/serial_ns16550.c | 1 +
 1 file changed, 1 insertion(+)
drivers/serial/serial_ns16550.c +1 -0
index 53d48a0..07dedf7 100644
@@ -418,6 +418,7 @@ static int ns16550_probe(struct device_d *dev)
 			ret = PTR_ERR(priv->clk);
 			goto err;
 		}
+		clk_enable(priv->clk);
 		priv->plat.clock = clk_get_rate(priv->clk);
 	}
 
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#9 lore raw

PATCH 10/12 serial: ns16550: add Tegra support

In reply to Lucas Stach
---
 drivers/serial/serial_ns16550.c | 11 +++++++++++
 1 file changed, 11 insertions(+)
drivers/serial/serial_ns16550.c +11 -0
index 07dedf7..8f2e93f 100644
@@ -311,6 +311,11 @@ static __maybe_unused struct ns16550_drvdata jz_drvdata = {
 	.init_port = ns16550_jz_init_port,
 };
 
+static __maybe_unused struct ns16550_drvdata tegra_drvdata = {
+	.init_port = ns16550_serial_init_port,
+	.linux_console_name = "ttyS",
+};
+
 static int ns16550_init_iomem(struct device_d *dev, struct ns16550_priv *priv)
 {
 	struct resource *res;
@@ -477,6 +482,12 @@ static struct of_device_id ns16550_serial_dt_ids[] = {
 		.data = (unsigned long)&omap_drvdata,
 	},
 #endif
+#if IS_ENABLED(CONFIG_ARCH_TEGRA)
+	{
+		.compatible = "nvidia,tegra20-uart",
+		.data = (unsigned long)&tegra_drvdata,
+	},
+#endif
 #if IS_ENABLED(CONFIG_MACH_MIPS_XBURST)
 	{
 		.compatible = "ingenic,jz4740-uart",
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#10 lore raw

PATCH 11/12 tegra: remove custom UART setup

In reply to Lucas Stach

The config option doesn't make any sense anymore when building a multiimage barebox. With a proper DT built into the image we don't need the ODMdata mechanism to find the debug UART anymore.

---
 arch/arm/mach-tegra/Kconfig                 | 33 ---------------------
 arch/arm/mach-tegra/include/mach/lowlevel.h | 45 -----------------------------
 arch/arm/mach-tegra/tegra20.c               | 41 --------------------------
 3 files changed, 119 deletions(-)
arch/arm/mach-tegra/Kconfig +0 -33
index 1bdea8e..160732f 100644
@@ -7,39 +7,6 @@ config ARCH_TEXT_BASE
 config BOARDINFO
 	default ""
 
-choice
-	prompt "Tegra debug UART"
-	help
-	  This is the first serial console that gets activated by barebox.
-	  Normally each board vendor should program a valid debug UART into
-	  the ODMdata section of the boot configuration table, so it's a
-	  reasonably good bet to use that.
-	  If you know your ODMdata is broken, or you don't wish to activate
-	  any serial console at all you can override the default here.
-
-config TEGRA_UART_ODMDATA
-	bool "ODMdata defined UART"
-
-config TEGRA_UART_A
-	bool "UART A"
-
-config TEGRA_UART_B
-	bool "UART B"
-
-config TEGRA_UART_C
-	bool "UART C"
-
-config TEGRA_UART_D
-	bool "UART D"
-
-config TEGRA_UART_E
-	bool "UART E"
-
-config TEGRA_UART_NONE
-	bool "None"
-
-endchoice
-
 # ---------------------------------------------------------
 
 config ARCH_TEGRA_2x_SOC
arch/arm/mach-tegra/include/mach/lowlevel.h +0 -45

57 lines not on this page · raw message

arch/arm/mach-tegra/tegra20.c +0 -41

47 lines not on this page · raw message

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#11 lore raw

PATCH 12/12 clk: tegra: don't enable UART clocks by default

In reply to Lucas Stach

Now that we are registering a proper driver for the UARTs we no longer need to enable the clocks unconditionally.

---
 drivers/clk/tegra/clk-tegra124.c |  8 ++++----
 drivers/clk/tegra/clk-tegra20.c  | 10 +++++-----
 drivers/clk/tegra/clk-tegra30.c  | 10 +++++-----
 3 files changed, 14 insertions(+), 14 deletions(-)
drivers/clk/tegra/clk-tegra124.c +4 -4
index d597a23..7a2f7c0 100644
@@ -322,10 +322,10 @@ static struct tegra_clk_init_table init_table[] = {
 	{TEGRA124_CLK_PLL_P_OUT3,	TEGRA124_CLK_CLK_MAX,	102000000,	1},
 	{TEGRA124_CLK_PLL_P_OUT4,	TEGRA124_CLK_CLK_MAX,	204000000,	1},
 	{TEGRA124_CLK_MSELECT,		TEGRA124_CLK_PLL_P,	102000000,	1},
-	{TEGRA124_CLK_UARTA,		TEGRA124_CLK_PLL_P,	0,		1},
-	{TEGRA124_CLK_UARTB,		TEGRA124_CLK_PLL_P,	0,		1},
-	{TEGRA124_CLK_UARTC,		TEGRA124_CLK_PLL_P,	0,		1},
-	{TEGRA124_CLK_UARTD,		TEGRA124_CLK_PLL_P,	0,		1},
+	{TEGRA124_CLK_UARTA,		TEGRA124_CLK_PLL_P,	0,		0},
+	{TEGRA124_CLK_UARTB,		TEGRA124_CLK_PLL_P,	0,		0},
+	{TEGRA124_CLK_UARTC,		TEGRA124_CLK_PLL_P,	0,		0},
+	{TEGRA124_CLK_UARTD,		TEGRA124_CLK_PLL_P,	0,		0},
 	{TEGRA124_CLK_SDMMC1,		TEGRA124_CLK_PLL_P,	48000000,	0},
 	{TEGRA124_CLK_SDMMC2,		TEGRA124_CLK_PLL_P,	48000000,	0},
 	{TEGRA124_CLK_SDMMC3,		TEGRA124_CLK_PLL_P,	48000000,	0},
drivers/clk/tegra/clk-tegra20.c +5 -5
index 5b4365d..2ff42d8 100644
@@ -324,11 +324,11 @@ static struct tegra_clk_init_table init_table[] = {
 	{TEGRA20_CLK_PLL_P_OUT4,	TEGRA20_CLK_CLK_MAX,	24000000,	1},
 	{TEGRA20_CLK_PLL_C,		TEGRA20_CLK_CLK_MAX,	600000000,	1},
 	{TEGRA20_CLK_PLL_C_OUT1,	TEGRA20_CLK_CLK_MAX,	120000000,	1},
-	{TEGRA20_CLK_UARTA,		TEGRA20_CLK_PLL_P,	0,		1},
-	{TEGRA20_CLK_UARTB,		TEGRA20_CLK_PLL_P,	0,		1},
-	{TEGRA20_CLK_UARTC,		TEGRA20_CLK_PLL_P,	0,		1},
-	{TEGRA20_CLK_UARTD,		TEGRA20_CLK_PLL_P,	0,		1},
-	{TEGRA20_CLK_UARTE,		TEGRA20_CLK_PLL_P,	0,		1},
+	{TEGRA20_CLK_UARTA,		TEGRA20_CLK_PLL_P,	0,		0},
+	{TEGRA20_CLK_UARTB,		TEGRA20_CLK_PLL_P,	0,		0},
+	{TEGRA20_CLK_UARTC,		TEGRA20_CLK_PLL_P,	0,		0},
+	{TEGRA20_CLK_UARTD,		TEGRA20_CLK_PLL_P,	0,		0},
+	{TEGRA20_CLK_UARTE,		TEGRA20_CLK_PLL_P,	0,		0},
 	{TEGRA20_CLK_SDMMC1,		TEGRA20_CLK_PLL_P,	48000000,	0},
 	{TEGRA20_CLK_SDMMC2,		TEGRA20_CLK_PLL_P,	48000000,	0},
 	{TEGRA20_CLK_SDMMC3,		TEGRA20_CLK_PLL_P,	48000000,	0},
drivers/clk/tegra/clk-tegra30.c +5 -5
index 7210053..46fd6dd 100644
@@ -352,11 +352,11 @@ static struct tegra_clk_init_table init_table[] = {
 	{TEGRA30_CLK_PLL_P_OUT3,	TEGRA30_CLK_CLK_MAX,	102000000,	1},
 	{TEGRA30_CLK_PLL_P_OUT4,	TEGRA30_CLK_CLK_MAX,	204000000,	1},
 	{TEGRA30_CLK_MSELECT,		TEGRA30_CLK_PLL_P,	102000000,	1},
-	{TEGRA30_CLK_UARTA,		TEGRA30_CLK_PLL_P,	0,		1},
-	{TEGRA30_CLK_UARTB,		TEGRA30_CLK_PLL_P,	0,		1},
-	{TEGRA30_CLK_UARTC,		TEGRA30_CLK_PLL_P,	0,		1},
-	{TEGRA30_CLK_UARTD,		TEGRA30_CLK_PLL_P,	0,		1},
-	{TEGRA30_CLK_UARTE,		TEGRA30_CLK_PLL_P,	0,		1},
+	{TEGRA30_CLK_UARTA,		TEGRA30_CLK_PLL_P,	0,		0},
+	{TEGRA30_CLK_UARTB,		TEGRA30_CLK_PLL_P,	0,		0},
+	{TEGRA30_CLK_UARTC,		TEGRA30_CLK_PLL_P,	0,		0},
+	{TEGRA30_CLK_UARTD,		TEGRA30_CLK_PLL_P,	0,		0},
+	{TEGRA30_CLK_UARTE,		TEGRA30_CLK_PLL_P,	0,		0},
 	{TEGRA30_CLK_SDMMC1,		TEGRA30_CLK_PLL_P,	48000000,	0},
 	{TEGRA30_CLK_SDMMC2,		TEGRA30_CLK_PLL_P,	48000000,	0},
 	{TEGRA30_CLK_SDMMC3,		TEGRA30_CLK_PLL_P,	48000000,	0},
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Applied
#12 lore raw
In reply to Lucas Stach
Quoted 1 line · Lucas Stach

Applied all, thanks

Sascha

Quoted 43 lines
---
 arch/arm/boards/nvidia-beaver/board.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)
arch/arm/boards/nvidia-beaver/board.c +13 -2
index 20707d8..d270301 100644
@@ -20,7 +20,7 @@
 #include <i2c/i2c.h>
 #include <init.h>
 
-static int nvidia_beaver_devices_init(void)
+static int nvidia_beaver_fs_init(void)
 {
 	struct i2c_client client;
 	u8 data;
@@ -44,4 +44,15 @@ static int nvidia_beaver_devices_init(void)
 
 	return 0;
 }
-fs_initcall(nvidia_beaver_devices_init);
+fs_initcall(nvidia_beaver_fs_init);
+
+static int nvidia_beaver_device_init(void)
+{
+	if (!of_machine_is_compatible("nvidia,beaver"))
+		return 0;
+
+	barebox_set_hostname("beaver");
+
+	return 0;
+}
+device_initcall(nvidia_beaver_device_init);
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