usb: s3c-otg: Remove useless include
Subsystems (2)
PATCH 1/5 usb: s3c-otg: Remove useless include
Remove the useless inclusion of arch/arm/gpio.h , which is completely bogus in this driver.
--- drivers/usb/gadget/s3c_udc_otg.c | 1 - 1 file changed, 1 deletion(-)
drivers/usb/gadget/s3c_udc_otg.c +0 -1
@@ -31,7 +31,6 @@#include <asm/io.h> #include <asm/mach-types.h> -#include <asm/arch/gpio.h> #include "regs-otg.h" #include <usb/lin_gadget_compat.h>
Signature · 1 line
2.0.0
PATCH 2/5 usb: s3c-otg: Encapsulate PHY control
Encapsulate the Samsung PHY control and it's register accesses into the otg_phy_init() and otg_phy_off() functions.
--- drivers/usb/gadget/s3c_udc_otg.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
drivers/usb/gadget/s3c_udc_otg.c +8 -4
@@ -145,8 +145,6 @@ static struct usb_ep_ops s3c_ep_ops = {void __iomem *regs_otg;struct s3c_usbotg_reg *reg; -struct s3c_usbotg_phy *phy; -static unsigned int usb_phy_ctrl;bool dfu_usb_get_reset (void ) {
@@ -155,6 +153,10 @@ bool dfu_usb_get_reset(void)void otg_phy_init (struct s3c_udc *dev) { +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + dev->pdata->phy_control (1 );/*USB PHY0 Enable */
@@ -189,6 +191,10 @@ void otg_phy_init(struct s3c_udc *dev)void otg_phy_off (struct s3c_udc *dev) { +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; +/* reset controller just in case */ writel (PHY_SW_RST0 , &phy->rstcon);udelay (20 );
@@ -853,9 +859,7 @@ int s3c_udc_probe(struct s3c_plat_otg_data *pdata) dev->pdata = pdata; - phy = (struct s3c_usbotg_phy *)pdata->regs_phy; reg = (struct s3c_usbotg_reg *)pdata->regs_otg; - usb_phy_ctrl = pdata->usb_phy_ctrl;/* regs_otg = (void *)pdata->regs_otg; */
Signature · 1 line
2.0.0
PATCH 2/5 usb: s3c-otg: Encapsulate PHY control
Quoted 1 line · Marek Vasut
Encapsulate the Samsung PHY control and it's register accesses
"its"
Quoted 6 lines
into the
otg_phy_init()andotg_phy_off()functions.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 2/5 usb: s3c-otg: Encapsulate PHY control
In reply to Marek VasutHi Marek,
Quoted 50 lines
Encapsulate the Samsung PHY control and it's register accesses into the
otg_phy_init()andotg_phy_off()functions.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>--- drivers/usb/gadget/s3c_udc_otg.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)(quoted diff) +0
-0
b/drivers/usb/gadget/s3c_udc_otg.cindex 7508b1a..b808ddaf 100644drivers/usb/gadget/s3c_udc_otg.c +8
-2@@ -145,8 +145,6 @@ static struct usb_ep_ops s3c_ep_ops = {void __iomem *regs_otg;struct s3c_usbotg_reg *reg; -struct s3c_usbotg_phy *phy; -static unsigned int usb_phy_ctrl;bool dfu_usb_get_reset (void ) {@@ -155,6 +153,10 @@ bool dfu_usb_get_reset(void)void otg_phy_init (struct s3c_udc *dev) { +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + dev->pdata->phy_control (1 );/*USB PHY0 Enable */ @@ -189,6 +191,10 @@ void otg_phy_init(struct s3c_udc *dev)void otg_phy_off (struct s3c_udc *dev) { +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; +/* reset controller just in case */ writel (PHY_SW_RST0 , &phy->rstcon);udelay (20 );
drivers/usb/gadget/s3c_udc_otg.c int s3c_udc_probe(struct s3c_plat_otg_data *pdata) · line 865
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg.c +0
-2@@ -853,9 +859,7 @@ int s3c_udc_probe(struct s3c_plat_otg_data *pdata) dev->pdata = pdata; - phy = (struct s3c_usbotg_phy *)pdata->regs_phy; reg = (struct s3c_usbotg_reg *)pdata->regs_otg; - usb_phy_ctrl = pdata->usb_phy_ctrl;/* regs_otg = (void *)pdata->regs_otg; */
HW: Trats2 (Exynos4412) - on top of v2014.10
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 3/5 usb: s3c-otg: Split out PHY control
In reply to Marek VasutSplit the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
--- drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/s3c_udc_otg.c | 64 +---------------------- drivers/usb/gadget/s3c_udc_otg_phy.c | 99 ++++++++++++++++++++++++++++++++++++ include/configs/exynos4-common.h | 1 + include/configs/s5p_goni.h | 1 + include/configs/s5pc210_universal.h | 1 + include/configs/smdkv310.h | 1 + 7 files changed, 106 insertions(+), 62 deletions(-) create mode 100644 drivers/usb/gadget/s3c_udc_otg_phy.c
drivers/usb/gadget/Makefile +1 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o +obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o obj-$(CONFIG_THOR_FUNCTION) += f_thor.o
drivers/usb/gadget/s3c_udc_otg.c +2 -62
70 lines not on this page · raw message
drivers/usb/gadget/s3c_udc_otg_phy.c new file +99 -0
99 lines not on this page · raw message
include/configs/exynos4-common.h +1 -0
@@ -59,6 +59,7 @@#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2
include/configs/s5p_goni.h +1 -0
@@ -281,6 +281,7 @@#define CONFIG_SYS_MAX_I2C_BUS 7#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2#define CONFIG_CMD_USB_MASS_STORAGE
include/configs/s5pc210_universal.h +1 -0
@@ -181,6 +181,7 @@#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED /*
include/configs/smdkv310.h +1 -0
@@ -14,6 +14,7 @@#undef CONFIG_BOARD_COMMON#undef CONFIG_USB_GADGET#undef CONFIG_USB_GADGET_S3C_UDC_OTG +#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY#undef CONFIG_CMD_USB_MASS_STORAGE#undef CONFIG_REVISION_TAG#undef CONFIG_CMD_THOR_DOWNLOAD
Signature · 1 line
2.0.0
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 8 lines · Marek Vasut
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>
I know you are just moving the code, but...
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +9
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */
Wrong comment style.
drivers/usb/gadget/s3c_udc_otg_phy.c line 50
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ +writel (readl (usb_phy_ctrl) |USB_PHY_CTRL_EN0 , usb_phy_ctrl);
We have helpers for setting/clearing bits, right?
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 14 lines · Pavel Machek
Quoted 8 lines · Marek Vasut
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 11 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +9
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ Wrong comment style.
I'll fix this one.
Quoted 6 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 50
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ +writel (readl (usb_phy_ctrl) |USB_PHY_CTRL_EN0 , usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Yes we do, Lukasz ... ? :)
Best regards,
Marek Vasut
PATCH 3/5 usb: s3c-otg: Split out PHY control
Hi Marek,
Quoted 37 lines · Pavel Machek
Quoted 14 lines · Marek Vasut
Quoted 8 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 11 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +9
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Quoted 1 line
Yes we do, Lukasz ... ? :)
If you think about set_bit()/ clear_bit() functions from ./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.
Feel free to use them for next version of the patch.
Quoted 3 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 39 lines · Lukasz Majewski
Hi Marek,
Quoted 37 lines · Pavel Machek
Quoted 14 lines · Marek Vasut
Quoted 8 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 11 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +9
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Quoted 7 lines
Quoted 1 line
Yes we do, Lukasz ... ? :)
If you think about set_bit()/
clear_bit()functions from./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.Feel free to use them for next version of the patch.
Pavel meant clrsetbits_le32() and friends . Personally, I would leave that to subsequent set :)
Best regards,
Marek Vasut
PATCH 3/5 usb: s3c-otg: Split out PHY control
Hi Marek,
Quoted 42 lines · Lukasz Majewski
Quoted 41 lines
Hi Marek,
Quoted 38 lines · Pavel Machek
Quoted 14 lines · Marek Vasut
Quoted 8 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 11 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +5
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; + struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy*)dev->pdata->regs_phy; +
drivers/usb/gadget/s3c_udc_otg_phy.c new file +3
-0+ dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Yes we do, Lukasz ... ? :)
Quoted 8 lines
Quoted 5 lines
If you think about set_bit()/
clear_bit()functions from./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.Feel free to use them for next version of the patch.
Pavel meant
clrsetbits_le32()and friends . Personally, I would leave that to subsequent set :)
This is up to you. I just would like to avoid changing too many things at once.
Quoted 3 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 48 lines · Lukasz Majewski
Hi Marek,
Quoted 46 lines · Lukasz Majewski
Quoted 45 lines
Hi Marek,
Quoted 37 lines · Pavel Machek
Quoted 14 lines · Marek Vasut
Quoted 8 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 11 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 46
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +5
-0+void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; + struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy*)dev->pdata->regs_phy; +
drivers/usb/gadget/s3c_udc_otg_phy.c new file +3
-0+ dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Quoted 1 line
Yes we do, Lukasz ... ? :)
If you think about set_bit()/
clear_bit()functions from./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
Feel free to use them for next version of the patch.
Pavel meant
clrsetbits_le32()and friends . Personally, I would leave that to subsequent set :)This is up to you. I just would like to avoid changing too many things at once.
Definitelly. Did adding the missing include fix the issues with this patch ?
Best regards,
Marek Vasut
PATCH 3/5 usb: s3c-otg: Split out PHY control
Hi Marek,
Quoted 54 lines · Lukasz Majewski
Quoted 53 lines
Hi Marek,
Quoted 51 lines
Quoted 48 lines · Lukasz Majewski
Hi Marek,
Quoted 39 lines
Quoted 14 lines · Pavel Machek
Quoted 8 lines · Marek Vasut
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 12 lines
Review
Quoted 10 lines
(quoted diff) +3
-0+void otg_phy_init(struct s3c_udc *dev) +{ + unsigned int usb_phy_ctrl =
dev->pdata->usb_phy_ctrl;(quoted diff) +2
-0+ struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy*)dev->pdata->regs_phy; +
(quoted diff) +3
-0+ dev->pdata->phy_control(1); + + /*USB PHY0 Enable */Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
(quoted diff) +4
-0+ printf("USB PHY0 Enable\n"); + + /* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Quoted 1 line
Yes we do, Lukasz ... ? :)
If you think about set_bit()/
clear_bit()functions from./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.Feel free to use them for next version of the patch.
Quoted 9 lines
Quoted 5 lines
Quoted 2 lines
Pavel meant
clrsetbits_le32()and friends . Personally, I would leave that to subsequent set :)This is up to you. I just would like to avoid changing too many things at once.
Definitelly. Did adding the missing include fix the issues with this patch ?
I've took the topic/s3c-otg from u-boot-usb repo.
Test HW: Exynos4412 - Trats2.
Quoted 2 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 64 lines · Lukasz Majewski
Hi Marek,
Quoted 62 lines · Lukasz Majewski
Quoted 60 lines
Hi Marek,
Quoted 47 lines
On Friday, November 07, 2014 at 09:59:25 AM, Lukasz Majewski
Quoted 44 lines · wrote:
Hi Marek,
Quoted 41 lines
On Tuesday, November 04, 2014 at 08:34:21 PM, Pavel Machek
Quoted 14 lines · wrote:
Quoted 8 lines · Marek Vasut
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>I know you are just moving the code, but...
Quoted 12 lines
Review
Quoted 10 lines
(quoted diff) +3
-0+void otg_phy_init(struct s3c_udc *dev) +{ + unsigned int usb_phy_ctrl =
dev->pdata->usb_phy_ctrl;(quoted diff) +2
-0+ struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy*)dev->pdata->regs_phy; +
(quoted diff) +3
-0+ dev->pdata->phy_control(1); + + /*USB PHY0 Enable */Wrong comment style.
I'll fix this one.
Quoted 7 lines
Quoted 5 lines
(quoted diff) +4
-0+ printf("USB PHY0 Enable\n"); + + /* Enable PHY */ + writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0,
usb_phy_ctrl);We have helpers for setting/clearing bits, right?
Yes we do, Lukasz ... ? :)
Quoted 8 lines
Quoted 5 lines
If you think about set_bit()/
clear_bit()functions from./arch/arm/include/asm/bitops.h, then I don't mind to replace current code with them.Feel free to use them for next version of the patch.
Pavel meant
clrsetbits_le32()and friends . Personally, I would leave that to subsequent set :)This is up to you. I just would like to avoid changing too many things at once.
Quoted 7 lines
Quoted 2 lines
Definitelly. Did adding the missing include fix the issues with this patch ?
I've took the topic/s3c-otg from u-boot-usb repo.
Reviewed-by Lukasz Majewski <[email protected]>Tested-by Lukasz Majewski <[email protected]>
Thanks, I'll queue that up for master then.
PATCH 3/5 usb: s3c-otg: Split out PHY control
In reply to Marek VasutHi Marek,
Quoted 269 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>--- drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/s3c_udc_otg.c | 64 +---------------------- drivers/usb/gadget/s3c_udc_otg_phy.c | 99 ++++++++++++++++++++++++++++++++++++ include/configs/exynos4-common.h | 1 + include/configs/s5p_goni.h | 1 + include/configs/s5pc210_universal.h | 1 + include/configs/smdkv310.h | 1 + 7 files changed, 106insertions(+), 62 deletions(-) create mode 100644
drivers/usb/gadget/s3c_udc_otg_phy.cdrivers/usb/gadget/Makefile +0
-0@@ -12,6 +12,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.ousbstring.o ifdef
CONFIG_USB_GADGET
obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.odrivers/usb/gadget/Makefile +1
-0+obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o obj-$(CONFIG_THOR_FUNCTION) += f_thor.o(quoted diff) +0
-0
b/drivers/usb/gadget/s3c_udc_otg.cindex b808ddaf..b910053 100644drivers/usb/gadget/s3c_udc_otg.c +0
-24@@ -151,68 +151,8 @@ bool dfu_usb_get_reset(void)return !!(readl (®->gintsts) &INT_RESET ); } -void otg_phy_init (struct s3c_udc *dev) -{ -unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; -struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; - - dev->pdata->phy_control (1 ); - -/*USB PHY0 Enable */ -printf ("USB PHY0 Enable\n" ); - -/* Enable PHY */ -writel (readl (usb_phy_ctrl) |USB_PHY_CTRL_EN0 , usb_phy_ctrl); - -if (dev->pdata->usb_flags ==PHY0_SLEEP )/* C210 Universal */ -writel ((readl (&phy->phypwr) - &~(PHY_0_SLEEP |OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0 ), &phy->phypwr); -else /* C110 GONI */ -writel ((readl (&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0 ), &phy->phypwr); - -if (s5p_cpu_id ==0x4412 ) - writel((readl(&phy->phyclk) &~(EXYNOS4X12_ID_PULLUP0 |
drivers/usb/gadget/s3c_udc_otg.c +0
-1- EXYNOS4X12_COMMON_ON_N0)) |
EXYNOS4X12_CLK_SEL_24MHZ,drivers/usb/gadget/s3c_udc_otg.c +0
-3- &phy->phyclk); /* PLL 24Mhz */ - else - writel((readl(&phy->phyclk) & ~(ID_PULLUP0 |
COMMON_ON_N0)) |drivers/usb/gadget/s3c_udc_otg.c +0
-7- CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ - -writel ((readl (&phy->rstcon) &~(LINK_SW_RST |PHYLNK_SW_RST )) - |PHY_SW_RST0 , &phy->rstcon); -udelay (10 ); - writel(readl(&phy->rstcon) - &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST),
&phy->rstcon);drivers/usb/gadget/s3c_udc_otg.c +2
-27-udelay (10 ); -} - -void otg_phy_off (struct s3c_udc *dev) -{ -unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; -struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; - -/* reset controller just in case */ -writel (PHY_SW_RST0 , &phy->rstcon); -udelay (20 ); -writel (readl (&phy->phypwr) &~PHY_SW_RST0 , &phy->rstcon); -udelay (20 ); - -writel (readl (&phy->phypwr) |OTG_DISABLE_0 |ANALOG_PWRDOWN - |FORCE_SUSPEND_0 , &phy->phypwr); - -writel (readl (usb_phy_ctrl) &~USB_PHY_CTRL_EN0 , usb_phy_ctrl); - -writel ((readl (&phy->phyclk) & ~(ID_PULLUP0 |COMMON_ON_N0 )), - &phy->phyclk); - -udelay (10000 ); - - dev->pdata->phy_control (0 ); -} +__weak void otg_phy_init (struct s3c_udc *dev) {} +__weak void otg_phy_off (struct s3c_udc *dev) {}/***********************************************************/ (quoted diff) +0
-0
b/drivers/usb/gadget/s3c_udc_otg_phy.cnew file mode 100644 index 0000000..055fe86drivers/usb/gadget/s3c_udc_otg_phy.c new file +9
-0@@ -0,0 +1,99 @@ +/* +* drivers/usb/gadget/s3c_udc_otg.c +* Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers +* +* Copyright (C) 2008 for Samsung Electronics +* +* BSP Support for Samsung's UDC driver +* available at: +*
git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
+ *
+ * State machine bugfixes:
+ * Marek Szyprowski <[email protected]>
+ *
+ * Ported to u-boot:
+ * Marek Szyprowski <[email protected]>
+ * Lukasz Majewski <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */drivers/usb/gadget/s3c_udc_otg_phy.c new file +35
-0+ +#include <common.h> +#include <asm/errno.h> +#include <linux/list.h> +#include <malloc.h> + +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> + +#include <asm/byteorder.h> +#include <asm/unaligned.h> +#include <asm/io.h> + +#include <asm/mach-types.h> + +#include "regs-otg.h" +#include <usb/lin_gadget_compat.h> + +void otg_phy_init (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + + dev->pdata->phy_control (1 ); + +/*USB PHY0 Enable */ +printf ("USB PHY0 Enable\n" ); + +/* Enable PHY */ +writel (readl (usb_phy_ctrl) |USB_PHY_CTRL_EN0 , usb_phy_ctrl); + +if (dev->pdata->usb_flags ==PHY0_SLEEP )/* C210 Universal */ + writel((readl(&phy->phypwr) + &~(PHY_0_SLEEP | OTG_DISABLE_0 |
ANALOG_PWRDOWN)drivers/usb/gadget/s3c_udc_otg_phy.c new file +3
-0+ &~FORCE_SUSPEND_0), &phy->phypwr); + else /* C110 GONI */ + writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 |
ANALOG_PWRDOWN)drivers/usb/gadget/s3c_udc_otg_phy.c new file +4
-0+ &~FORCE_SUSPEND_0), &phy->phypwr); + +if (s5p_cpu_id ==0x4412 ) + writel((readl(&phy->phyclk) &~(EXYNOS4X12_ID_PULLUP0 |
drivers/usb/gadget/s3c_udc_otg_phy.c new file +1
-0+ EXYNOS4X12_COMMON_ON_N0)) |
EXYNOS4X12_CLK_SEL_24MHZ,drivers/usb/gadget/s3c_udc_otg_phy.c new file +3
-0+ &phy->phyclk); /* PLL 24Mhz */ + else + writel((readl(&phy->phyclk) & ~(ID_PULLUP0 |
COMMON_ON_N0)) |drivers/usb/gadget/s3c_udc_otg_phy.c new file +7
-0+ CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ + +writel ((readl (&phy->rstcon) &~(LINK_SW_RST |PHYLNK_SW_RST )) + |PHY_SW_RST0 , &phy->rstcon); +udelay (10 ); + writel(readl(&phy->rstcon) + &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST),
&phy->rstcon);drivers/usb/gadget/s3c_udc_otg_phy.c new file +27
-0+udelay (10 ); +} + +void otg_phy_off (struct s3c_udc *dev) +{ +unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; +struct s3c_usbotg_phy *phy = + (struct s3c_usbotg_phy *)dev->pdata->regs_phy; + +/* reset controller just in case */ +writel (PHY_SW_RST0 , &phy->rstcon); +udelay (20 ); +writel (readl (&phy->phypwr) &~PHY_SW_RST0 , &phy->rstcon); +udelay (20 ); + +writel (readl (&phy->phypwr) |OTG_DISABLE_0 |ANALOG_PWRDOWN + |FORCE_SUSPEND_0 , &phy->phypwr); + +writel (readl (usb_phy_ctrl) &~USB_PHY_CTRL_EN0 , usb_phy_ctrl); + +writel ((readl (&phy->phyclk) & ~(ID_PULLUP0 |COMMON_ON_N0 )), + &phy->phyclk); + +udelay (10000 ); + + dev->pdata->phy_control (0 ); +}(quoted diff) +0
-0
b/include/configs/exynos4-common.hindex 89ba14e..41631c7 100644include/configs/exynos4-common.h +1
-0@@ -59,6 +59,7 @@#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2include/configs/s5p_goni.h +1
-0@@ -281,6 +281,7 @@#define CONFIG_SYS_MAX_I2C_BUS 7#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2#define CONFIG_CMD_USB_MASS_STORAGE (quoted diff) +0
-0
b/include/configs/s5pc210_universal.hindex 4b30d148..e7bace4 100644include/configs/s5pc210_universal.h +1
-0@@ -181,6 +181,7 @@#define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_S3C_UDC_OTG_PHY #define CONFIG_USB_GADGET_DUALSPEED /* include/configs/smdkv310.h +0
-0
include/configs/smdkv310.h line 20
Quoted 7 lines
include/configs/smdkv310.h +1
-0@@ -14,6 +14,7 @@#undef CONFIG_BOARD_COMMON#undef CONFIG_USB_GADGET#undef CONFIG_USB_GADGET_S3C_UDC_OTG +#undef CONFIG_USB_GADGET_S3C_UDC_OTG_PHY#undef CONFIG_CMD_USB_MASS_STORAGE#undef CONFIG_REVISION_TAG#undef CONFIG_CMD_THOR_DOWNLOAD
Unfortunately I've found following build errors:
CC drivers/usb/gadget/s3c_udc_otg_phy.odrivers/usb/gadget/s3c_udc_otg_phy.c:38:26: warning: 'struct s3c_udc'
declared inside parameter list [enabled by default] void otg_phy_init(struct s3c_udc *dev) ^drivers/usb/gadget/s3c_udc_otg_phy.c:38:26: warning: its scope is only
this definition or declaration, which is probably not what you want [enabled by default] drivers/usb/gadget/s3c_udc_otg_phy.c: In function 'otg_phy_init': drivers/usb/gadget/s3c_udc_otg_phy.c:40:33:
error: dereferencing pointer to incomplete type unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:42:31: error: dereferencing pointer to incomplete type (struct s3c_usbotg_phy *)dev->pdata->regs_phy; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:44:5:
error: dereferencing pointer to incomplete type dev->pdata->phy_control(1); ^drivers/usb/gadget/s3c_udc_otg_phy.c:52:9: error: dereferencing pointer
to incomplete type if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ ^drivers/usb/gadget/s3c_udc_otg_phy.c:52:31: error: 'PHY0_SLEEP'
undeclared (first use in this function) if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ ^drivers/usb/gadget/s3c_udc_otg_phy.c:52:31: note: each undeclared
identifier is reported only once for each function it appears in drivers/usb/gadget/s3c_udc_otg_phy.c: At top level:
drivers/usb/gadget/s3c_udc_otg_phy.c:76:25: warning: 'struct s3c_udc' declared inside parameter list [enabled by default] void otg_phy_off(struct s3c_udc *dev) ^ drivers/usb/gadget/s3c_udc_otg_phy.c: In function 'otg_phy_off':
drivers/usb/gadget/s3c_udc_otg_phy.c:78:33: error: dereferencing pointer to incomplete type unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:80:31: error: dereferencing pointer to incomplete type (struct s3c_usbotg_phy *)dev->pdata->regs_phy; ^ drivers/usb/gadget/s3c_udc_otg_phy.c:98:5:
error: dereferencing pointer to incomplete type dev->pdata->phy_control(0); ^
make[1]: *** [drivers/usb/gadget/s3c_udc_otg_phy.o] Error 1
make: *** [drivers/usb/gadget] Error 2
Build HW: trats2 (Exynos4412)
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013.12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-sanitized/bin/arm-v7a-linux-gnueabi-
Patches applied on top of v2014.10.
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 13 lines · Lukasz Majewski
Hi Marek,
Quoted 11 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>
[...]
Quoted 7 lines
Build HW: trats2 (Exynos4412)
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013 .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12- sanitized/bin/arm-v7a-linux-gnueabi-
Patches applied on top of v2014.10.
Try this trivial patch (add missing include):
(quoted diff) +0 -0
b/drivers/usb/gadget/s3c_udc_otg_phy.c
index 055fe86..95bd8cf 100644
drivers/usb/gadget/s3c_udc_otg_phy.c +2 -0
@@ -35,6 +35,8 @@#include "regs-otg.h" #include <usb/lin_gadget_compat.h> +#include <usb/s3c_udc.h> +void otg_phy_init (struct s3c_udc *dev) {unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
Best regards,
Marek Vasut
PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 33 lines · On Thu, 6 Nov 2014 21:23:46 +0100 Marek Vasut <[email protected]> wrote:
Quoted 13 lines · Lukasz Majewski
Hi Marek,
Quoted 11 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>[...]
Quoted 7 lines
Build HW: trats2 (Exynos4412)
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013 .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12- sanitized/bin/arm-v7a-linux-gnueabi-
Patches applied on top of v2014.10.
Try this trivial patch (add missing include):
drivers/usb/gadget/s3c_udc_otg_phy.c +0
-0
drivers/usb/gadget/s3c_udc_otg_phy.c line 39
Quoted 5 lines
drivers/usb/gadget/s3c_udc_otg_phy.c +2
-0@@ -35,6 +35,8 @@#include "regs-otg.h" #include <usb/lin_gadget_compat.h> +#include <usb/s3c_udc.h> +
Ok, I will apply it and let you know about the result.
BTW: I assume that your work is to reuse the USB 2.0 UDC IP block (probably in Altera).
I'd be elated if this is true :-).
Quoted 10 lines
drivers/usb/gadget/s3c_udc_otg_phy.c +0
-0void otg_phy_init (struct s3c_udc *dev) {unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;Best regards,
Marek Vasut
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Best regards,
Lukasz Majewski
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PATCH 3/5 usb: s3c-otg: Split out PHY control
Quoted 1 line · Lukasz Majewski
On Thu, 6 Nov 2014 21:23:46 +0100
Hi!
Quoted 39 lines
Quoted 38 lines · Marek Vasut
Quoted 13 lines · Lukasz Majewski
Hi Marek,
Quoted 11 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>[...]
Quoted 8 lines
Build HW: trats2 (Exynos4412)
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain- 2013 .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel- 3.12- sanitized/bin/arm-v7a-linux-gnueabi-
Patches applied on top of v2014.10.
Try this trivial patch (add missing include):
drivers/usb/gadget/s3c_udc_otg_phy.c +0
-0@@ -35,6 +35,8 @@#include "regs-otg.h" #include <usb/lin_gadget_compat.h>
Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 39
Quoted 2 lines
drivers/usb/gadget/s3c_udc_otg_phy.c +2
-0+#include <usb/s3c_udc.h> +Ok, I will apply it and let you know about the result.
BTW: I assume that your work is to reuse the USB 2.0 UDC IP block (probably in Altera).
Yep, I got the UDC working on my SoCFPGA board. We should probably rename the s3c-otg driver to something more fitting (dwc2-udc ?) and strive to somehow merge the dwc2-host and dwc2-udc drivers in the long run.
Speaking of the rename, I'd like to leave that for the next MW, to make sure it doesn't break any tools which might for example depend on the name of the driver.
Quoted 1 line
I'd be elated if this is true :-).
It is :) ... it must have been hard to tell from patch 5/5 ;-)
Best regards,
Marek Vasut
PATCH 3/5 usb: s3c-otg: Split out PHY control
Hi Marek,
Quoted 53 lines · Lukasz Majewski
Quoted 1 line
On Thu, 6 Nov 2014 21:23:46 +0100
Hi!
Quoted 40 lines
Quoted 39 lines · Marek Vasut
Quoted 13 lines · Lukasz Majewski
Hi Marek,
Quoted 11 lines
Split the Samsung specific PHY control into a separate file and compile this into the S3C OTG driver only if used on a Samsung system.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>[...]
Quoted 8 lines
Build HW: trats2 (Exynos4412)
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain- 2013 .12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel- 3.12- sanitized/bin/arm-v7a-linux-gnueabi-
Patches applied on top of v2014.10.
Try this trivial patch (add missing include):
drivers/usb/gadget/s3c_udc_otg_phy.c +0
-0@@ -35,6 +35,8 @@#include "regs-otg.h" #include <usb/lin_gadget_compat.h> Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg_phy.c line 39
Quoted 2 lines
drivers/usb/gadget/s3c_udc_otg_phy.c +2
-0+#include <usb/s3c_udc.h> +Ok, I will apply it and let you know about the result.
BTW: I assume that your work is to reuse the USB 2.0 UDC IP block (probably in Altera).
Quoted 8 lines
Yep, I got the UDC working on my SoCFPGA board. We should probably rename the s3c-otg driver to something more fitting (dwc2-udc ?) and strive to somehow merge the dwc2-host and dwc2-udc drivers in the long run.
Speaking of the rename, I'd like to leave that for the next MW, to make sure it doesn't break any tools which might for example depend on the name of the driver.
+1
IMHO, we should devote one MW only for rename (as I've written previously).
Quoted 7 lines
Quoted 2 lines
I'd be elated if this is true :-).
It is :) ... it must have been hard to tell from patch 5/5 ;-)
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
In reply to Marek VasutAllow passing in a custom configuration of the gusbcfg register via platform data.
--- drivers/usb/gadget/s3c_udc_otg.c | 18 ++++++++++++------ drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 2 +- include/usb/s3c_udc.h | 1 + 3 files changed, 14 insertions(+), 7 deletions(-)
drivers/usb/gadget/s3c_udc_otg.c +12 -6
@@ -104,7 +104,7 @@ static void stop_activity(struct s3c_udc *dev, struct usb_gadget_driver *driver);static int udc_enable (struct s3c_udc *dev);static void udc_set_address (struct s3c_udc *dev,unsigned char address); -static void reconfig_usbd (void ); +static void reconfig_usbd (struct s3c_udc *dev);static void set_max_pktsize (struct s3c_udc *dev,enum usb_device_speed speed);static void nuke (struct s3c_ep *ep,int status);static int s3c_udc_set_halt (struct usb_ep *_ep,int value);
@@ -215,7 +215,7 @@ static int udc_enable(struct s3c_udc *dev)debug_cond (DEBUG_SETUP !=0 ,"%s: %p\n" , __func__, dev);otg_phy_init (dev); -reconfig_usbd (); +reconfig_usbd (dev); debug_cond(DEBUG_SETUP != 0, "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
@@ -396,15 +396,17 @@ static void stop_activity(struct s3c_udc *dev,udc_reinit (dev); } -static void reconfig_usbd (void ) +static void reconfig_usbd (struct s3c_udc *dev) {/* 2. Soft-reset OTG Core and then unreset again. */ int i;unsigned int uTemp =writel (CORE_SOFT_RESET , ®->grstctl); +uint32_t dflt_gusbcfg;debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/ + dflt_gusbcfg = +0 <<15 /* PHY Low Power Clock sel*/ |1 <<14 /* Non-Periodic TxFIFO Rewind Enable*/ |0x5 <<10 /* Turnaround time*/ |0 <<9 |0 <<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0 <<4 /* 0: utmi+, 1:ulpi*/ |1 <<3 /* phy i/f 0:8bit, 1:16bit*/ - |0x7 <<0 ,/* HS/FS Timeout**/ - ®->gusbcfg); + |0x7 <<0 ;/* HS/FS Timeout**/ + +if (dev->pdata->usb_gusbcfg) + dflt_gusbcfg = dev->pdata->usb_gusbcfg; + +writel (dflt_gusbcfg, ®->gusbcfg);/* 3. Put the OTG device core in the disconnected state.*/ uTemp =readl (®->dctl);
drivers/usb/gadget/s3c_udc_otg_xfer_dma.c +1 -1
@@ -551,7 +551,7 @@ static int s3c_udc_irq(int irq, void *_dev)debug_cond (DEBUG_ISR ,"\t\tOTG core got reset (%d)!!\n" , reset_available); -reconfig_usbd (); +reconfig_usbd (dev); dev->ep0state =WAIT_FOR_SETUP ; reset_available =0 ;s3c_udc_pre_setup ();
include/usb/s3c_udc.h +1 -0
@@ -108,5 +108,6 @@ struct s3c_plat_otg_data {unsigned int regs_otg;unsigned int usb_phy_ctrl;unsigned int usb_flags; + unsigned int usb_gusbcfg; };#endif
Signature · 1 line
2.0.0
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Quoted 7 lines · Marek Vasut
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>
Quoted 9 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/ + dflt_gusbcfg = +0 <<15 /* PHY Low Power Clock sel*/ |1 <<14 /* Non-Periodic TxFIFO Rewind Enable*/ |0x5 <<10 /* Turnaround time*/ |0 <<9 |0 <<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0 <<4 /* 0: utmi+, 1:ulpi*/ |1 <<3 /* phy i/f 0:8bit, 1:16bit*/ - |0x7 <<0 ,/* HS/FS Timeout**/ - ®->gusbcfg); + |0x7 <<0 ;/* HS/FS Timeout**/ +
"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Quoted 27 lines · Pavel Machek
Quoted 7 lines · Marek Vasut
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 16 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/ + dflt_gusbcfg = +0 <<15 /* PHY Low Power Clock sel*/ |1 <<14 /* Non-Periodic TxFIFO Rewind Enable*/ |0x5 <<10 /* Turnaround time*/ |0 <<9 |0 <<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/ @@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0 <<4 /* 0: utmi+, 1:ulpi*/ |1 <<3 /* phy i/f 0:8bit, 1:16bit*/
Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
Best regards,
Marek Vasut
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Hi Marek,
Quoted 38 lines · Pavel Machek
Quoted 29 lines · Marek Vasut
Quoted 7 lines
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 18 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/ + dflt_gusbcfg = +0 <<15 /* PHY Low Power Clock sel*/ |1 <<14 /* Non-Periodic TxFIFO Rewind Enable*/ |0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP
enable][ 0:SRP disable*/(quoted diff) +0
-0@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1:full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/
|1<<3 /* phy i/f 0:8bit,
1:16bit*/Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Quoted 2 lines
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
+1
It is a very good idea since we are using the same dwc2 IP block for host (./usb/host/dwc2.c) and device (s3c_hsotg).
Quoted 2 lines
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build error :-).
Quoted 3 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Quoted 45 lines · Lukasz Majewski
Hi Marek,
Quoted 43 lines · Pavel Machek
Quoted 41 lines · Marek Vasut
Quoted 7 lines
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 23 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/ + dflt_gusbcfg = +0 <<15 /* PHY Low Power Clock sel*/ |1 <<14 /* Non-Periodic TxFIFO Rewind Enable*/ |0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP
enable][ 0:SRP disable*/
(quoted diff) +0
-0@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1:full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/
|1<<3 /* phy i/f 0:8bit,
1:16bit*/
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Quoted 7 lines
Quoted 2 lines
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
+1
It is a very good idea since we are using the same dwc2 IP block for host (
./usb/host/dwc2.c) and device (s3c_hsotg).
Yep ... I'm just wondering if we should do that rename in the next MW. If you're fine with this MW though, then I will do just that.
Quoted 4 lines
Quoted 1 line
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build error :-).
I rewrote that branch, so feel free to use that as a base for your testing. I will repost the corrected patches once I get feedback from you.
Best regards,
Marek Vasut
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Hi Marek,
Quoted 52 lines · Lukasz Majewski
Quoted 51 lines
Hi Marek,
Quoted 48 lines · Pavel Machek
Quoted 37 lines · Marek Vasut
Quoted 7 lines
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 26 lines
drivers/usb/gadget/s3c_udc_otg.c +0
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/
(quoted diff) +2
-0+ dflt_gusbcfg = + 0<<15 /* PHY Low Power Clocksel*/
|1<<14 /* Non-Periodic TxFIFO
Rewind Enable*/ |0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP
enable][ 0:SRP disable*/
(quoted diff) +0
-0@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0<<4 /* 0: utmi+,1:ulpi*/
|1<<3 /* phy i/f 0:8bit,
1:16bit*/
Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
Quoted 7 lines
Quoted 4 lines
+1
It is a very good idea since we are using the same dwc2 IP block for host (
./usb/host/dwc2.c) and device (s3c_hsotg).Yep ... I'm just wondering if we should do that rename in the next MW. If you're fine with this MW though, then I will do just that.
I'd prefer to spent one MW only for s3c-hsotg rename. In other words we do the "fixes" and "clean ups" now and only when the code gets stable we perform the rename (at the MW).
Does it work for you?
Quoted 9 lines
Quoted 5 lines
Quoted 2 lines
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build error :-).
I rewrote that branch, so feel free to use that as a base for your testing. I will repost the corrected patches once I get feedback from you.
Ok.
Quoted 3 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
In reply to Marek VasutHi Marek,
Quoted 65 lines · Lukasz Majewski
Quoted 48 lines
Hi Marek,
Quoted 46 lines · Pavel Machek
Quoted 44 lines · Marek Vasut
Quoted 7 lines
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 26 lines
drivers/usb/gadget/s3c_udc_otg.c +0
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/
(quoted diff) +2
-0+ dflt_gusbcfg = + 0<<15 /* PHY Low Power Clocksel*/
|1<<14 /* Non-Periodic TxFIFO
Rewind Enable*/ |0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP
enable][ 0:SRP disable*/
(quoted diff) +0
-0@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0<<4 /* 0: utmi+,1:ulpi*/
|1<<3 /* phy i/f 0:8bit,
1:16bit*/
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Quoted 7 lines
Quoted 2 lines
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
+1
It is a very good idea since we are using the same dwc2 IP block for host (
./usb/host/dwc2.c) and device (s3c_hsotg).Yep ... I'm just wondering if we should do that rename in the next MW. If you're fine with this MW though, then I will do just that.
Quoted 4 lines
Quoted 1 line
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build error :-).
Quoted 6 lines
I rewrote that branch, so feel free to use that as a base for your testing. I will repost the corrected patches once I get feedback from you.
Best regards,
Marek Vasut
Test HW: Trats2 (Exynos4412)
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
Marek Vasut
AppliedPATCH 4/5 usb: s3c-otg: Allow custom gusbcfg
Quoted 72 lines · Lukasz Majewski
Hi Marek,
Quoted 70 lines · Lukasz Majewski
Quoted 49 lines
Hi Marek,
Quoted 47 lines · Pavel Machek
Quoted 45 lines · Marek Vasut
Quoted 7 lines
Allow passing in a custom configuration of the gusbcfg register via platform data.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Acked-by Pavel Machek <[email protected]>Quoted 27 lines
drivers/usb/gadget/s3c_udc_otg.c +0
-1debug ("Reseting OTG controller\n" ); -writel (0 <<15 /* PHY Low Power Clock sel*/
(quoted diff) +2
-0+ dflt_gusbcfg = + 0<<15 /* PHY Low Power Clocksel*/
|1<<14 /* Non-Periodic TxFIFO
Rewind Enable*/ |0x5<<10 /* Turnaround time*/
|0<<9 | 0<<8 /* [0:HNP disable,1:HNP
enable][ 0:SRP disable*/
(quoted diff) +0
-0@@ -413,8 +415,12 @@ static void reconfig_usbd(void) |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0<<4 /* 0: utmi+,1:ulpi*/
|1<<3 /* phy i/f 0:8bit,
1:16bit*/
drivers/usb/gadget/s3c_udc_otg.c static void reconfig_usbd(void) · line 419
Quoted 4 lines
drivers/usb/gadget/s3c_udc_otg.c +2
-2- |0x7<<0, /* HS/FS Timeout**/ - ®->gusbcfg); + |0x7<<0; /* HS/FS Timeout**/ +"Interesting" comment style. And I'd remove 0x prefixes from constants <8...
Quoted 7 lines
Quoted 2 lines
Lukasz, what do you say to just convert those four boards to use the gusbcfg platform data afterward ?
+1
It is a very good idea since we are using the same dwc2 IP block for host (
./usb/host/dwc2.c) and device (s3c_hsotg).Yep ... I'm just wondering if we should do that rename in the next MW. If you're fine with this MW though, then I will do just that.
Quoted 4 lines
Quoted 1 line
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build error :-).
I rewrote that branch, so feel free to use that as a base for your testing. I will repost the corrected patches once I get feedback from you.
Quoted 8 lines
Quoted 2 lines
Best regards,
Marek VasutReviewed-by Lukasz Majewski <[email protected]>Tested-by Lukasz Majewski <[email protected]>Test HW: Trats2 (Exynos4412)
Queued for master, thanks!
PATCH 5/5 arm: socfpga: Add example UDC config
In reply to Marek VasutAdd example of an USB UDC configuration with DFU and UMS.
--- board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++ include/configs/socfpga_common.h | 30 +++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-)
board/altera/socfpga/socfpga_cyclone5.c +21 -0
@@ -8,6 +8,10 @@#include <asm/arch/reset_manager.h> #include <asm/io.h> +#include <usb.h> +#include <usb/s3c_udc.h> +#include <usb_mass_storage.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -39,3 +43,20 @@ int board_init(void)return 0 ; } + +#ifdef CONFIG_USB_GADGET +struct s3c_plat_otg_data socfpga_otg_data = { + .regs_otg =CONFIG_USB_DWC2_REG_ADDR , + .usb_gusbcfg =0x1417 , +}; + +int board_usb_init (int index,enum usb_init_type init) +{ +return s3c_udc_probe (&socfpga_otg_data); +} + +int g_dnl_board_usb_cable_connected (void ) +{ +return 1 ; +} +#endif
include/configs/socfpga_common.h +29 -1
@@ -37,7 +37,7 @@*/ #define CONFIG_NR_DRAM_BANKS 1#define PHYS_SDRAM_1 0x0 -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
@@ -191,6 +191,34 @@#endif /* +* USB Gadget (DFU, UMS) +*/ +#if defined(CONFIG_CMD_DFU ) || defined(CONFIG_CMD_USB_MASS_STORAGE ) +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5/* Linux-USB File-backed Storage Gadget */ +#define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM +#define CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_PRODUCT_NUM +#ifndef CONFIG_G_DNL_MANUFACTURER +#define CONFIG_G_DNL_MANUFACTURER "Altera" +#endif +#endif + +/* * U-Boot environment */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
Signature · 1 line
2.0.0
PATCH 5/5 arm: socfpga: Add example UDC config
Hi!
include/configs/socfpga_common.h line 213
Quoted 13 lines
Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>include/configs/socfpga_common.h +3
-0+/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5/* Linux-USB File-backed Storage Gadget */
Will not this make NetChip rather angry?
Pavel
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 5/5 arm: socfpga: Add example UDC config
Quoted 12 lines · Pavel Machek
Hi!
Quoted 10 lines
Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 6 lines
Quoted 4 lines
include/configs/socfpga_common.h +3
-0+/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5/* Linux-USB File-backed Storage Gadget */
Will not this make NetChip rather angry?
You mean that netchip which reserved this ID especially for free use ? No.
Best regards,
Marek Vasut
PATCH 5/5 arm: socfpga: Add example UDC config
Quoted 13 lines · Marek Vasut
Quoted 12 lines · Pavel Machek
Hi!
Quoted 10 lines
Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>
Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
include/configs/socfpga_common.h +3
-0+/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5/* Linux-USB File-backed Storage Gadget */
Will not this make NetChip rather angry?
You mean that netchip which reserved this ID especially for free use ? No.
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 5/5 arm: socfpga: Add example UDC config
In reply to Marek VasutHi Marek,
Quoted 93 lines
Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>--- board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++ include/configs/socfpga_common.h | 30+++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-)
(quoted diff) +0
-0
b/board/altera/socfpga/socfpga_cyclone5.cindex 0f81d89..ce625e5 100644 ---a/board/altera/socfpga/socfpga_cyclone5.c+++b/board/altera/socfpga/socfpga_cyclone5.cboard/altera/socfpga/socfpga_cyclone5.c +21
-0@@ -8,6 +8,10 @@#include <asm/arch/reset_manager.h> #include <asm/io.h> +#include <usb.h> +#include <usb/s3c_udc.h> +#include <usb_mass_storage.h> +#include <netdev.h> DECLARE_GLOBAL_DATA_PTR ;@@ -39,3 +43,20 @@ int board_init(void)return 0 ; } + +#ifdef CONFIG_USB_GADGET +struct s3c_plat_otg_data socfpga_otg_data = { + .regs_otg =CONFIG_USB_DWC2_REG_ADDR , + .usb_gusbcfg =0x1417 , +}; + +int board_usb_init (int index,enum usb_init_type init) +{ +return s3c_udc_probe (&socfpga_otg_data); +} + +int g_dnl_board_usb_cable_connected (void ) +{ +return 1 ; +} +#endif (quoted diff) +0
-0
b/include/configs/socfpga_common.hindex 1df886b..9823be6 100644include/configs/socfpga_common.h +20
-1@@ -37,7 +37,7 @@*/ #define CONFIG_NR_DRAM_BANKS 1#define PHYS_SDRAM_1 0x0 -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE@@ -191,6 +191,34 @@#endif /* +* USB Gadget (DFU, UMS) +*/ +#if defined(CONFIG_CMD_DFU ) || defined(CONFIG_CMD_USB_MASS_STORAGE ) +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define
CONFIG_G_DNL_PRODUCT_NUM0xA4A5/*
Linux-USB File-backed Storage Gadget */ +#defineCONFIG_G_DNL_UMS_VENDOR_NUMCONFIG_G_DNL_VENDOR_NUM+#defineCONFIG_G_DNL_UMS_PRODUCT_NUMCONFIG_G_DNL_PRODUCT_NUM+#ifndefCONFIG_G_DNL_MANUFACTURER+#defineCONFIG_G_DNL_MANUFACTURER"Altera" +#endif
include/configs/socfpga_common.h line 224
Quoted 6 lines
include/configs/socfpga_common.h +3
-0+#endif + +/* * U-Boot environment */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 5/5 arm: socfpga: Add example UDC config
Quoted 1 line · Lukasz Majewski
Hi Marek,
[...]
Quoted 29 lines
Quoted 29 lines
+ * USB Gadget (DFU, UMS)
+ */include/configs/socfpga_common.h +17
-0+#if defined(CONFIG_CMD_DFU ) || defined(CONFIG_CMD_USB_MASS_STORAGE ) +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define
CONFIG_G_DNL_PRODUCT_NUM0xA4A5/*
Linux-USB File-backed Storage Gadget */ +#defineCONFIG_G_DNL_UMS_VENDOR_NUMCONFIG_G_DNL_VENDOR_NUM+#defineCONFIG_G_DNL_UMS_PRODUCT_NUMCONFIG_G_DNL_PRODUCT_NUM+#ifndefCONFIG_G_DNL_MANUFACTURER+#defineCONFIG_G_DNL_MANUFACTURER"Altera" +#endifinclude/configs/socfpga_common.h +3
-0+#endif + +/*
Quoted 6 lines
Quoted 4 lines
* U-Boot environment
*/#define
CONFIG_SYS_CONSOLE_IS_IN_ENVReviewed-by Lukasz Majewski <[email protected]>
Thanks!
Quoted 1 line
Tested-by Lukasz Majewski <[email protected]>
Wow, do you have an SoCFPGA now ? :)
Best regards,
Marek Vasut
PATCH 5/5 arm: socfpga: Add example UDC config
Hi Marek,
Quoted 39 lines · Lukasz Majewski
Quoted 1 line
Hi Marek,
[...]
Quoted 29 lines
Quoted 29 lines
+ * USB Gadget (DFU, UMS)
+ */
+#ifdefined(CONFIG_CMD_DFU)||defined(CONFIG_CMD_USB_MASS_STORAGE)+#defineCONFIG_USB_GADGETinclude/configs/socfpga_common.h +15
-0+#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define
CONFIG_G_DNL_PRODUCT_NUM0xA4A5/* Linux-USB File-backed Storage Gadget */ +#defineCONFIG_G_DNL_UMS_VENDOR_NUMCONFIG_G_DNL_VENDOR_NUM
+#defineCONFIG_G_DNL_UMS_PRODUCT_NUMCONFIG_G_DNL_PRODUCT_NUM+#ifndefCONFIG_G_DNL_MANUFACTURERinclude/configs/socfpga_common.h +4
-0+#define CONFIG_G_DNL_MANUFACTURER "Altera" +#endif +#endif + +/* Quoted 6 lines
Quoted 4 lines
* U-Boot environment
*/#define
CONFIG_SYS_CONSOLE_IS_IN_ENVReviewed-by Lukasz Majewski <[email protected]>
Quoted 5 lines
Thanks!
Quoted 1 line
Tested-by Lukasz Majewski <[email protected]>Wow, do you have an SoCFPGA now ? :)
Nope, but I've tested the patch to be 100% sure :-) (as it was the last one)
Quoted 3 lines
Best regards,
Marek Vasut
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
PATCH 5/5 arm: socfpga: Add example UDC config
Quoted 43 lines · Lukasz Majewski
Hi Marek,
Quoted 41 lines · Lukasz Majewski
Quoted 1 line
Hi Marek,
[...]
Quoted 35 lines
Quoted 24 lines
+ * USB Gadget (DFU, UMS)
+ */
+#ifdefined(CONFIG_CMD_DFU)||defined(CONFIG_CMD_USB_MASS_STORAGE)+#defineCONFIG_USB_GADGETinclude/configs/socfpga_common.h +15
-0+#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define
CONFIG_G_DNL_PRODUCT_NUM0xA4A5/* Linux-USB File-backed Storage Gadget */ +#defineCONFIG_G_DNL_UMS_VENDOR_NUMCONFIG_G_DNL_VENDOR_NUM
+#defineCONFIG_G_DNL_UMS_PRODUCT_NUMCONFIG_G_DNL_PRODUCT_NUM+#ifndefCONFIG_G_DNL_MANUFACTURERinclude/configs/socfpga_common.h line 224
Quoted 9 lines
include/configs/socfpga_common.h +4
-0+#define CONFIG_G_DNL_MANUFACTURER "Altera" +#endif +#endif + +/* * U-Boot environment */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV Reviewed-by Lukasz Majewski <[email protected]>
Quoted 8 lines
Quoted 5 lines
Thanks!
Quoted 1 line
Tested-by Lukasz Majewski <[email protected]>Wow, do you have an SoCFPGA now ? :)
Nope, but I've tested the patch to be 100% sure :-) (as it was the last one)
Thanks!
Best regards,
Marek Vasut
Marek Vasut
AppliedPATCH 5/5 arm: socfpga: Add example UDC config
In reply to Lukasz MajewskiQuoted 112 lines · Lukasz Majewski
Hi Marek,
Quoted 110 lines
Add example of an USB UDC configuration with DFU and UMS.
Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>---
board/altera/socfpga/socfpga_cyclone5.c | 21 +++++++++++++++++++++ include/configs/socfpga_common.h | 30+++++++++++++++++++++++++++++- 2 files changed, 50 insertions(+), 1 deletion(-)
(quoted diff) +0
-0
b/board/altera/socfpga/socfpga_cyclone5.cindex 0f81d89..ce625e5 100644 ---a/board/altera/socfpga/socfpga_cyclone5.c+++b/board/altera/socfpga/socfpga_cyclone5.cboard/altera/socfpga/socfpga_cyclone5.c +4
-0@@ -8,6 +8,10 @@#include <asm/arch/reset_manager.h> #include <asm/io.h> +#include <usb.h> +#include <usb/s3c_udc.h> +#include <usb_mass_storage.h> +#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;board/altera/socfpga/socfpga_cyclone5.c +17
-0@@ -39,3 +43,20 @@ int board_init(void)return 0 ; } + +#ifdef CONFIG_USB_GADGET +struct s3c_plat_otg_data socfpga_otg_data = { + .regs_otg =CONFIG_USB_DWC2_REG_ADDR , + .usb_gusbcfg =0x1417 , +}; + +int board_usb_init (int index,enum usb_init_type init) +{ +return s3c_udc_probe (&socfpga_otg_data); +} + +int g_dnl_board_usb_cable_connected (void ) +{ +return 1 ; +} +#endif (quoted diff) +0
-0
b/include/configs/socfpga_common.hindex 1df886b..9823be6 100644include/configs/socfpga_common.h +1
-1@@ -37,7 +37,7 @@*/ #define CONFIG_NR_DRAM_BANKS 1#define PHYS_SDRAM_1 0x0 -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024)#define
CONFIG_SYS_MEMTEST_STARTPHYS_SDRAM_1
#defineCONFIG_SYS_MEMTEST_ENDPHYS_SDRAM_1_SIZEinclude/configs/socfpga_common.h +19
-0@@ -191,6 +191,34 @@#endif /* +* USB Gadget (DFU, UMS) +*/ +#if defined(CONFIG_CMD_DFU ) || defined(CONFIG_CMD_USB_MASS_STORAGE ) +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_MASS_STORAGE + +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +/* USB IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525/* NetChip */ +#define
CONFIG_G_DNL_PRODUCT_NUM0xA4A5/*
Linux-USB File-backed Storage Gadget */ +#defineCONFIG_G_DNL_UMS_VENDOR_NUMCONFIG_G_DNL_VENDOR_NUM+#defineCONFIG_G_DNL_UMS_PRODUCT_NUMCONFIG_G_DNL_PRODUCT_NUM+#ifndefCONFIG_G_DNL_MANUFACTURER+#defineCONFIG_G_DNL_MANUFACTURER"Altera" +#endifinclude/configs/socfpga_common.h +3
-0+#endif + +/*
Quoted 7 lines
Quoted 4 lines
* U-Boot environment
*/#define
CONFIG_SYS_CONSOLE_IS_IN_ENVReviewed-by Lukasz Majewski <[email protected]>Tested-by Lukasz Majewski <[email protected]>
Queued for master, thanks!
PATCH 1/5 usb: s3c-otg: Remove useless include
In reply to Marek VasutQuoted 7 lines · Marek Vasut
Remove the useless inclusion of
arch/arm/gpio.h, which is completely bogus in this driver.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
PATCH 1/5 usb: s3c-otg: Remove useless include
In reply to Marek VasutHi Marek,
Quoted 19 lines
Remove the useless inclusion of
arch/arm/gpio.h, which is completely bogus in this driver.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Vince Bridgers <[email protected]>Cc Pavel Machek <[email protected]>Cc Stefan Roese <[email protected]>Cc Lukasz Majewski <[email protected]>--- drivers/usb/gadget/s3c_udc_otg.c | 1 - 1 file changed, 1 deletion(-)(quoted diff) +0
-0
b/drivers/usb/gadget/s3c_udc_otg.cindex b9816df..7508b1a 100644
drivers/usb/gadget/s3c_udc_otg.c line 36
Quoted 7 lines
drivers/usb/gadget/s3c_udc_otg.c +0
-1@@ -31,7 +31,6 @@#include <asm/io.h> #include <asm/mach-types.h> -#include <asm/arch/gpio.h> #include "regs-otg.h" #include <usb/lin_gadget_compat.h>
Signature · 5 lines
Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group