Correct the race condition in aarch64_insn_patch_text_sync()

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and decrementing the

cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The patching function now waits for all processors to enter the patching function before changing code to ensure that none of the processors are in code that is going to be patched. Once all the processors have entered the function, the last processor to enter the patching function performs the pathing and signals that the patching is complete with one last decrement of the cpu_count field to make it -1.

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

arch/arm64/kernel/insn.c +6 -3

index e007714..e6266db 100644
@@ -153,8 +153,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 	int i, ret = 0;
 	struct aarch64_insn_patch *pp = arg;
 
-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this function
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_dec_return(&pp->cpu_count) == 0) {
 		for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
 			ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
 							     pp->new_insns[i]);

@@ -163,7 +165,8 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notifiy other processors with an additional decrement. */
+		atomic_dec(&pp->cpu_count);
 	} else {
 		while (atomic_read(&pp->cpu_count) != -1)
 			cpu_relax();

Hi Will,

Thanks for the tracking this down.

Quoted 6 lines · William Cohen

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and decrementing the

s/decrementing/incrementing/

Quoted 45 lines

cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The patching function now waits for all processors to enter the patching function before changing code to ensure that none of the processors are in code that is going to be patched. Once all the processors have entered the function, the last processor to enter the patching function performs the pathing and signals that the patching is complete with one last decrement of the cpu_count field to make it -1.

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

arch/arm64/kernel/insn.c +6 -3

index e007714..e6266db 100644
@@ -153,8 +153,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 	int i, ret = 0;
 	struct aarch64_insn_patch *pp = arg;
 
-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this functionaarch64_insn_patch_text_cb(
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_dec_return(&pp->cpu_count) == 0) {
 		for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
 			ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
 							     pp->new_insns[i]);

@@ -163,7 +165,8 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notifiy other processors with an additional decrement. */
+		atomic_dec(&pp->cpu_count);
 	} else {
 		while (atomic_read(&pp->cpu_count) != -1)
 			cpu_relax();

arch/arm64/kernel/insn.c int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt) · line 191

Quoted 4 lines

arch/arm64/kernel/insn.c +1 -0

@@ -185,6 +188,7 @@ int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt)
 	if (cnt <= 0)
 		return -EINVAL;
 
+	atomic_set(&patch.cpu_count, num_online_cpus());

I think this is still racy with hotplug before stop_machine has done get_online_cpus. How about we leave the increment in the callback and change the exit condition to compare with num_online_cpus() instead?

Cheers,

Will

Quoted 32 lines · Will Deacon

Quoted 31 lines · William Cohen

arch/arm64/kernel/insn.c +6 -3

index e007714..e6266db 100644
@@ -153,8 +153,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 	int i, ret = 0;
 	struct aarch64_insn_patch *pp = arg;
 
-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this functionaarch64_insn_patch_text_cb(
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_dec_return(&pp->cpu_count) == 0) {
 		for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
 			ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
 							     pp->new_insns[i]);

@@ -163,7 +165,8 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notifiy other processors with an additional decrement. */
+		atomic_dec(&pp->cpu_count);
 	} else {
 		while (atomic_read(&pp->cpu_count) != -1)
 			cpu_relax();

@@ -185,6 +188,7 @@ int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt)
 	if (cnt <= 0)
 		return -EINVAL;
 

Quoted 5 lines

arch/arm64/kernel/insn.c int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt) · line 191

Quoted 1 line

arch/arm64/kernel/insn.c +1 -0

+	atomic_set(&patch.cpu_count, num_online_cpus());

I think this is still racy with hotplug before stop_machine has done get_online_cpus. How about we leave the increment in the callback and change the exit condition to compare with num_online_cpus() instead?

Thanks for the feedback. I am no expert in the corner cases involved with hotplug. Dave Long suggested something similar with num_online_cpus in the arch64_insn_patch_text_cb() and using increments and checking the num_cpus_online() inside aarch64_insn_patch_text_cb(). Moving the num_cpu_online() inside the aarch64_insn_patch_text_cb() is sufficient to avoid race conditions with hotplug? If so, would the attached patch be appropriate?

From d02e3244c436234d0d07500be6d4df64feb2052a Mon Sep 17 00:00:00 2001
From: William Cohen <[email protected]>
Date: Mon, 10 Nov 2014 14:26:44 -0500
Subject: [PATCH] Correct the race condition in aarch64_insn_patch_text_sync()

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and incrementing the cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The patching function now waits for all processors to enter the patching function before changing code to ensure that none of the processors are in code that is going to be patched. Once all the processors have entered the function, the last processor to enter the patching function performs the patching and signals that the patching is complete with one last increment of the cpu_count field to make it num_cpus_online()+1.

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

arch/arm64/kernel/insn.c +0 -0

index e007714..4fdddf1 100644
@@ -151,10 +151,13 @@ struct aarch64_insn_patch {
 static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 {

Quoted 39 lines · William Cohen

Quoted 32 lines · Will Deacon

Quoted 31 lines · William Cohen

arch/arm64/kernel/insn.c +6 -3

index e007714..e6266db 100644
@@ -153,8 +153,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 	int i, ret = 0;
 	struct aarch64_insn_patch *pp = arg;
 
-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this functionaarch64_insn_patch_text_cb(
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_dec_return(&pp->cpu_count) == 0) {
 		for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
 			ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
 							     pp->new_insns[i]);

@@ -163,7 +165,8 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notifiy other processors with an additional decrement. */
+		atomic_dec(&pp->cpu_count);
 	} else {
 		while (atomic_read(&pp->cpu_count) != -1)
 			cpu_relax();

@@ -185,6 +188,7 @@ int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt)
 	if (cnt <= 0)
 		return -EINVAL;
 

Quoted 5 lines

arch/arm64/kernel/insn.c int __kprobes aarch64_insn_patch_text_sync(void *addrs[], u32 insns[], int cnt) · line 191

Quoted 1 line

arch/arm64/kernel/insn.c +1 -0

+	atomic_set(&patch.cpu_count, num_online_cpus());

I think this is still racy with hotplug before stop_machine has done get_online_cpus. How about we leave the increment in the callback and change the exit condition to compare with num_online_cpus() instead?

Quoted 7 lines

Thanks for the feedback. I am no expert in the corner cases involved with hotplug. Dave Long suggested something similar with num_online_cpus in the arch64_insn_patch_text_cb() and using increments and checking the num_cpus_online() inside aarch64_insn_patch_text_cb(). Moving the num_cpu_online() inside the aarch64_insn_patch_text_cb() is sufficient to avoid race conditions with hotplug? If so, would the attached patch be appropriate?

Yes, because stop_machine() does {get,put}_online_cpus() around the invocation.

Quoted 39 lines

From d02e3244c436234d0d07500be6d4df64feb2052a Mon Sep 17 00:00:00 2001
From: William Cohen <[email protected]>
Date: Mon, 10 Nov 2014 14:26:44 -0500
Subject: [PATCH] Correct the race condition in aarch64_insn_patch_text_sync()

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and incrementing the cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The patching function now waits for all processors to enter the patching function before changing code to ensure that none of the processors are in code that is going to be patched. Once all the processors have entered the function, the last processor to enter the patching function performs the patching and signals that the patching is complete with one last increment of the cpu_count field to make it num_cpus_online()+1.

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

arch/arm64/kernel/insn.c +1 -0

index e007714..4fdddf1 100644
@@ -151,10 +151,13 @@ struct aarch64_insn_patch {
 static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 {
 	int i, ret = 0;
+	int count = num_online_cpus();
 	struct aarch64_insn_patch *pp = arg;
 

arch/arm64/kernel/insn.c static int __kprobes aarch64_insn_patch_text_cb(void *arg)

Quoted 6 lines

arch/arm64/kernel/insn.c +4 -2

-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this function
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_inc_return(&pp->cpu_count) == count) {

Actually, you can leave this hunk alone and leave the first CPU to do the patching.

arch/arm64/kernel/insn.c static int __kprobes aarch64_insn_patch_text_cb(void *arg) · line 169

Quoted 10 lines

arch/arm64/kernel/insn.c +1 -1

 		for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
 			ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
 							     pp->new_insns[i]);

@@ -163,9 +166,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notifiy other processors with an additional increment. */

Notify

arch/arm64/kernel/insn.c static int __kprobes aarch64_insn_patch_text_cb(void *arg) · line 173

Quoted 5 lines

arch/arm64/kernel/insn.c +2 -1

+		atomic_inc(&pp->cpu_count);
 	} else {
-		while (atomic_read(&pp->cpu_count) != -1)
+		while (atomic_read(&pp->cpu_count) <= count)
 			cpu_relax();

Then make this 'cpu_count <= num_online_cpus()'

Will

Quoted 12 lines · Will Deacon

Quoted 11 lines · William Cohen

arch/arm64/kernel/insn.c +1 -0

index e007714..4fdddf1 100644
@@ -151,10 +151,13 @@ struct aarch64_insn_patch {
 static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 {
 	int i, ret = 0;
+	int count = num_online_cpus();
 	struct aarch64_insn_patch *pp = arg;
 

Quoted 9 lines

arch/arm64/kernel/insn.c static int __kprobes aarch64_insn_patch_text_cb(void *arg)

Quoted 6 lines

arch/arm64/kernel/insn.c +4 -2

-	/* The first CPU becomes master */
-	if (atomic_inc_return(&pp->cpu_count) == 1) {
+	/* Make sure all the processors are in this function
+	   before patching the code. The last CPU to this function
+	   does the update. */
+	if (atomic_inc_return(&pp->cpu_count) == count) {

Actually, you can leave this hunk alone and leave the first CPU to do the patching.

If it doesn't matter which processor is doing the update, do the processors all need to wait for the last one to get to this function before continuing on? Or would it be acceptable to allow processors to continue once the first processor completes the patch operation? That could reduce the amount of time that processors spin waiting for other processors to enter arch64_insn_patch_text_cb.

Attached is a patch that addresses the current comment.

From 41c728aeee2185fd30ec6a8ba223a2caec875f47 Mon Sep 17 00:00:00 2001
From: William Cohen <[email protected]>
Date: Tue, 11 Nov 2014 09:41:27 -0500
Subject: [PATCH] Correct the race condition in aarch64_insn_patch_text_sync()

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and incrementing the cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The first processor to enter the patching function performs the patching and signals that the patching is complete with an increment of the cpu_count field. When all the processors have incremented the cpu_count field the cpu_count will be num_cpus_online()+1 and they will return to normal execution.

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

arch/arm64/kernel/insn.c +3 -2

index e007714..8cd27fe 100644
@@ -163,9 +163,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
 		 * which ends with "dsb; isb" pair guaranteeing global
 		 * visibility.
 		 */
-		atomic_set(&pp->cpu_count, -1);
+		/* Notify other processors with an additional increment. */
+		atomic_inc(&pp->cpu_count);
 	} else {
-		while (atomic_read(&pp->cpu_count) != -1)
+		while (atomic_read(&pp->cpu_count) <= num_online_cpus())
 			cpu_relax();
 		isb();
 	}

Signature · 1 line

1.8.3.1

Quoted 21 lines · William Cohen

From 41c728aeee2185fd30ec6a8ba223a2caec875f47 Mon Sep 17 00:00:00 2001
From: William Cohen <[email protected]>
Date: Tue, 11 Nov 2014 09:41:27 -0500
Subject: [PATCH] Correct the race condition in aarch64_insn_patch_text_sync()

When experimenting with patches to provide kprobes support for aarch64 smp machines would hang when inserting breakpoints into kernel code. The hangs were caused by a race condition in the code called by aarch64_insn_patch_text_sync(). The first processor in the aarch64_insn_patch_text_cb() function would patch the code while other processors were still entering the function and incrementing the cpu_count field. This resulted in some processors never observing the exit condition and exiting the function. Thus, processors in the system hung.

The first processor to enter the patching function performs the patching and signals that the patching is complete with an increment of the cpu_count field. When all the processors have incremented the cpu_count field the cpu_count will be num_cpus_online()+1 and they will return to normal execution.

Quoted 4 lines

Signed-off-by William Cohen <[email protected]>

---
 arch/arm64/kernel/insn.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Acked-by Will Deacon <[email protected]>

Catalin -- can you pick this into the fixes branch please?