Second Round of Renesas ARM Based SoC DT Updates for v3.19
Subsystems (3)
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC DT updates for v3.19.
This pull request is based on the previous round of such requests, tagged as renesas-dt-for-v3.19, which I have already sent a pull-request for.
The following changes since commit 25af9c83151822eb6d413b4d15d5f89804606ac7:
ARM: shmobile: r8a7779 dtsi: Add SoC-specific SATA compatible property (2014-10-30 10:01:37 +0900)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt2-for-v3.19
for you to fetch changes up to 2887bd4265cfbec6ccdd099c1728f82b4bebb69b:
ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs (2014-11-10 10:12:04 +0900)
----------------------------------------------------------------
Second Round of Renesas ARM Based SoC DT Updates for v3.19
* Add labels for LEDs on kzm9g-reference and koelsch
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add Sound DMA support to r8a7790/lager and r8a7791/koelsch
----------------------------------------------------------------
Geert Uytterhoeven (4):
ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: koelsch dts: Add labels for the LEDs
ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
Koji Matsuoka (1):
ARM: shmobile: r8a7794: Add VIN clock to device tree
Kuninori Morimoto (20):
ARM: shmobile: r8a7790: Add Audio DMAC devices to DT
ARM: shmobile: r8a7791: Add Audio DMAC devices to DT
ARM: shmobile: r8a7790: Add Audio DMAC peri peri devices to DT
ARM: shmobile: r8a7791: Add Audio DMAC peri peri devices to DT
ARM: shmobile: r8a7790: sound enables Audio DMAC entry on DTSI
ARM: shmobile: r8a7791: sound enables Audio DMAC entry on DTSI
ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
ARM: shmobile: r8a7791: sound enables Audio DMAC peri peri entry on DTSI
ARM: shmobile: lager: fixup IIC2 clock frequency
ARM: shmobile: lager: Sound PIO support on DTS
ARM: shmobile: lager: Sound DMA support on DTS
ARM: shmobile: lager: Sound DMA support via BUSIF on DTS
ARM: shmobile: lager: Sound DMA support via SRC on DTS
ARM: shmobile: lager: Sound DMA support via DVC on DTS
ARM: shmobile: koelsch: fixup I2C2 clock frequency
ARM: shmobile: koelsch: Sound PIO support on DTS
ARM: shmobile: koelsch: Sound DMA support on DTS
ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
arch/arm/boot/dts/r8a73a4.dtsi | 18 +-- arch/arm/boot/dts/r8a7790-lager.dts | 74 ++++++++++ arch/arm/boot/dts/r8a7790.dtsi | 203 ++++++++++++++++++++++++++- arch/arm/boot/dts/r8a7791-koelsch.dts | 77 +++++++++- arch/arm/boot/dts/r8a7791.dtsi | 202 +++++++++++++++++++++++++- arch/arm/boot/dts/r8a7794.dtsi | 6 +- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 4 + arch/arm/boot/dts/sh73a0.dtsi | 10 +- include/dt-bindings/clock/r8a7790-clock.h | 2 + include/dt-bindings/clock/r8a7791-clock.h | 2 + include/dt-bindings/clock/r8a7794-clock.h | 2 + 11 files changed, 576 insertions(+), 24 deletions(-)
PATCH 1/25 ARM: shmobile: r8a7794: Add VIN clock to device tree
From: Koji Matsuoka <[email protected]>
--- arch/arm/boot/dts/r8a7794.dtsi | 6 +++--- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7794.dtsi +3 -3
@@ -517,13 +517,13 @@ mstp8_clks: mstp8_clks at e6150990 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&p_clk>; + clocks = <&zg_clk>, <&zg_clk>, <&p_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7794_CLK_ETHER + R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER >; clock-output-names = - "ether"; + "vin1", "vin0", "ether"; }; mstp11_clks: mstp11_clks at e615099c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7794-clock.h +2 -0
@@ -61,6 +61,8 @@#define R8A7794_CLK_SCIF0 21/* MSTP8 */ +#define R8A7794_CLK_VIN1 10 +#define R8A7794_CLK_VIN0 11#define R8A7794_CLK_ETHER 13/* MSTP9 */
Signature · 1 line
2.1.1
PATCH 2/25 ARM: shmobile: r8a7790: Add Audio DMAC devices to DT
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Instantiate the two Audio DMA controllers in the r8a7790 device tree.
--- arch/arm/boot/dts/r8a7790.dtsi | 64 +++++++++++++++++++++++++++++-- include/dt-bindings/clock/r8a7790-clock.h | 2 + 2 files changed, 63 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7790.dtsi +61 -3
@@ -312,6 +312,63 @@ #dma-cells = <1>; dma-channels = <15>; }; + + audma0: dma-controller at ec700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH + 0 320 IRQ_TYPE_LEVEL_HIGH + 0 321 IRQ_TYPE_LEVEL_HIGH + 0 322 IRQ_TYPE_LEVEL_HIGH + 0 323 IRQ_TYPE_LEVEL_HIGH + 0 324 IRQ_TYPE_LEVEL_HIGH + 0 325 IRQ_TYPE_LEVEL_HIGH + 0 326 IRQ_TYPE_LEVEL_HIGH + 0 327 IRQ_TYPE_LEVEL_HIGH + 0 328 IRQ_TYPE_LEVEL_HIGH + 0 329 IRQ_TYPE_LEVEL_HIGH + 0 330 IRQ_TYPE_LEVEL_HIGH + 0 331 IRQ_TYPE_LEVEL_HIGH + 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + + audma1: dma-controller at ec720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH + 0 333 IRQ_TYPE_LEVEL_HIGH + 0 334 IRQ_TYPE_LEVEL_HIGH + 0 335 IRQ_TYPE_LEVEL_HIGH + 0 336 IRQ_TYPE_LEVEL_HIGH + 0 337 IRQ_TYPE_LEVEL_HIGH + 0 338 IRQ_TYPE_LEVEL_HIGH + 0 339 IRQ_TYPE_LEVEL_HIGH + 0 340 IRQ_TYPE_LEVEL_HIGH + 0 341 IRQ_TYPE_LEVEL_HIGH + 0 342 IRQ_TYPE_LEVEL_HIGH + 0 343 IRQ_TYPE_LEVEL_HIGH + 0 344 IRQ_TYPE_LEVEL_HIGH + 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + i2c0: i2c at e6508000 { #address-cells = <1>; #size-cells = <0>;
@@ -1050,10 +1107,11 @@ mstp5_clks: mstp5_clks at e6150144 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>; - clock-output-names = "thermal", "pwm"; + renesas,clock-indices = <R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 + R8A7790_CLK_THERMAL R8A7790_CLK_PWM>; + clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks at e615014c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7790-clock.h +2 -0
@@ -78,6 +78,8 @@#define R8A7790_CLK_USBDMAC1 31/* MSTP5 */ +#define R8A7790_CLK_AUDIO_DMAC1 1 +#define R8A7790_CLK_AUDIO_DMAC0 2#define R8A7790_CLK_THERMAL 22#define R8A7790_CLK_PWM 23
Signature · 1 line
2.1.1
PATCH 3/25 ARM: shmobile: r8a7791: Add Audio DMAC devices to DT
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Instantiate the two Audio DMA controllers in the r8a7791 device tree.
--- arch/arm/boot/dts/r8a7791.dtsi | 63 +++++++++++++++++++++++++++++-- include/dt-bindings/clock/r8a7791-clock.h | 2 + 2 files changed, 62 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +60 -3
@@ -301,6 +301,62 @@ dma-channels = <15>; }; + audma0: dma-controller at ec700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <0 346 IRQ_TYPE_LEVEL_HIGH + 0 320 IRQ_TYPE_LEVEL_HIGH + 0 321 IRQ_TYPE_LEVEL_HIGH + 0 322 IRQ_TYPE_LEVEL_HIGH + 0 323 IRQ_TYPE_LEVEL_HIGH + 0 324 IRQ_TYPE_LEVEL_HIGH + 0 325 IRQ_TYPE_LEVEL_HIGH + 0 326 IRQ_TYPE_LEVEL_HIGH + 0 327 IRQ_TYPE_LEVEL_HIGH + 0 328 IRQ_TYPE_LEVEL_HIGH + 0 329 IRQ_TYPE_LEVEL_HIGH + 0 330 IRQ_TYPE_LEVEL_HIGH + 0 331 IRQ_TYPE_LEVEL_HIGH + 0 332 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + + audma1: dma-controller at ec720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <0 347 IRQ_TYPE_LEVEL_HIGH + 0 333 IRQ_TYPE_LEVEL_HIGH + 0 334 IRQ_TYPE_LEVEL_HIGH + 0 335 IRQ_TYPE_LEVEL_HIGH + 0 336 IRQ_TYPE_LEVEL_HIGH + 0 337 IRQ_TYPE_LEVEL_HIGH + 0 338 IRQ_TYPE_LEVEL_HIGH + 0 339 IRQ_TYPE_LEVEL_HIGH + 0 340 IRQ_TYPE_LEVEL_HIGH + 0 341 IRQ_TYPE_LEVEL_HIGH + 0 342 IRQ_TYPE_LEVEL_HIGH + 0 343 IRQ_TYPE_LEVEL_HIGH + 0 344 IRQ_TYPE_LEVEL_HIGH + 0 345 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12"; + clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <13>; + }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c at e6508000 { #address-cells = <1>;
@@ -1053,10 +1109,11 @@ mstp5_clks: mstp5_clks at e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal_clk>, <&p_clk>; + clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = <R8A7791_CLK_THERMAL R8A7791_CLK_PWM>; - clock-output-names = "thermal", "pwm"; + renesas,clock-indices = <R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 + R8A7791_CLK_THERMAL R8A7791_CLK_PWM>; + clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks at e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7791-clock.h +2 -0
@@ -69,6 +69,8 @@#define R8A7791_CLK_USBDMAC1 31/* MSTP5 */ +#define R8A7791_CLK_AUDIO_DMAC1 1 +#define R8A7791_CLK_AUDIO_DMAC0 2#define R8A7791_CLK_THERMAL 22#define R8A7791_CLK_PWM 23
Signature · 1 line
2.1.1
PATCH 4/25 ARM: shmobile: r8a7790: Add Audio DMAC peri peri devices to DT
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Instantiate the Audio DMAC peri peri controllers
in the r8a7790 device tree.
--- arch/arm/boot/dts/r8a7790.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/r8a7790.dtsi +7 -0
@@ -369,6 +369,13 @@ dma-channels = <13>; }; + audmapp: dma-controller at ec740000 { + compatible = "renesas,rcar-audmapp"; + #dma-cells = <1>; + + reg = <0 0xec740000 0 0x200>; + }; + i2c0: i2c at e6508000 { #address-cells = <1>; #size-cells = <0>;
Signature · 1 line
2.1.1
PATCH 5/25 ARM: shmobile: r8a7791: Add Audio DMAC peri peri devices to DT
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Instantiate the Audio DMAC peri peri controllers
in the r8a7791 device tree.
--- arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/r8a7791.dtsi +7 -0
@@ -357,6 +357,13 @@ dma-channels = <13>; }; + audmapp: dma-controller at ec740000 { + compatible = "renesas,rcar-audmapp"; + #dma-cells = <1>; + + reg = <0 0xec740000 0 0x200>; + }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c at e6508000 { #address-cells = <1>;
Signature · 1 line
2.1.1
PATCH 6/25 ARM: shmobile: r8a7790: sound enables Audio DMAC entry on DTSI
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
arch/arm/boot/dts/r8a7790.dtsi +44 -0
@@ -1417,6 +1417,50 @@ "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; + dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>, + <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>, + <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>, + <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>, + <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>, + <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>, + <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>, + <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>, + <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>, + <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>, + + <&audma0 0x85>, <&audma1 0x9a>, <&audma0 0xbc>, + <&audma0 0x87>, <&audma1 0x9c>, <&audma0 0xbe>, + <&audma0 0x89>, <&audma1 0x9e>, + <&audma0 0x8b>, <&audma1 0xa0>, + <&audma0 0x8d>, <&audma1 0xb0>, + <&audma0 0x8f>, <&audma1 0xb2>, + <&audma0 0x91>, <&audma1 0xb4>, + <&audma0 0x93>, <&audma1 0xb6>, + <&audma0 0x95>, <&audma1 0xb8>, + <&audma0 0x97>, <&audma1 0xba>; + + dma-names = "mem_ssi0", "ssi0_mem", "mem_ssiu0", "ssiu0_mem", + "mem_ssi1", "ssi1_mem", "mem_ssiu1", "ssiu1_mem", + "mem_ssi2", "ssi2_mem", "mem_ssiu2", "ssiu2_mem", + "mem_ssi3", "ssi3_mem", "mem_ssiu3", "ssiu3_mem", + "mem_ssi4", "ssi4_mem", "mem_ssiu4", "ssiu4_mem", + "mem_ssi5", "ssi5_mem", "mem_ssiu5", "ssiu5_mem", + "mem_ssi6", "ssi6_mem", "mem_ssiu6", "ssiu6_mem", + "mem_ssi7", "ssi7_mem", "mem_ssiu7", "ssiu7_mem", + "mem_ssi8", "ssi8_mem", "mem_ssiu8", "ssiu8_mem", + "mem_ssi9", "ssi9_mem", "mem_ssiu9", "ssiu9_mem", + + "mem_src0", "src0_mem", "dvc0_mem", + "mem_src1", "src1_mem", "dvc1_mem", + "mem_src2", "src2_mem", + "mem_src3", "src3_mem", + "mem_src4", "src4_mem", + "mem_src5", "src5_mem", + "mem_src6", "src6_mem", + "mem_src7", "src7_mem", + "mem_src8", "src8_mem", + "mem_src9", "src9_mem"; + status = "disabled"; rcar_sound,dvc {
Signature · 1 line
2.1.1
PATCH 7/25 ARM: shmobile: r8a7791: sound enables Audio DMAC entry on DTSI
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7791.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
arch/arm/boot/dts/r8a7791.dtsi +44 -0
@@ -1399,6 +1399,50 @@ "dvc.0", "dvc.1", "clk_a", "clk_b", "clk_c", "clk_i"; + dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>, + <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>, + <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>, + <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>, + <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>, + <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>, + <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>, + <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>, + <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>, + <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>, + + <&audma0 0x85>, <&audma1 0x9a>, <&audma0 0xbc>, + <&audma0 0x87>, <&audma1 0x9c>, <&audma0 0xbe>, + <&audma0 0x89>, <&audma1 0x9e>, + <&audma0 0x8b>, <&audma1 0xa0>, + <&audma0 0x8d>, <&audma1 0xb0>, + <&audma0 0x8f>, <&audma1 0xb2>, + <&audma0 0x91>, <&audma1 0xb4>, + <&audma0 0x93>, <&audma1 0xb6>, + <&audma0 0x95>, <&audma1 0xb8>, + <&audma0 0x97>, <&audma1 0xba>; + + dma-names = "mem_ssi0", "ssi0_mem", "mem_ssiu0", "ssiu0_mem", + "mem_ssi1", "ssi1_mem", "mem_ssiu1", "ssiu1_mem", + "mem_ssi2", "ssi2_mem", "mem_ssiu2", "ssiu2_mem", + "mem_ssi3", "ssi3_mem", "mem_ssiu3", "ssiu3_mem", + "mem_ssi4", "ssi4_mem", "mem_ssiu4", "ssiu4_mem", + "mem_ssi5", "ssi5_mem", "mem_ssiu5", "ssiu5_mem", + "mem_ssi6", "ssi6_mem", "mem_ssiu6", "ssiu6_mem", + "mem_ssi7", "ssi7_mem", "mem_ssiu7", "ssiu7_mem", + "mem_ssi8", "ssi8_mem", "mem_ssiu8", "ssiu8_mem", + "mem_ssi9", "ssi9_mem", "mem_ssiu9", "ssiu9_mem", + + "mem_src0", "src0_mem", "dvc0_mem", + "mem_src1", "src1_mem", "dvc1_mem", + "mem_src2", "src2_mem", + "mem_src3", "src3_mem", + "mem_src4", "src4_mem", + "mem_src5", "src5_mem", + "mem_src6", "src6_mem", + "mem_src7", "src7_mem", + "mem_src8", "src8_mem", + "mem_src9", "src9_mem"; + status = "disabled"; rcar_sound,dvc {
Signature · 1 line
2.1.1
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7790.dtsi | 92 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7790.dtsi +90 -2
@@ -1437,7 +1437,51 @@ <&audma0 0x91>, <&audma1 0xb4>, <&audma0 0x93>, <&audma1 0xb6>, <&audma0 0x95>, <&audma1 0xb8>, - <&audma0 0x97>, <&audma1 0xba>; + <&audma0 0x97>, <&audma1 0xba>, + + <&audmapp 0x2d00>, <&audmapp 0x2e00>, <&audmapp 0x2f00>, <&audmapp 0x3000>, <&audmapp 0x3100>, + <&audmapp 0x2d04>, <&audmapp 0x2e04>, <&audmapp 0x2f04>, <&audmapp 0x3004>, <&audmapp 0x3104>, + <&audmapp 0x2d08>, <&audmapp 0x2e08>, <&audmapp 0x2f08>, <&audmapp 0x3008>, <&audmapp 0x3108>, + <&audmapp 0x2d0c>, <&audmapp 0x2e0c>, <&audmapp 0x2f0c>, <&audmapp 0x300c>, <&audmapp 0x310c>, + <&audmapp 0x2d0d>, <&audmapp 0x2e0d>, <&audmapp 0x2f0d>, <&audmapp 0x300d>, <&audmapp 0x310d>, + <&audmapp 0x2d0e>, <&audmapp 0x2e0e>, <&audmapp 0x2f0e>, <&audmapp 0x300e>, <&audmapp 0x310e>, + <&audmapp 0x2d0f>, <&audmapp 0x2e0f>, <&audmapp 0x2f0f>, <&audmapp 0x300f>, <&audmapp 0x310f>, + <&audmapp 0x2d10>, <&audmapp 0x2e10>, <&audmapp 0x2f10>, <&audmapp 0x3010>, <&audmapp 0x3110>, + <&audmapp 0x2d11>, <&audmapp 0x2e11>, <&audmapp 0x2f11>, <&audmapp 0x3011>, <&audmapp 0x3111>, + <&audmapp 0x2d12>, <&audmapp 0x2e12>, <&audmapp 0x2f12>, <&audmapp 0x3012>, <&audmapp 0x3112>, + + <&audmapp 0x3200>, <&audmapp 0x3300>, <&audmapp 0x3400>, <&audmapp 0x3500>, <&audmapp 0x3600>, + <&audmapp 0x3204>, <&audmapp 0x3304>, <&audmapp 0x3404>, <&audmapp 0x3504>, <&audmapp 0x3604>, + <&audmapp 0x3208>, <&audmapp 0x3308>, <&audmapp 0x3408>, <&audmapp 0x3508>, <&audmapp 0x3608>, + <&audmapp 0x320c>, <&audmapp 0x330c>, <&audmapp 0x340c>, <&audmapp 0x350c>, <&audmapp 0x360c>, + <&audmapp 0x320d>, <&audmapp 0x330d>, <&audmapp 0x340d>, <&audmapp 0x350d>, <&audmapp 0x360d>, + <&audmapp 0x320e>, <&audmapp 0x330e>, <&audmapp 0x340e>, <&audmapp 0x350e>, <&audmapp 0x360e>, + <&audmapp 0x320f>, <&audmapp 0x330f>, <&audmapp 0x340f>, <&audmapp 0x350f>, <&audmapp 0x360f>, + <&audmapp 0x3210>, <&audmapp 0x3310>, <&audmapp 0x3410>, <&audmapp 0x3510>, <&audmapp 0x3610>, + <&audmapp 0x3211>, <&audmapp 0x3311>, <&audmapp 0x3411>, <&audmapp 0x3511>, <&audmapp 0x3611>, + <&audmapp 0x3212>, <&audmapp 0x3312>, <&audmapp 0x3412>, <&audmapp 0x3512>, <&audmapp 0x3612>, + + <&audmapp 0x002d>, <&audmapp 0x002e>, <&audmapp 0x002f>, <&audmapp 0x0030>, <&audmapp 0x0031>, + <&audmapp 0x042d>, <&audmapp 0x042e>, <&audmapp 0x042f>, <&audmapp 0x0430>, <&audmapp 0x0431>, + <&audmapp 0x082d>, <&audmapp 0x082e>, <&audmapp 0x082f>, <&audmapp 0x0830>, <&audmapp 0x0831>, + <&audmapp 0x0c2d>, <&audmapp 0x0c2e>, <&audmapp 0x0c2f>, <&audmapp 0x0c30>, <&audmapp 0x0c31>, + <&audmapp 0x0d2d>, <&audmapp 0x0d2e>, <&audmapp 0x0d2f>, <&audmapp 0x0d30>, <&audmapp 0x0d31>, + <&audmapp 0x0e2d>, <&audmapp 0x0e2e>, <&audmapp 0x0e2f>, <&audmapp 0x0e30>, <&audmapp 0x0e31>, + <&audmapp 0x0f2d>, <&audmapp 0x0f2e>, <&audmapp 0x0f2f>, <&audmapp 0x0f30>, <&audmapp 0x0f31>, + <&audmapp 0x102d>, <&audmapp 0x102e>, <&audmapp 0x102f>, <&audmapp 0x1030>, <&audmapp 0x1031>, + <&audmapp 0x112d>, <&audmapp 0x112e>, <&audmapp 0x112f>, <&audmapp 0x1130>, <&audmapp 0x1131>, + <&audmapp 0x122d>, <&audmapp 0x122e>, <&audmapp 0x122f>, <&audmapp 0x1230>, <&audmapp 0x1231>, + + <&audmapp 0x0032>, <&audmapp 0x0033>, <&audmapp 0x0034>, <&audmapp 0x0035>, <&audmapp 0x0036>, + <&audmapp 0x0432>, <&audmapp 0x0433>, <&audmapp 0x0434>, <&audmapp 0x0435>, <&audmapp 0x0436>, + <&audmapp 0x0832>, <&audmapp 0x0833>, <&audmapp 0x0834>, <&audmapp 0x0835>, <&audmapp 0x0836>, + <&audmapp 0x0c32>, <&audmapp 0x0c33>, <&audmapp 0x0c34>, <&audmapp 0x0c35>, <&audmapp 0x0c36>, + <&audmapp 0x0d32>, <&audmapp 0x0d33>, <&audmapp 0x0d34>, <&audmapp 0x0d35>, <&audmapp 0x0d36>, + <&audmapp 0x0e32>, <&audmapp 0x0e33>, <&audmapp 0x0e34>, <&audmapp 0x0e35>, <&audmapp 0x0e36>, + <&audmapp 0x0f32>, <&audmapp 0x0f33>, <&audmapp 0x0f34>, <&audmapp 0x0f35>, <&audmapp 0x0f36>, + <&audmapp 0x1032>, <&audmapp 0x1033>, <&audmapp 0x1034>, <&audmapp 0x1035>, <&audmapp 0x1036>, + <&audmapp 0x1132>, <&audmapp 0x1133>, <&audmapp 0x1134>, <&audmapp 0x1135>, <&audmapp 0x1136>, + <&audmapp 0x1232>, <&audmapp 0x1233>, <&audmapp 0x1234>, <&audmapp 0x1235>, <&audmapp 0x1236>; dma-names = "mem_ssi0", "ssi0_mem", "mem_ssiu0", "ssiu0_mem", "mem_ssi1", "ssi1_mem", "mem_ssiu1", "ssiu1_mem",
@@ -1459,7 +1503,51 @@ "mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem", - "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2", + "src0_ssiu3", "src1_ssiu3", "src2_ssiu3", "src3_ssiu3", "src4_ssiu3", + "src0_ssiu4", "src1_ssiu4", "src2_ssiu4", "src3_ssiu4", "src4_ssiu4", + "src0_ssiu5", "src1_ssiu5", "src2_ssiu5", "src3_ssiu5", "src4_ssiu5", + "src0_ssiu6", "src1_ssiu6", "src2_ssiu6", "src3_ssiu6", "src4_ssiu6", + "src0_ssiu7", "src1_ssiu7", "src2_ssiu7", "src3_ssiu7", "src4_ssiu7", + "src0_ssiu8", "src1_ssiu8", "src2_ssiu8", "src3_ssiu8", "src4_ssiu8", + "src0_ssiu9", "src1_ssiu9", "src2_ssiu9", "src3_ssiu9", "src4_ssiu9", + + "src5_ssiu0", "src6_ssiu0", "src7_ssiu0", "src8_ssiu0", "src9_ssiu0", + "src5_ssiu1", "src6_ssiu1", "src7_ssiu1", "src8_ssiu1", "src9_ssiu1", + "src5_ssiu2", "src6_ssiu2", "src7_ssiu2", "src8_ssiu2", "src9_ssiu2", + "src5_ssiu3", "src6_ssiu3", "src7_ssiu3", "src8_ssiu3", "src9_ssiu3", + "src5_ssiu4", "src6_ssiu4", "src7_ssiu4", "src8_ssiu4", "src9_ssiu4", + "src5_ssiu5", "src6_ssiu5", "src7_ssiu5", "src8_ssiu5", "src9_ssiu5", + "src5_ssiu6", "src6_ssiu6", "src7_ssiu6", "src8_ssiu6", "src9_ssiu6", + "src5_ssiu7", "src6_ssiu7", "src7_ssiu7", "src8_ssiu7", "src9_ssiu7", + "src5_ssiu8", "src6_ssiu8", "src7_ssiu8", "src8_ssiu8", "src9_ssiu8", + "src5_ssiu9", "src6_ssiu9", "src7_ssiu9", "src8_ssiu9", "src9_ssiu9", + + "ssiu0_src0", "ssiu0_src1", "ssiu0_src2", "ssiu0_src3", "ssiu0_src4", + "ssiu1_src0", "ssiu1_src1", "ssiu1_src2", "ssiu1_src3", "ssiu1_src4", + "ssiu2_src0", "ssiu2_src1", "ssiu2_src2", "ssiu2_src3", "ssiu2_src4", + "ssiu3_src0", "ssiu3_src1", "ssiu3_src2", "ssiu3_src3", "ssiu3_src4", + "ssiu4_src0", "ssiu4_src1", "ssiu4_src2", "ssiu4_src3", "ssiu4_src4", + "ssiu5_src0", "ssiu5_src1", "ssiu5_src2", "ssiu5_src3", "ssiu5_src4", + "ssiu6_src0", "ssiu6_src1", "ssiu6_src2", "ssiu6_src3", "ssiu6_src4", + "ssiu7_src0", "ssiu7_src1", "ssiu7_src2", "ssiu7_src3", "ssiu7_src4", + "ssiu8_src0", "ssiu8_src1", "ssiu8_src2", "ssiu8_src3", "ssiu8_src4", + "ssiu9_src0", "ssiu9_src1", "ssiu9_src2", "ssiu9_src3", "ssiu9_src4", + + "ssiu0_src5", "ssiu0_src6", "ssiu0_src7", "ssiu0_src8", "ssiu0_src9", + "ssiu1_src5", "ssiu1_src6", "ssiu1_src7", "ssiu1_src8", "ssiu1_src9", + "ssiu2_src5", "ssiu2_src6", "ssiu2_src7", "ssiu2_src8", "ssiu2_src9", + "ssiu3_src5", "ssiu3_src6", "ssiu3_src7", "ssiu3_src8", "ssiu3_src9", + "ssiu4_src5", "ssiu4_src6", "ssiu4_src7", "ssiu4_src8", "ssiu4_src9", + "ssiu5_src5", "ssiu5_src6", "ssiu5_src7", "ssiu5_src8", "ssiu5_src9", + "ssiu6_src5", "ssiu6_src6", "ssiu6_src7", "ssiu6_src8", "ssiu6_src9", + "ssiu7_src5", "ssiu7_src6", "ssiu7_src7", "ssiu7_src8", "ssiu7_src9", + "ssiu8_src5", "ssiu8_src6", "ssiu8_src7", "ssiu8_src8", "ssiu8_src9", + "ssiu9_src5", "ssiu9_src6", "ssiu9_src7", "ssiu9_src8", "ssiu9_src9"; status = "disabled";
Signature · 1 line
2.1.1
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
arch/arm/boot/dts/r8a7790.dtsi line 1510
Quoted 10 lines · On Thursday 13 November 2014 10:19:59 Simon Horman wrote:
"mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem",arch/arm/boot/dts/r8a7790.dtsi +5
-1- "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2",
I have to note that this looks rather weird and that none of the names are documented in the binding.
Can you explain why this device uses over 100 DMA channels and put the exact naming rules into the binding?
Do you expect all channels to be in use simultaneously?
Arnd
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Hi Arnd
Quoted 11 lines
arch/arm/boot/dts/r8a7790.dtsi line 1510
Quoted 10 lines
"mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem",arch/arm/boot/dts/r8a7790.dtsi +5
-1- "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2",
Quoted 6 lines
I have to note that this looks rather weird and that none of the names are documented in the binding.
Can you explain why this device uses over 100 DMA channels and put the exact naming rules into the binding?
Do you expect all channels to be in use simultaneously?
This device has 10 sound channels, and using 3 kind of IPs. Then, data input/output needs DMA channel which needs specific ID to using. Above name has ID pair for it, so there is much combination. These specific ID is based on SoC, not board.
Sound driver / DMAEngine can get specific ID from above.
Indeed binding itself was not documented yet.
I will add it ASAP.
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Quoted 21 lines · Kuninori Morimoto
Hi Arnd
Quoted 11 lines
arch/arm/boot/dts/r8a7790.dtsi line 1510
Quoted 10 lines
"mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem",arch/arm/boot/dts/r8a7790.dtsi +5
-1- "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2",Quoted 6 lines
I have to note that this looks rather weird and that none of the names are documented in the binding.
Can you explain why this device uses over 100 DMA channels and put the exact naming rules into the binding?
Do you expect all channels to be in use simultaneously?
Quoted 8 lines
This device has 10 sound channels, and using 3 kind of IPs. Then, data input/output needs DMA channel which needs specific ID to using. Above name has ID pair for it, so there is much combination. These specific ID is based on SoC, not board.
Sound driver / DMAEngine can get specific ID from above.Indeed binding itself was not documented yet.
I will add it ASAP.
Hi Arnd,
please let me know if a revised pull-request is in order. v3.18-rc6 is getting awfully close.
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Quoted 5 lines · On Tuesday 18 November 2014 09:50:40 Simon Horman wrote:
Hi Arnd,
please let me know if a revised pull-request is in order. v3.18-rc6 is getting awfully close.
Yes, I would prefer if you could leave out patches 6 to 9 for now. I assume we can work it out in time, and then you can send a follow-up with the new version.
Arnd
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Quoted 10 lines · Arnd Bergmann
Quoted 5 lines · On Tuesday 18 November 2014 09:50:40 Simon Horman wrote:
Hi Arnd,
please let me know if a revised pull-request is in order. v3.18-rc6 is getting awfully close.
Yes, I would prefer if you could leave out patches 6 to 9 for now. I assume we can work it out in time, and then you can send a follow-up with the new version.
Sure, will do.
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
In reply to Kuninori MorimotoQuoted 20 lines · On Tuesday 18 November 2014 00:03:50 Kuninori Morimoto wrote:
Hi Arnd
Quoted 11 lines
arch/arm/boot/dts/r8a7790.dtsi line 1510
Quoted 10 lines
"mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem",arch/arm/boot/dts/r8a7790.dtsi +5
-1- "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2",Quoted 6 lines
I have to note that this looks rather weird and that none of the names are documented in the binding.
Can you explain why this device uses over 100 DMA channels and put the exact naming rules into the binding?
Do you expect all channels to be in use simultaneously?
Quoted 8 lines
This device has 10 sound channels, and using 3 kind of IPs. Then, data input/output needs DMA channel which needs specific ID to using. Above name has ID pair for it, so there is much combination. These specific ID is based on SoC, not board.
Sound driver / DMAEngine can get specific ID from above.Indeed binding itself was not documented yet.
I will add it ASAP.
It sounds like you have some device-to-device DMAs here, which isn't supported by the generic dmaengine binding at all, and I don't think the driver currently attempts to use them.
Is that correct? Could you try to remove those from the binding and just leave the device-to-memory and memory-to-device channels there? If we ever want to support those, we probably have to extend the dmaengine binding first, and then the driver binding would also look different.
Arnd
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Hi Arnd
Quoted 13 lines
Quoted 8 lines
This device has 10 sound channels, and using 3 kind of IPs. Then, data input/output needs DMA channel which needs specific ID to using. Above name has ID pair for it, so there is much combination. These specific ID is based on SoC, not board.
Sound driver / DMAEngine can get specific ID from above.Indeed binding itself was not documented yet.
I will add it ASAP.It sounds like you have some device-to-device DMAs here, which isn't supported by the generic dmaengine binding at all, and I don't think the driver currently attempts to use them.
Quoted 5 lines
Is that correct? Could you try to remove those from the binding and just leave the device-to-memory and memory-to-device channels there? If we ever want to support those, we probably have to extend the dmaengine binding first, and then the driver binding would also look different.
It depends sound data path. basically, sound data goes memory-to-device
or device-to-memory. but, it needs special IP if you want to use special effect. In such case, sound data path will be memory-to-device-to-device, or device-to-device-to-memory. This path based on board, and, our reference board is using above path.
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
Hi Arnd, again
Quoted 19 lines
Quoted 13 lines
Quoted 8 lines
This device has 10 sound channels, and using 3 kind of IPs. Then, data input/output needs DMA channel which needs specific ID to using. Above name has ID pair for it, so there is much combination. These specific ID is based on SoC, not board.
Sound driver / DMAEngine can get specific ID from above.Indeed binding itself was not documented yet.
I will add it ASAP.It sounds like you have some device-to-device DMAs here, which isn't supported by the generic dmaengine binding at all, and I don't think the driver currently attempts to use them.
Quoted 5 lines
Is that correct? Could you try to remove those from the binding and just leave the device-to-memory and memory-to-device channels there? If we ever want to support those, we probably have to extend the dmaengine binding first, and then the driver binding would also look different.
Quoted 4 lines
It depends sound data path. basically, sound data goes memory-to-device
or device-to-memory. but, it needs special IP if you want to use special effect. In such case, sound data path will be memory-to-device-to-device, or device-to-device-to-memory. This path based on board, and, our reference board is using above path.
memory-to-device-to-device case, it is indeed using memory-to-device and device-to-device. But, DMAEngine point of view, above device-to-device interface/style is same as memory-to-device.
memory-to-device case needs ID + "memory address" + "register address".
device-to-device case needs ID + "register address" + "register address".
It is implemented in ${LINUX}/drivers/dma/sh/rcar-audmapp.c,
and used from ${LINUX}/sound/soc/sh/rcar/core.c with generic dmaengine interface/binding.
Best regards
---
Kuninori Morimoto
PATCH 8/25 ARM: shmobile: r8a7790: sound enables Audio DMAC peri peri entry on DTSI
In reply to Arnd BergmannHi Arnd
Quoted 9 lines
Quoted 9 lines
Quoted 9 lines
Quoted 9 lines
"mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem",arch/arm/boot/dts/r8a7790.dtsi +5
-1- "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2",
(snip)
Quoted 9 lines
It sounds like you have some device-to-device DMAs here, which isn't supported by the generic dmaengine binding at all, and I don't think the driver currently attempts to use them.
Is that correct? Could you try to remove those from the binding and just leave the device-to-memory and memory-to-device channels there? If we ever want to support those, we probably have to extend the dmaengine binding first, and then the driver binding would also look different.
Indeed it is needed for device-to-device DMA transfer,
but, it is using generic dmaengine style.
(see linux/sound/soc/sh/rcar/core.c, linux/drivers/dma/sh/rcar-audmapp.c) If I exchange dmaengine binding style for device-to-device,
I need to change both dmaengine driver and sound driver.
But, I want to know why I should do it ?
Indeed it needs many DMA binding entries now, but, it is using normal dmaengine bindings.
PATCH 9/25 ARM: shmobile: r8a7791: sound enables Audio DMAC peri peri entry on DTSI
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7791.dtsi | 92 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +90 -2
@@ -1419,7 +1419,51 @@ <&audma0 0x91>, <&audma1 0xb4>, <&audma0 0x93>, <&audma1 0xb6>, <&audma0 0x95>, <&audma1 0xb8>, - <&audma0 0x97>, <&audma1 0xba>; + <&audma0 0x97>, <&audma1 0xba>, + + <&audmapp 0x2d00>, <&audmapp 0x2e00>, <&audmapp 0x2f00>, <&audmapp 0x3000>, <&audmapp 0x3100>, + <&audmapp 0x2d04>, <&audmapp 0x2e04>, <&audmapp 0x2f04>, <&audmapp 0x3004>, <&audmapp 0x3104>, + <&audmapp 0x2d08>, <&audmapp 0x2e08>, <&audmapp 0x2f08>, <&audmapp 0x3008>, <&audmapp 0x3108>, + <&audmapp 0x2d0c>, <&audmapp 0x2e0c>, <&audmapp 0x2f0c>, <&audmapp 0x300c>, <&audmapp 0x310c>, + <&audmapp 0x2d0d>, <&audmapp 0x2e0d>, <&audmapp 0x2f0d>, <&audmapp 0x300d>, <&audmapp 0x310d>, + <&audmapp 0x2d0e>, <&audmapp 0x2e0e>, <&audmapp 0x2f0e>, <&audmapp 0x300e>, <&audmapp 0x310e>, + <&audmapp 0x2d0f>, <&audmapp 0x2e0f>, <&audmapp 0x2f0f>, <&audmapp 0x300f>, <&audmapp 0x310f>, + <&audmapp 0x2d10>, <&audmapp 0x2e10>, <&audmapp 0x2f10>, <&audmapp 0x3010>, <&audmapp 0x3110>, + <&audmapp 0x2d11>, <&audmapp 0x2e11>, <&audmapp 0x2f11>, <&audmapp 0x3011>, <&audmapp 0x3111>, + <&audmapp 0x2d12>, <&audmapp 0x2e12>, <&audmapp 0x2f12>, <&audmapp 0x3012>, <&audmapp 0x3112>, + + <&audmapp 0x3200>, <&audmapp 0x3300>, <&audmapp 0x3400>, <&audmapp 0x3500>, <&audmapp 0x3600>, + <&audmapp 0x3204>, <&audmapp 0x3304>, <&audmapp 0x3404>, <&audmapp 0x3504>, <&audmapp 0x3604>, + <&audmapp 0x3208>, <&audmapp 0x3308>, <&audmapp 0x3408>, <&audmapp 0x3508>, <&audmapp 0x3608>, + <&audmapp 0x320c>, <&audmapp 0x330c>, <&audmapp 0x340c>, <&audmapp 0x350c>, <&audmapp 0x360c>, + <&audmapp 0x320d>, <&audmapp 0x330d>, <&audmapp 0x340d>, <&audmapp 0x350d>, <&audmapp 0x360d>, + <&audmapp 0x320e>, <&audmapp 0x330e>, <&audmapp 0x340e>, <&audmapp 0x350e>, <&audmapp 0x360e>, + <&audmapp 0x320f>, <&audmapp 0x330f>, <&audmapp 0x340f>, <&audmapp 0x350f>, <&audmapp 0x360f>, + <&audmapp 0x3210>, <&audmapp 0x3310>, <&audmapp 0x3410>, <&audmapp 0x3510>, <&audmapp 0x3610>, + <&audmapp 0x3211>, <&audmapp 0x3311>, <&audmapp 0x3411>, <&audmapp 0x3511>, <&audmapp 0x3611>, + <&audmapp 0x3212>, <&audmapp 0x3312>, <&audmapp 0x3412>, <&audmapp 0x3512>, <&audmapp 0x3612>, + + <&audmapp 0x002d>, <&audmapp 0x002e>, <&audmapp 0x002f>, <&audmapp 0x0030>, <&audmapp 0x0031>, + <&audmapp 0x042d>, <&audmapp 0x042e>, <&audmapp 0x042f>, <&audmapp 0x0430>, <&audmapp 0x0431>, + <&audmapp 0x082d>, <&audmapp 0x082e>, <&audmapp 0x082f>, <&audmapp 0x0830>, <&audmapp 0x0831>, + <&audmapp 0x0c2d>, <&audmapp 0x0c2e>, <&audmapp 0x0c2f>, <&audmapp 0x0c30>, <&audmapp 0x0c31>, + <&audmapp 0x0d2d>, <&audmapp 0x0d2e>, <&audmapp 0x0d2f>, <&audmapp 0x0d30>, <&audmapp 0x0d31>, + <&audmapp 0x0e2d>, <&audmapp 0x0e2e>, <&audmapp 0x0e2f>, <&audmapp 0x0e30>, <&audmapp 0x0e31>, + <&audmapp 0x0f2d>, <&audmapp 0x0f2e>, <&audmapp 0x0f2f>, <&audmapp 0x0f30>, <&audmapp 0x0f31>, + <&audmapp 0x102d>, <&audmapp 0x102e>, <&audmapp 0x102f>, <&audmapp 0x1030>, <&audmapp 0x1031>, + <&audmapp 0x112d>, <&audmapp 0x112e>, <&audmapp 0x112f>, <&audmapp 0x1130>, <&audmapp 0x1131>, + <&audmapp 0x122d>, <&audmapp 0x122e>, <&audmapp 0x122f>, <&audmapp 0x1230>, <&audmapp 0x1231>, + + <&audmapp 0x0032>, <&audmapp 0x0033>, <&audmapp 0x0034>, <&audmapp 0x0035>, <&audmapp 0x0036>, + <&audmapp 0x0432>, <&audmapp 0x0433>, <&audmapp 0x0434>, <&audmapp 0x0435>, <&audmapp 0x0436>, + <&audmapp 0x0832>, <&audmapp 0x0833>, <&audmapp 0x0834>, <&audmapp 0x0835>, <&audmapp 0x0836>, + <&audmapp 0x0c32>, <&audmapp 0x0c33>, <&audmapp 0x0c34>, <&audmapp 0x0c35>, <&audmapp 0x0c36>, + <&audmapp 0x0d32>, <&audmapp 0x0d33>, <&audmapp 0x0d34>, <&audmapp 0x0d35>, <&audmapp 0x0d36>, + <&audmapp 0x0e32>, <&audmapp 0x0e33>, <&audmapp 0x0e34>, <&audmapp 0x0e35>, <&audmapp 0x0e36>, + <&audmapp 0x0f32>, <&audmapp 0x0f33>, <&audmapp 0x0f34>, <&audmapp 0x0f35>, <&audmapp 0x0f36>, + <&audmapp 0x1032>, <&audmapp 0x1033>, <&audmapp 0x1034>, <&audmapp 0x1035>, <&audmapp 0x1036>, + <&audmapp 0x1132>, <&audmapp 0x1133>, <&audmapp 0x1134>, <&audmapp 0x1135>, <&audmapp 0x1136>, + <&audmapp 0x1232>, <&audmapp 0x1233>, <&audmapp 0x1234>, <&audmapp 0x1235>, <&audmapp 0x1236>; dma-names = "mem_ssi0", "ssi0_mem", "mem_ssiu0", "ssiu0_mem", "mem_ssi1", "ssi1_mem", "mem_ssiu1", "ssiu1_mem",
@@ -1441,7 +1485,51 @@ "mem_src6", "src6_mem", "mem_src7", "src7_mem", "mem_src8", "src8_mem", - "mem_src9", "src9_mem"; + "mem_src9", "src9_mem", + + "src0_ssiu0", "src1_ssiu0", "src2_ssiu0", "src3_ssiu0", "src4_ssiu0", + "src0_ssiu1", "src1_ssiu1", "src2_ssiu1", "src3_ssiu1", "src4_ssiu1", + "src0_ssiu2", "src1_ssiu2", "src2_ssiu2", "src3_ssiu2", "src4_ssiu2", + "src0_ssiu3", "src1_ssiu3", "src2_ssiu3", "src3_ssiu3", "src4_ssiu3", + "src0_ssiu4", "src1_ssiu4", "src2_ssiu4", "src3_ssiu4", "src4_ssiu4", + "src0_ssiu5", "src1_ssiu5", "src2_ssiu5", "src3_ssiu5", "src4_ssiu5", + "src0_ssiu6", "src1_ssiu6", "src2_ssiu6", "src3_ssiu6", "src4_ssiu6", + "src0_ssiu7", "src1_ssiu7", "src2_ssiu7", "src3_ssiu7", "src4_ssiu7", + "src0_ssiu8", "src1_ssiu8", "src2_ssiu8", "src3_ssiu8", "src4_ssiu8", + "src0_ssiu9", "src1_ssiu9", "src2_ssiu9", "src3_ssiu9", "src4_ssiu9", + + "src5_ssiu0", "src6_ssiu0", "src7_ssiu0", "src8_ssiu0", "src9_ssiu0", + "src5_ssiu1", "src6_ssiu1", "src7_ssiu1", "src8_ssiu1", "src9_ssiu1", + "src5_ssiu2", "src6_ssiu2", "src7_ssiu2", "src8_ssiu2", "src9_ssiu2", + "src5_ssiu3", "src6_ssiu3", "src7_ssiu3", "src8_ssiu3", "src9_ssiu3", + "src5_ssiu4", "src6_ssiu4", "src7_ssiu4", "src8_ssiu4", "src9_ssiu4", + "src5_ssiu5", "src6_ssiu5", "src7_ssiu5", "src8_ssiu5", "src9_ssiu5", + "src5_ssiu6", "src6_ssiu6", "src7_ssiu6", "src8_ssiu6", "src9_ssiu6", + "src5_ssiu7", "src6_ssiu7", "src7_ssiu7", "src8_ssiu7", "src9_ssiu7", + "src5_ssiu8", "src6_ssiu8", "src7_ssiu8", "src8_ssiu8", "src9_ssiu8", + "src5_ssiu9", "src6_ssiu9", "src7_ssiu9", "src8_ssiu9", "src9_ssiu9", + + "ssiu0_src0", "ssiu0_src1", "ssiu0_src2", "ssiu0_src3", "ssiu0_src4", + "ssiu1_src0", "ssiu1_src1", "ssiu1_src2", "ssiu1_src3", "ssiu1_src4", + "ssiu2_src0", "ssiu2_src1", "ssiu2_src2", "ssiu2_src3", "ssiu2_src4", + "ssiu3_src0", "ssiu3_src1", "ssiu3_src2", "ssiu3_src3", "ssiu3_src4", + "ssiu4_src0", "ssiu4_src1", "ssiu4_src2", "ssiu4_src3", "ssiu4_src4", + "ssiu5_src0", "ssiu5_src1", "ssiu5_src2", "ssiu5_src3", "ssiu5_src4", + "ssiu6_src0", "ssiu6_src1", "ssiu6_src2", "ssiu6_src3", "ssiu6_src4", + "ssiu7_src0", "ssiu7_src1", "ssiu7_src2", "ssiu7_src3", "ssiu7_src4", + "ssiu8_src0", "ssiu8_src1", "ssiu8_src2", "ssiu8_src3", "ssiu8_src4", + "ssiu9_src0", "ssiu9_src1", "ssiu9_src2", "ssiu9_src3", "ssiu9_src4", + + "ssiu0_src5", "ssiu0_src6", "ssiu0_src7", "ssiu0_src8", "ssiu0_src9", + "ssiu1_src5", "ssiu1_src6", "ssiu1_src7", "ssiu1_src8", "ssiu1_src9", + "ssiu2_src5", "ssiu2_src6", "ssiu2_src7", "ssiu2_src8", "ssiu2_src9", + "ssiu3_src5", "ssiu3_src6", "ssiu3_src7", "ssiu3_src8", "ssiu3_src9", + "ssiu4_src5", "ssiu4_src6", "ssiu4_src7", "ssiu4_src8", "ssiu4_src9", + "ssiu5_src5", "ssiu5_src6", "ssiu5_src7", "ssiu5_src8", "ssiu5_src9", + "ssiu6_src5", "ssiu6_src6", "ssiu6_src7", "ssiu6_src8", "ssiu6_src9", + "ssiu7_src5", "ssiu7_src6", "ssiu7_src7", "ssiu7_src8", "ssiu7_src9", + "ssiu8_src5", "ssiu8_src6", "ssiu8_src7", "ssiu8_src8", "ssiu8_src9", + "ssiu9_src5", "ssiu9_src6", "ssiu9_src7", "ssiu9_src8", "ssiu9_src9"; status = "disabled";
Signature · 1 line
2.1.1
PATCH 10/25 ARM: shmobile: lager: fixup IIC2 clock frequency
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Current Lager IIC2 is using default clock frequency, but, ak4643 audio codec chip needs 100kHz This patch clarifies IIC2 clock frequency as 100kHz.
--- arch/arm/boot/dts/r8a7790-lager.dts | 2 ++ 1 file changed, 2 insertions(+)
arch/arm/boot/dts/r8a7790-lager.dts +2 -0
@@ -429,6 +429,8 @@ pinctrl-0 = <&iic2_pins>; pinctrl-names = "default"; + clock-frequency = <100000>; + composite-in at 20 { compatible = "adi,adv7180"; reg = <0x20>;
Signature · 1 line
2.1.1
PATCH 11/25 ARM: shmobile: lager: Sound PIO support on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7790-lager.dts | 70 +++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+)
arch/arm/boot/dts/r8a7790-lager.dts +70 -0
@@ -9,6 +9,18 @@ * kind, whether express or implied. */ +/* + * SSI-AK4643 + * + * SW1: 1: AK4643 + * 2: CN22 + * 3: ADV7511 + * + * This command is required when Playback/Capture + * + * amixer set "LINEOUT Mixer DACL" on + */ + /dts-v1/; #include "r8a7790.dtsi" #include <dt-bindings/gpio/gpio.h>
@@ -146,6 +158,23 @@ 1800000 0>; }; + sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcodec>; + simple-audio-card,frame-master = <&sndcodec>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4643>; + system-clock-frequency = <11289600>; + }; + }; + vga-encoder { compatible = "adi,adv7123";
@@ -292,6 +321,16 @@ renesas,groups = "vin1_data8", "vin1_clk"; renesas,function = "vin1"; }; + + sound_pins: sound { + renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; + renesas,function = "ssi"; + }; + + sound_clk_pins: sound_clk { + renesas,groups = "audio_clk_a"; + renesas,function = "audio_clk"; + }; }; ðer {
@@ -431,6 +470,12 @@ clock-frequency = <100000>; + ak4643: sound-codec at 12 { + compatible = "asahi-kasei,ak4643"; + #sound-dai-cells = <0>; + reg = <0x12>; + }; + composite-in at 20 { compatible = "adi,adv7180"; reg = <0x20>;
@@ -513,3 +558,28 @@ }; }; }; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + #sound-dai-cells = <0>; + + status = "okay"; + + rcar_sound,dai { + dai0 { + playback = <&ssi0>; + capture = <&ssi1>; + }; + }; +}; + +&ssi0 { + pio-transfer; +}; + +&ssi1 { + pio-transfer; + shared-pin; +};
Signature · 1 line
2.1.1
PATCH 12/25 ARM: shmobile: lager: Sound DMA support on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
--- arch/arm/boot/dts/r8a7790-lager.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7790-lager.dts +2 -2
@@ -576,10 +576,10 @@ }; &ssi0 { - pio-transfer; + no-busif; }; &ssi1 { - pio-transfer; + no-busif; shared-pin; };
Signature · 1 line
2.1.1
PATCH 13/25 ARM: shmobile: lager: Sound DMA support via BUSIF on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
--- arch/arm/boot/dts/r8a7790-lager.dts | 5 ----- 1 file changed, 5 deletions(-)
arch/arm/boot/dts/r8a7790-lager.dts +0 -5
@@ -575,11 +575,6 @@ }; }; -&ssi0 { - no-busif; -}; - &ssi1 { - no-busif; shared-pin; };
Signature · 1 line
2.1.1
PATCH 14/25 ARM: shmobile: lager: Sound DMA support via SRC on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting
SSI/SRC random connection.
So, this patch is tring
SSI0 -> SRC2
SSI1 <- SRC3
--- arch/arm/boot/dts/r8a7790-lager.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7790-lager.dts +2 -2
@@ -569,8 +569,8 @@ rcar_sound,dai { dai0 { - playback = <&ssi0>; - capture = <&ssi1>; + playback = <&ssi0 &src2>; + capture = <&ssi1 &src3>; }; }; };
Signature · 1 line
2.1.1
PATCH 15/25 ARM: shmobile: lager: Sound DMA support via DVC on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
--- arch/arm/boot/dts/r8a7790-lager.dts | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7790-lager.dts +9 -2
@@ -19,6 +19,13 @@ * This command is required when Playback/Capture * * amixer set "LINEOUT Mixer DACL" on + * amixer set "DVC Out" 100% + * amixer set "DVC In" 100% + * + * You can use Mute + * + * amixer set "DVC Out Mute" on + * amixer set "DVC In Mute" on */ /dts-v1/;
@@ -569,8 +576,8 @@ rcar_sound,dai { dai0 { - playback = <&ssi0 &src2>; - capture = <&ssi1 &src3>; + playback = <&ssi0 &src2 &dvc0>; + capture = <&ssi1 &src3 &dvc1>; }; }; };
Signature · 1 line
2.1.1
PATCH 16/25 ARM: shmobile: koelsch: fixup I2C2 clock frequency
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
Current Koelsch I2C2 has 400kHz settings,
but, ak4643 audio codec chip which is connected to I2C2 can't work such frequency.
Fixup I2C2 clock frequency to 100kHz.
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +1 -1
@@ -425,7 +425,7 @@ pinctrl-names = "default"; status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; composite-in at 20 { compatible = "adi,adv7180";
Signature · 1 line
2.1.1
PATCH 17/25 ARM: shmobile: koelsch: Sound PIO support on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 70 +++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+)
arch/arm/boot/dts/r8a7791-koelsch.dts +70 -0
@@ -10,6 +10,18 @@ * kind, whether express or implied. */ +/* + * SSI-AK4643 + * + * SW1: 1: AK4643 + * 2: CN22 + * 3: ADV7511 + * + * This command is required when Playback/Capture + * + * amixer set "LINEOUT Mixer DACL" on + */ + /dts-v1/; #include "r8a7791.dtsi" #include <dt-bindings/gpio/gpio.h>
@@ -210,6 +222,23 @@ states = <3300000 1 1800000 0>; }; + + sound { + compatible = "simple-audio-card"; + + simple-audio-card,format = "left_j"; + simple-audio-card,bitclock-master = <&sndcodec>; + simple-audio-card,frame-master = <&sndcodec>; + + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; + + sndcodec: simple-audio-card,codec { + sound-dai = <&ak4643>; + system-clock-frequency = <11289600>; + }; + }; }; &du {
@@ -300,6 +329,16 @@ renesas,groups = "vin1_data8", "vin1_clk"; renesas,function = "vin1"; }; + + sound_pins: sound { + renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; + renesas,function = "ssi"; + }; + + sound_clk_pins: sound_clk { + renesas,groups = "audio_clk_a"; + renesas,function = "audio_clk"; + }; }; ðer {
@@ -427,6 +466,12 @@ status = "okay"; clock-frequency = <100000>; + ak4643: sound-codec at 12 { + compatible = "asahi-kasei,ak4643"; + #sound-dai-cells = <0>; + reg = <0x12>; + }; + composite-in at 20 { compatible = "adi,adv7180"; reg = <0x20>;
@@ -513,3 +558,28 @@ }; }; }; + +&rcar_sound { + pinctrl-0 = <&sound_pins &sound_clk_pins>; + pinctrl-names = "default"; + + #sound-dai-cells = <0>; + + status = "okay"; + + rcar_sound,dai { + dai0 { + playback = <&ssi0>; + capture = <&ssi1>; + }; + }; +}; + +&ssi0 { + pio-transfer; +}; + +&ssi1 { + pio-transfer; + shared-pin; +};
Signature · 1 line
2.1.1
PATCH 18/25 ARM: shmobile: koelsch: Sound DMA support on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SSI
DMA
[MEM] -> [SSI]
DMA
[MEM] <- [SSI]
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +2 -2
@@ -576,10 +576,10 @@ }; &ssi0 { - pio-transfer; + no-busif; }; &ssi1 { - pio-transfer; + no-busif; shared-pin; };
Signature · 1 line
2.1.1
PATCH 19/25 ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SSIU
DMA
[MEM] -> [SSIU] -> [SSI]
DMA
[MEM] <- [SSIU] <- [SSI]
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 5 ----- 1 file changed, 5 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +0 -5
@@ -575,11 +575,6 @@ }; }; -&ssi0 { - no-busif; -}; - &ssi1 { - no-busif; shared-pin; };
Signature · 1 line
2.1.1
PATCH 20/25 ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer to/from SRC
DMA DMApp
[MEM] -> [SRC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [SRC] <- [SSIU] <- [SSI]
Current sound driver is supporting
SSI/SRC random connection.
So, this patch is tring
SSI0 -> SRC2
SSI1 <- SRC3
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +2 -2
@@ -569,8 +569,8 @@ rcar_sound,dai { dai0 { - playback = <&ssi0>; - capture = <&ssi1>; + playback = <&ssi0 &src2>; + capture = <&ssi1 &src3>; }; }; };
Signature · 1 line
2.1.1
PATCH 21/25 ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
In reply to Simon HormanFrom: Kuninori Morimoto <[email protected]>
DMA transfer uses DVC
DMA DMApp
[MEM] -> [SRC] -> [DVC] -> [SSIU] -> [SSI]
DMA DMApp
[MEM] <- [DVC] <- [SRC] <- [SSIU] <- [SSI]
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +9 -2
@@ -20,6 +20,13 @@ * This command is required when Playback/Capture * * amixer set "LINEOUT Mixer DACL" on + * amixer set "DVC Out" 100% + * amixer set "DVC In" 100% + * + * You can use Mute + * + * amixer set "DVC Out Mute" on + * amixer set "DVC In Mute" on */ /dts-v1/;
@@ -569,8 +576,8 @@ rcar_sound,dai { dai0 { - playback = <&ssi0 &src2>; - capture = <&ssi1 &src3>; + playback = <&ssi0 &src2 &dvc0>; + capture = <&ssi1 &src3 &dvc1>; }; }; };
Signature · 1 line
2.1.1
PATCH 22/25 ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
In reply to Simon HormanFrom: Geert Uytterhoeven <[email protected]>
The IIC nodes used the generic compatible properties only. This may cause the driver to fail when using Standard Speed on IIC masters where the operational clock is driven by the 130 MHz HP clock.
Add the SoC-specific compatible property to fix this.
--- arch/arm/boot/dts/r8a73a4.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
arch/arm/boot/dts/r8a73a4.dtsi +9 -9
@@ -106,7 +106,7 @@ i2c5: i2c at e60b0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x428>; interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
@@ -205,7 +205,7 @@ i2c0: i2c at e6500000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x428>; interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -214,7 +214,7 @@ i2c1: i2c at e6510000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x428>; interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -223,7 +223,7 @@ i2c2: i2c at e6520000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6520000 0 0x428>; interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -232,7 +232,7 @@ i2c3: i2c at e6530000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6530000 0 0x428>; interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -241,7 +241,7 @@ i2c4: i2c at e6540000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6540000 0 0x428>; interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -250,7 +250,7 @@ i2c6: i2c at e6550000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6550000 0 0x428>; interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -259,7 +259,7 @@ i2c7: i2c at e6560000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6560000 0 0x428>; interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
@@ -268,7 +268,7 @@ i2c8: i2c at e6570000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; reg = <0 0xe6570000 0 0x428>; interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
Signature · 1 line
2.1.1
PATCH 23/25 ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
In reply to Simon HormanFrom: Geert Uytterhoeven <[email protected]>
The IIC nodes used the generic compatible properties only. This causes the driver to fail when using Standard Speed, as the operational clock is driven by the 104 MHz HP clock:
i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf
i2c-sh_mobile: probe of e6820000.i2c failed with error -22Add the SoC-specific compatible property to fix this.
--- arch/arm/boot/dts/sh73a0.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/sh73a0.dtsi +5 -5
@@ -138,7 +138,7 @@ i2c0: i2c at e6820000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6820000 0x425>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH 0 168 IRQ_TYPE_LEVEL_HIGH
@@ -150,7 +150,7 @@ i2c1: i2c@e6822000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6822000 0x425>; interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH 0 52 IRQ_TYPE_LEVEL_HIGH
@@ -162,7 +162,7 @@ i2c2: i2c@e6824000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6824000 0x425>; interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH 0 172 IRQ_TYPE_LEVEL_HIGH
@@ -174,7 +174,7 @@ i2c3: i2c@e6826000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6826000 0x425>; interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH 0 184 IRQ_TYPE_LEVEL_HIGH
@@ -186,7 +186,7 @@ i2c4: i2c@e6828000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6828000 0x425>; interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH 0 188 IRQ_TYPE_LEVEL_HIGH
Signature · 1 line
2.1.1
PATCH 24/25 ARM: shmobile: koelsch dts: Add labels for the LEDs
In reply to Simon HormanFrom: Geert Uytterhoeven <[email protected]>
The LEDs on the koelsch board are labeled using upper-case characters.
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/boot/dts/r8a7791-koelsch.dts +3 -0
@@ -149,12 +149,15 @@ compatible = "gpio-leds"; led6 { gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; + label = "LED6"; }; led7 { gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; + label = "LED7"; }; led8 { gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; + label = "LED8"; }; };
Signature · 1 line
2.1.1
PATCH 25/25 ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
In reply to Simon HormanFrom: Geert Uytterhoeven <[email protected]>
The LEDs on the kzm9g board are labeled using upper-case characters.
--- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 4 ++++ 1 file changed, 4 insertions(+)
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +4 -0
@@ -101,15 +101,19 @@ compatible = "gpio-leds"; led1 { gpios = <&pfc 20 GPIO_ACTIVE_LOW>; + label = "LED1"; }; led2 { gpios = <&pfc 21 GPIO_ACTIVE_LOW>; + label = "LED2"; }; led3 { gpios = <&pfc 22 GPIO_ACTIVE_LOW>; + label = "LED3"; }; led4 { gpios = <&pfc 23 GPIO_ACTIVE_LOW>; + label = "LED4"; }; };
Signature · 1 line
2.1.1
Quoted 8 lines · Simon Horman
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC DT updates for v3.19.
This pull request is based on the previous round of such requests, tagged as renesas-dt-for-v3.19, which I have already sent a pull-request for.
As discussed, I'm deferring this one and hope we can figure out a better binding for the asoc DMA channels.
I think I've addressed all your pull requests, please check that I haven't missed any and they show up in for-next.
Arnd
Quoted 6 lines · Arnd Bergmann
Quoted 5 lines · Simon Horman
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC DT updates for v3.19.
Quoted 6 lines
Quoted 3 lines
This pull request is based on the previous round of such requests, tagged as renesas-dt-for-v3.19, which I have already sent a pull-request for.
As discussed, I'm deferring this one and hope we can figure out a better binding for the asoc DMA channels.
Thanks, I plan to repost this pull-request with
the patches that are under discussion omitted.
Quoted 2 lines
I think I've addressed all your pull requests, please check that I haven't missed any and they show up in for-next.
Thanks! Will do.