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clk: sunxi: Fix factor clocks usage for sun9i core clocks

PATCH New Chen-Yu Tsai 2 participants 4 messages Nov 27, 2014 – Dec 1, 2014

Subsystems (3)
Common clk Arm/Allwinner sunXi SoC support Arm/Allwinner SoC Clock Support
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Chen-Yu Tsai

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#0 lore raw

PATCH 1/1 clk: sunxi: Fix factor clocks usage for sun9i core clocks

The sunxi factor clocks usage was changed in

clk: sunxi: Give sunxi_factors_register a registers parameter

However the sun9i core clocks were not fixed up in that patch, resulting in breakage. This patch fixes that.

Signed-off-by Chen-Yu Tsai <[email protected]>
Cc Hans de Goede <[email protected]>

---

This patch is for 3.20.

A bit of boiler plate code for each clock provider. Maybe we should add a local helper or something?

---
 drivers/clk/sunxi/clk-sun9i-core.c | 62 ++++++++++++++++++++++++++++++++++----
 1 file changed, 56 insertions(+), 6 deletions(-)
drivers/clk/sunxi/clk-sun9i-core.c +56 -6
index 3cb9036..9b5e7a1 100644
@@ -89,7 +89,17 @@ static DEFINE_SPINLOCK(sun9i_a80_pll4_lock);
 
 static void __init sun9i_a80_pll4_setup(struct device_node *node)
 {
-	sunxi_factors_register(node, &sun9i_a80_pll4_data, &sun9i_a80_pll4_lock);
+	void __iomem *reg;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (!reg) {
+		pr_err("Could not get registers for a80-pll4-clk: %s\n",
+		       node->name);
+		return;
+	}
+
+	sunxi_factors_register(node, &sun9i_a80_pll4_data,
+			       &sun9i_a80_pll4_lock, reg);
 }
 CLK_OF_DECLARE(sun9i_a80_pll4, "allwinner,sun9i-a80-pll4-clk", sun9i_a80_pll4_setup);
 

@@ -139,8 +149,18 @@ static DEFINE_SPINLOCK(sun9i_a80_gt_lock);
 
 static void __init sun9i_a80_gt_setup(struct device_node *node)
 {
-	struct clk *gt = sunxi_factors_register(node, &sun9i_a80_gt_data,
-						&sun9i_a80_gt_lock);
+	void __iomem *reg;
+	struct clk *gt;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (!reg) {
+		pr_err("Could not get registers for a80-gt-clk: %s\n",
+		       node->name);
+		return;
+	}
+
+	gt = sunxi_factors_register(node, &sun9i_a80_gt_data,
+				    &sun9i_a80_gt_lock, reg);
 
 	/* The GT bus clock needs to be always enabled */
 	__clk_get(gt);

@@ -194,7 +214,17 @@ static DEFINE_SPINLOCK(sun9i_a80_ahb_lock);
 
 static void __init sun9i_a80_ahb_setup(struct device_node *node)
 {
-	sunxi_factors_register(node, &sun9i_a80_ahb_data, &sun9i_a80_ahb_lock);
+	void __iomem *reg;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (!reg) {
+		pr_err("Could not get registers for a80-ahb-clk: %s\n",
+		       node->name);
+		return;
+	}
+
+	sunxi_factors_register(node, &sun9i_a80_ahb_data,
+			       &sun9i_a80_ahb_lock, reg);
 }
 CLK_OF_DECLARE(sun9i_a80_ahb, "allwinner,sun9i-a80-ahb-clk", sun9i_a80_ahb_setup);
 

@@ -210,7 +240,17 @@ static DEFINE_SPINLOCK(sun9i_a80_apb0_lock);
 
 static void __init sun9i_a80_apb0_setup(struct device_node *node)
 {
-	sunxi_factors_register(node, &sun9i_a80_apb0_data, &sun9i_a80_apb0_lock);
+	void __iomem *reg;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (!reg) {
+		pr_err("Could not get registers for a80-apb0-clk: %s\n",
+		       node->name);
+		return;
+	}
+
+	sunxi_factors_register(node, &sun9i_a80_apb0_data,
+			       &sun9i_a80_apb0_lock, reg);
 }
 CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-clk", sun9i_a80_apb0_setup);
 

@@ -266,6 +306,16 @@ static DEFINE_SPINLOCK(sun9i_a80_apb1_lock);
 
 static void __init sun9i_a80_apb1_setup(struct device_node *node)
 {
-	sunxi_factors_register(node, &sun9i_a80_apb1_data, &sun9i_a80_apb1_lock);
+	void __iomem *reg;
+
+	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
+	if (!reg) {
+		pr_err("Could not get registers for a80-apb1-clk: %s\n",
+		       node->name);
+		return;
+	}
+
+	sunxi_factors_register(node, &sun9i_a80_apb1_data,
+			       &sun9i_a80_apb1_lock, reg);
 }
 CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-clk", sun9i_a80_apb1_setup);
Signature · 1 line
2.1.3
Applied
#1 lore raw

PATCH 1/1 clk: sunxi: Fix factor clocks usage for sun9i core clocks

Hi,

Quoted 9 lines · Chen-Yu Tsai

The sunxi factor clocks usage was changed in

clk: sunxi: Give sunxi_factors_register a registers parameter

However the sun9i core clocks were not fixed up in that patch, resulting in breakage. This patch fixes that.

Signed-off-by Chen-Yu Tsai <[email protected]>
Cc Hans de Goede <[email protected]>

Applied, thanks!

Quoted 4 lines

This patch is for 3.20.

A bit of boiler plate code for each clock provider. Maybe we should add a local helper or something?

Well, isn't that expected since we actually just moved it out?

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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author
#2 lore raw

PATCH 1/1 clk: sunxi: Fix factor clocks usage for sun9i core clocks

Quoted 7 lines · Maxime Ripard

Hi,

Quoted 4 lines · Chen-Yu Tsai

The sunxi factor clocks usage was changed in

clk: sunxi: Give sunxi_factors_register a registers parameter

Quoted 7 lines
Quoted 5 lines

However the sun9i core clocks were not fixed up in that patch, resulting in breakage. This patch fixes that.

Signed-off-by Chen-Yu Tsai <[email protected]>
Cc Hans de Goede <[email protected]>

Applied, thanks!

Thanks. Note that I'm tracking patches you've merged for 3.20 in my own sunxi-next branch on github.

Quoted 6 lines
Quoted 4 lines

This patch is for 3.20.

A bit of boiler plate code for each clock provider. Maybe we should add a local helper or something?

Well, isn't that expected since we actually just moved it out?

I'll look into making a nice macro for this.

ChenYu

#3 lore raw

PATCH 1/1 clk: sunxi: Fix factor clocks usage for sun9i core clocks

Quoted 8 lines · Chen-Yu Tsai
Quoted 6 lines
Quoted 4 lines

This patch is for 3.20.

A bit of boiler plate code for each clock provider. Maybe we should add a local helper or something?

Well, isn't that expected since we actually just moved it out?

I'll look into making a nice macro for this.

Please don't. We removed it from the common code for a reason, there's no point in putting it back.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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