ARM: shmobile: r8a7779 CCF DTS update
Subsystems (2)
PATCH 1/1 ARM: shmobile: r8a7779 CCF DTS update
From: Magnus Damm <[email protected]>
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- Use R8A7779_CLK_P as parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"
---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
arch/arm/boot/dts/r8a7779.dtsi +15 -15
@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };
@@ -209,7 +209,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; clock-names = "sci_ick"; status = "disabled"; };
@@ -218,7 +218,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; clock-names = "sci_ick"; status = "disabled"; };
@@ -227,7 +227,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; clock-names = "sci_ick"; status = "disabled"; };
@@ -236,7 +236,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; clock-names = "sci_ick"; status = "disabled"; };
@@ -245,7 +245,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; clock-names = "sci_ick"; status = "disabled"; };
@@ -464,18 +464,18 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_S>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_HSPI R8A7779_CLK_TMU2 R8A7779_CLK_TMU1 R8A7779_CLK_TMU0 R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0
@@ -506,7 +506,7 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_USB01 R8A7779_CLK_USB2 R8A7779_CLK_DU R8A7779_CLK_VIN2 R8A7779_CLK_VIN1 R8A7779_CLK_VIN0
@@ -527,7 +527,7 @@ clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2 R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0 R8A7779_CLK_MMC1 R8A7779_CLK_MMC0
Hi Magnus,
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"
We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.
Quoted 11 lines
Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 206
Quoted 8 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +1
-1@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };
According to the datasheet, the SCIF can use both S1 and "SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS).
Do you have more information?
Quoted 6 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +0
-2@@ -464,18 +464,18 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_S>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>,
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 472
Quoted 10 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +6
-4- <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>,
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Quoted 11 lines · Geert Uytterhoeven
Hi Magnus,
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.
Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Quoted 8 lines
Quoted 8 lines
Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)
Quoted 16 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 206
Quoted 11 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +1
-1@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };According to the datasheet, the SCIF can use both S1 and "
SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS).
Do you have more information?
I suspect that you may look at the left side of the r8a7779 SCIF overview page near the BRG where there is a "clks1" and the external SCIF_CLK. I'm looking at the right side and the "baud rate generator" where clkp is hooked up.
The SCIF driver today has relatively limited support for the BRG (which confusingly enough is a second baud rate generator, how many do one need?). With the "regular" baud rate generator and the BRG unit some of the SCIF variants can be configured to use many different clocks.
We currently lack code for the following:
A) Describe all the clocks hooked up to the SCIF
B) Select the best clock for any given baud rate
So with this patch we simply ignore the BRG.
Quoted 27 lines
Quoted 6 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +0
-2@@ -464,18 +464,18 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_S>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>,arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 472
Quoted 10 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +6
-4- <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>,Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Magnus,
Quoted 7 lines · Magnus Damm
Quoted 6 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"
Quoted 7 lines
Quoted 3 lines
We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Quoted 25 lines
Quoted 8 lines
Quoted 8 lines
Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)Quoted 16 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 206
Quoted 11 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +1
-1@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };According to the datasheet, the SCIF can use both S1 and "
SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS).
Do you have more information?
Quoted 4 lines
I suspect that you may look at the left side of the r8a7779 SCIF overview page near the BRG where there is a "clks1" and the external
SCIF_CLK. I'm looking at the right side and the "baud rate generator" where clkp is hooked up.
Oh right, that "clkp" is really "clkp through MSTP bit X"?
Quoted 11 lines
The SCIF driver today has relatively limited support for the BRG (which confusingly enough is a second baud rate generator, how many do one need?). With the "regular" baud rate generator and the BRG unit some of the SCIF variants can be configured to use many different clocks.
We currently lack code for the following:
A) Describe all the clocks hooked up to the SCIF
B) Select the best clock for any given baud rateSo with this patch we simply ignore the BRG.
OK. Fair enough.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Quoted 14 lines · Geert Uytterhoeven
Hi Magnus,
Quoted 11 lines · Magnus Damm
Quoted 9 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.
Quoted 6 lines
Quoted 3 lines
Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Thanks, sounds like I should make a V2 of this patch once Simon has merged patch 3/6 above.
Quoted 25 lines
Quoted 25 lines
Quoted 24 lines
Quoted 11 lines
Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 206
Quoted 8 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +1
-1@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };According to the datasheet, the SCIF can use both S1 and "
SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS).
Do you have more information?
Quoted 6 lines
Quoted 4 lines
I suspect that you may look at the left side of the r8a7779 SCIF overview page near the BRG where there is a "clks1" and the external
SCIF_CLK. I'm looking at the right side and the "baud rate generator" where clkp is hooked up.Oh right, that "clkp" is really "clkp through MSTP bit X"?
Yes, this is how we historically have hooked up the SCIF clocks. It is however not entirely clear from the documentation how the MSTP bit is connected, so the assumption may be wrong. And the SCIF driver has support for interface clocks as well. The "clkp through MSTP bit X" implementation seems better than the current code at least.
Quoted 10 lines
Quoted 10 lines
The SCIF driver today has relatively limited support for the BRG (which confusingly enough is a second baud rate generator, how many do one need?). With the "regular" baud rate generator and the BRG unit some of the SCIF variants can be configured to use many different clocks.
We currently lack code for the following:
A) Describe all the clocks hooked up to the SCIF
B) Select the best clock for any given baud rate
Quoted 5 lines
Quoted 1 line
So with this patch we simply ignore the BRG.
OK. Fair enough.
Thanks!
/ magnus
Quoted 19 lines · Magnus Damm
Hi Geert,
Quoted 16 lines · Geert Uytterhoeven
Hi Magnus,
Quoted 13 lines · Magnus Damm
Quoted 9 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.Yes, I noticed that too late I'm afraid. =)
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Thanks, sounds like I should make a V2 of this patch once Simon has merged patch 3/6 above.
In general I prefer one fix per patch.
So unless there is a dependency between the remaining two fixes could you please make them separate patches when you drop the clock-indicies changes?
Quoted 59 lines
Quoted 26 lines
Quoted 26 lines
Quoted 25 lines
Quoted 12 lines
Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 line 206
Quoted 8 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 +0900 renamed from arch/arm/boot/dts/r8a7779.dtsi +1
-1@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; };According to the datasheet, the SCIF can use both S1 and "
SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS).
Do you have more information?Quoted 6 lines
Quoted 4 lines
I suspect that you may look at the left side of the r8a7779 SCIF overview page near the BRG where there is a "clks1" and the external
SCIF_CLK. I'm looking at the right side and the "baud rate generator" where clkp is hooked up.Oh right, that "clkp" is really "clkp through MSTP bit X"?
Yes, this is how we historically have hooked up the SCIF clocks. It is however not entirely clear from the documentation how the MSTP bit is connected, so the assumption may be wrong. And the SCIF driver has support for interface clocks as well. The "clkp through MSTP bit X" implementation seems better than the current code at least.
Quoted 10 lines
Quoted 10 lines
The SCIF driver today has relatively limited support for the BRG (which confusingly enough is a second baud rate generator, how many do one need?). With the "regular" baud rate generator and the BRG unit some of the SCIF variants can be configured to use many different clocks.
We currently lack code for the following:
A) Describe all the clocks hooked up to the SCIF
B) Select the best clock for any given baud rateQuoted 5 lines
Quoted 1 line
So with this patch we simply ignore the BRG.
OK. Fair enough.
Thanks!
/ magnus
Hi Simon,
Quoted 25 lines · Simon Horman
Quoted 24 lines · Magnus Damm
Hi Geert,
Quoted 20 lines · Geert Uytterhoeven
Hi Magnus,
Quoted 7 lines · Magnus Damm
Quoted 6 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"Quoted 7 lines
Quoted 3 lines
We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Quoted 8 lines
Quoted 2 lines
Thanks, sounds like I should make a V2 of this patch once Simon has merged patch 3/6 above.
In general I prefer one fix per patch.
So unless there is a dependency between the remaining two fixes could you please make them separate patches when you drop the clock-indicies changes?
I think both are needed to make it work, but I don't mind breaking them out into two separate commits. I agree that it is cleaner.
/ magnus
Quoted 31 lines · Magnus Damm
Hi Simon,
Quoted 28 lines · Simon Horman
Quoted 26 lines · Magnus Damm
Hi Geert,
Quoted 14 lines · Geert Uytterhoeven
Hi Magnus,
Quoted 11 lines · Magnus Damm
Quoted 9 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.Quoted 6 lines
Quoted 3 lines
Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Thanks, sounds like I should make a V2 of this patch once Simon has merged patch 3/6 above.
Quoted 8 lines
Quoted 5 lines
In general I prefer one fix per patch.
So unless there is a dependency between the remaining two fixes could you please make them separate patches when you drop the clock-indicies changes?
I think both are needed to make it work, but I don't mind breaking them out into two separate commits. I agree that it is cleaner.
Thanks, I think that would be best.
Hi Magnus,
Quoted 55 lines · On Thursday 04 December 2014 13:37:10 Magnus Damm wrote:
Quoted 13 lines · Geert Uytterhoeven
Quoted 12 lines · Magnus Damm
Quoted 10 lines · Geert Uytterhoeven
Quoted 4 lines · Magnus Damm
Update the r8a7779 CCF DTS with the following fixes:
- Use MSTP0 for SCIF clock control
- UseR8A7779_CLK_Pas parent clock for SCIF (same as legacy code)
- Use "clock-indicies" instead of "renesas,clock-indices"We already have
"[PATCH v2 3/6] ARM: shmobile: r8a7779 dtsi: Change to using clock-indices"
(http://www.spinics.net/lists/linux-sh/msg37285.html) for the latter.Quoted 6 lines
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Yes, I noticed that too late I'm afraid. =)
Are you aware of any outstanding issue for that series?
Not that I'm aware of. As Mike merged the bindings update, I had pinged Simon about the rest of the series, just before you sent your patch.
Thanks, sounds like I should make a V2 of this patch once Simon has merged patch 3/6 above.
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Signed-off-by Magnus Damm <[email protected]>---
Written on top of renesas-devel-20141202-v3.18-rc7
arch/arm/boot/dts/r8a7779.dtsi | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-)arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 renamed from arch/arm/boot/dts/r8a7779.dtsi +2
-1+0900@@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;Quoted 8 lines
arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 line 206
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arch/arm/boot/dts/r8a7779.dtsi 2014-12-03 20:22:26.000000000 renamed from arch/arm/boot/dts/r8a7779.dtsi +0
-0clock-names = "sci_ick"; status = "disabled"; };According to the datasheet, the SCIF can use both S1 and "
SCIF_CLK" (I assume that's the MSTP clock output for SCIF?) as clock input, selectable using the XIN bit of the Clock Select Register (CKS). Do you have more information?I suspect that you may look at the left side of the r8a7779 SCIF overview page near the BRG where there is a "clks1" and the external
SCIF_CLK. I'm looking at the right side and the "baud rate generator" where clkp is hooked up.
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Oh right, that "clkp" is really "clkp through MSTP bit X"?
Yes, this is how we historically have hooked up the SCIF clocks. It is however not entirely clear from the documentation how the MSTP bit is connected, so the assumption may be wrong. And the SCIF driver has support for interface clocks as well.
I've studied this extensively over the SH and ARM SoCs and my conclusion was that the SCIF has a functional clock and several optional baud rate clocks, but no interface clock. References to the interface clock in the driver and DT bindings are leftovers of historical mistakes.
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The "clkp through MSTP bit X" implementation seems better than the current code at least.
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The SCIF driver today has relatively limited support for the BRG (which confusingly enough is a second baud rate generator, how many do one need?). With the "regular" baud rate generator and the BRG unit some of the SCIF variants can be configured to use many different clocks.
We currently lack code for the following:
A) Describe all the clocks hooked up to the SCIF
B) Select the best clock for any given baud rateSo with this patch we simply ignore the BRG.
OK. Fair enough.
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Regards, Laurent Pinchart