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sun6i: Add A31s and ir support

PATCH New Hans de Goede 5 participants 41 messages Dec 17, 2014 – Jan 19, 2015

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#0 lore raw

v2 cover sun6i: Add A31s and ir support

Hi All,

Here is v2 of my patch series to add sun6i A31s and ir support.

Changes in v2:

-"pinctrl: sun6i: Add some missing functions, fix i2c3 muxing":
-Drop the changes to the muxing of i2c3 this was based on
"A31s Datasheet v1.40.pdf", but all other A31 related info puts them at the pins where we already have them, so leave this as is
-"pinctrl: sun6i: Add A31s pinctrl support"
-Sync i2c3 muxing with v2 of "pinctrl: sun6i: Add some missing functions" -Add myself to the copyright header
-"clk: sunxi: Make the mod0 clk driver also a platform driver"
-New patch in v2 of the set
-"mfd: sun6i-prcm: Add support for the ir-clk"
-New patch in v2 of the set
-"ARM: dts: sun6i: Add sun6i-a31s.dtsi"
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
copying everything
-"ARM: dts: sun6i: Add ir_clk node"
-Use allwinner,sun4i-a10-mod0-clk as compatible, rather then a prcm
specific compatible

Please queue this up for 3.20 .

Thanks,

Hans

#1 lore raw

PATCH v2 1/13 pinctrl: sun6i: Add some missing functions

While working on pinctrl for the A31s, I noticed that function 4 of PA15 - PA18 was missing, add these.

---
Changes in v2:
-Drop the changes to the muxing of i2c3 this was based on
"A31s Datasheet v1.40.pdf", but all other A31 related info puts them at the pins where we already have them, so leave this as is

---
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 5 +++++
 1 file changed, 5 insertions(+)
drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c +5 -0
index f42858e..18038f0 100644
@@ -134,24 +134,28 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "gmac"),		/* RXD4 */
 		  SUNXI_FUNCTION(0x3, "lcd1"),		/* D15 */
+		  SUNXI_FUNCTION(0x4, "clk_out_a"),
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)),	/* PA_EINT15 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "gmac"),		/* RXD5 */
 		  SUNXI_FUNCTION(0x3, "lcd1"),		/* D16 */
+		  SUNXI_FUNCTION(0x4, "dmic"),		/* CLK */
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)),	/* PA_EINT16 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "gmac"),		/* RXD6 */
 		  SUNXI_FUNCTION(0x3, "lcd1"),		/* D17 */
+		  SUNXI_FUNCTION(0x4, "dmic"),		/* DIN */
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)),	/* PA_EINT17 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "gmac"),		/* RXD7 */
 		  SUNXI_FUNCTION(0x3, "lcd1"),		/* D18 */
+		  SUNXI_FUNCTION(0x4, "clk_out_b"),
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)),	/* PA_EINT18 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
@@ -207,6 +211,7 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
 		  SUNXI_FUNCTION(0x2, "gmac"),		/* MDC */
 		  SUNXI_FUNCTION(0x3, "lcd1"),		/* HSYNC */
+		  SUNXI_FUNCTION(0x4, "clk_out_c"),
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)),	/* PA_EINT26 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
Signature · 1 line
2.1.0
#2 lore raw

PATCH v2 1/13 pinctrl: sun6i: Add some missing functions

Quoted 4 lines · Hans de Goede

While working on pinctrl for the A31s, I noticed that function 4 of PA15 - PA18 was missing, add these.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#3 lore raw

PATCH v2 1/13 pinctrl: sun6i: Add some missing functions

In reply to Hans de Goede
Quoted 9 lines · Hans de Goede

While working on pinctrl for the A31s, I noticed that function 4 of PA15 - PA18 was missing, add these.

---
Changes in v2:
-Drop the changes to the muxing of i2c3 this was based on
"A31s Datasheet v1.40.pdf", but all other A31 related info puts them at the pins where we already have them, so leave this as is

Patch applied with Maxime's ACK.

Yours,
Linus Walleij

#4 lore raw

PATCH v2 2/13 pinctrl: sun6i: Add A31s pinctrl support

In reply to Hans de Goede

The A31s is a stripped down version of the A31, as such it is missing some pins and some functions on some pins.

The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c with the missing pins and functions removed.

Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the prcm pins are identical between the A31 and the A31s.

---
Changes in v2:
-Sync i2c3 muxing with v2 of "pinctrl: sun6i: Add some missing functions" -Add myself to the copyright header

---
 .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
 drivers/pinctrl/sunxi/Kconfig                      |   4 +
 drivers/pinctrl/sunxi/Makefile                     |   1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c         | 815 +++++++++++++++++++++
 4 files changed, 821 insertions(+)
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c
Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt +1 -0
index 93ce12e..fdd8046 100644
@@ -11,6 +11,7 @@ Required properties:
   "allwinner,sun5i-a10s-pinctrl"
   "allwinner,sun5i-a13-pinctrl"
   "allwinner,sun6i-a31-pinctrl"
+  "allwinner,sun6i-a31s-pinctrl"
   "allwinner,sun6i-a31-r-pinctrl"
   "allwinner,sun7i-a20-pinctrl"
   "allwinner,sun8i-a23-pinctrl"
drivers/pinctrl/sunxi/Kconfig +4 -0
index 230a952..2eb893e 100644
@@ -21,6 +21,10 @@ config PINCTRL_SUN6I_A31
 	def_bool MACH_SUN6I
 	select PINCTRL_SUNXI_COMMON
 
+config PINCTRL_SUN6I_A31S
+	def_bool MACH_SUN6I
+	select PINCTRL_SUNXI_COMMON
+
 config PINCTRL_SUN6I_A31_R
 	def_bool MACH_SUN6I
 	depends on RESET_CONTROLLER
drivers/pinctrl/sunxi/Makefile +1 -0
index c7d92e4..b796d57 100644
@@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_SUN4I_A10)		+= pinctrl-sun4i-a10.o
 obj-$(CONFIG_PINCTRL_SUN5I_A10S)	+= pinctrl-sun5i-a10s.o
 obj-$(CONFIG_PINCTRL_SUN5I_A13)		+= pinctrl-sun5i-a13.o
 obj-$(CONFIG_PINCTRL_SUN6I_A31)		+= pinctrl-sun6i-a31.o
+obj-$(CONFIG_PINCTRL_SUN6I_A31S)	+= pinctrl-sun6i-a31s.o
 obj-$(CONFIG_PINCTRL_SUN6I_A31_R)	+= pinctrl-sun6i-a31-r.o
 obj-$(CONFIG_PINCTRL_SUN7I_A20)		+= pinctrl-sun7i-a20.o
 obj-$(CONFIG_PINCTRL_SUN8I_A23)		+= pinctrl-sun8i-a23.o
drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c new file +815 -0

815 lines not on this page · raw message

Signature · 1 line
2.1.0
#5 lore raw

PATCH v2 2/13 pinctrl: sun6i: Add A31s pinctrl support

Quoted 4 lines · Hans de Goede

The A31s is a stripped down version of the A31, as such it is missing some pins and some functions on some pins.

The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c

I guess you meant pinctrl-sun6i-a31.c for the second one, right?

Quoted 6 lines

with the missing pins and functions removed.

Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the prcm pins are identical between the A31 and the A31s.

We should probably refactor it at some point like mvebu does though to deal with similar pin sets like this and the A31.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#6 lore raw

PATCH v2 2/13 pinctrl: sun6i: Add A31s pinctrl support

In reply to Hans de Goede
Quoted 12 lines · Hans de Goede

The A31s is a stripped down version of the A31, as such it is missing some pins and some functions on some pins.

The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c with the missing pins and functions removed.

Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the prcm pins are identical between the A31 and the A31s.

---
Changes in v2:

Review

Quoted 2 lines
(quoted diff) +0 -2
-Sync i2c3 muxing with v2 of "pinctrl: sun6i: Add some missing functions"
-Add myself to the copyright header

Patch applied with Maxime's ACK.

Yours,
Linus Walleij

#7 lore raw

PATCH v2 3/13 ARM: sunxi: Add "allwinner, sun6i-a31s" to mach-sunxi

In reply to Hans de Goede

So far the A31s is 100% compatible with the A31, still lets do the same as what we've done for the A13 / A10s and give it its own compatible string, in case we need to differentiate later.

---
 Documentation/arm/sunxi/README | 1 -
 arch/arm/mach-sunxi/platsmp.c  | 3 ++-
 arch/arm/mach-sunxi/sunxi.c    | 1 +
 drivers/clk/sunxi/clk-sunxi.c  | 1 +
 4 files changed, 4 insertions(+), 2 deletions(-)
Documentation/arm/sunxi/README +0 -1
index e68d163..1fe2d7f 100644
@@ -50,7 +50,6 @@ SunXi family
           http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20user%20manual%20V1.1%2020130630.pdf
 
       - Allwinner A31s (sun6i)
-        + Not Supported
         + Datasheet
           http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20datasheet%20V1.3%2020131106.pdf
         + User Manual
arch/arm/mach-sunxi/platsmp.c +2 -1
index e44d028..b1b5b7c 100644
@@ -120,4 +120,5 @@ static struct smp_operations sun6i_smp_ops __initdata = {
 	.smp_prepare_cpus	= sun6i_smp_prepare_cpus,
 	.smp_boot_secondary	= sun6i_smp_boot_secondary,
 };
-CPU_METHOD_OF_DECLARE(sun6i_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
+CPU_METHOD_OF_DECLARE(sun6i_a31_smp, "allwinner,sun6i-a31", &sun6i_smp_ops);
+CPU_METHOD_OF_DECLARE(sun6i_a31s_smp, "allwinner,sun6i-a31s", &sun6i_smp_ops);
arch/arm/mach-sunxi/sunxi.c +1 -0
index 1f98675..d4bb239 100644
@@ -29,6 +29,7 @@ MACHINE_END
 
 static const char * const sun6i_board_dt_compat[] = {
 	"allwinner,sun6i-a31",
+	"allwinner,sun6i-a31s",
 	NULL,
 };
 
drivers/clk/sunxi/clk-sunxi.c +1 -0
index a9d10b9..ee9d7f2 100644
@@ -1235,6 +1235,7 @@ static void __init sun6i_init_clocks(struct device_node *node)
 			  ARRAY_SIZE(sun6i_critical_clocks));
 }
 CLK_OF_DECLARE(sun6i_a31_clk_init, "allwinner,sun6i-a31", sun6i_init_clocks);
+CLK_OF_DECLARE(sun6i_a31s_clk_init, "allwinner,sun6i-a31s", sun6i_init_clocks);
 CLK_OF_DECLARE(sun8i_a23_clk_init, "allwinner,sun8i-a23", sun6i_init_clocks);
 
 static void __init sun9i_init_clocks(struct device_node *node)
Signature · 1 line
2.1.0
#8 lore raw

PATCH v2 3/13 ARM: sunxi: Add "allwinner,sun6i-a31s" to mach-sunxi

Quoted 5 lines · Hans de Goede

So far the A31s is 100% compatible with the A31, still lets do the same as what we've done for the A13 / A10s and give it its own compatible string, in case we need to differentiate later.

Applied, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#9 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

In reply to Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
 .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
 drivers/media/rc/sunxi-cir.c                       | 25 ++++++++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +2 -0
index 23dd5ad..6b70b9b 100644
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair
 
 Example:
 
@@ -17,6 +18,7 @@ ir0: ir at 01c21800 {
 	compatible = "allwinner,sun4i-a10-ir";
 	clocks = <&apb0_gates 6>, <&ir0_clk>;
 	clock-names = "apb", "ir";
+	resets = <&apb0_rst 1>;
 	interrupts = <0 5 1>;
 	reg = <0x01C21800 0x40>;
 	linux,rc-map-name = "rc-rc6-mce";
drivers/media/rc/sunxi-cir.c +23 -2
index 340f7f5..06170e0 100644
@@ -23,6 +23,7 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/of_platform.h>
+#include <linux/reset.h>
 #include <media/rc-core.h>
 
 #define SUNXI_IR_DEV "sunxi-ir"
@@ -95,6 +96,7 @@ struct sunxi_ir {
 	int             irq;
 	struct clk      *clk;
 	struct clk      *apb_clk;
+	struct reset_control *rst;
 	const char      *map_name;
 };
 
@@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 		return PTR_ERR(ir->clk);
 	}
 
+	/* Reset (optional) */
+	ir->rst = devm_reset_control_get_optional(dev, NULL);
+	if (IS_ERR(ir->rst)) {
+		ret = PTR_ERR(ir->rst);
+		if (ret == -EPROBE_DEFER)
+			return ret;
+		ir->rst = NULL;
+	} else {
+		ret = reset_control_deassert(ir->rst);
+		if (ret)
+			return ret;
+	}
+
 	ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
 	if (ret) {
 		dev_err(dev, "set ir base clock failed!\n");
-		return ret;
+		goto exit_reset_assert;
 	}
 
 	if (clk_prepare_enable(ir->apb_clk)) {
 		dev_err(dev, "try to enable apb_ir_clk failed\n");
-		return -EINVAL;
+		ret = -EINVAL;
+		goto exit_reset_assert;
 	}
 
 	if (clk_prepare_enable(ir->clk)) {
@@ -271,6 +287,9 @@ exit_clkdisable_clk:
 	clk_disable_unprepare(ir->clk);
 exit_clkdisable_apb_clk:
 	clk_disable_unprepare(ir->apb_clk);
+exit_reset_assert:
+	if (ir->rst)
+		reset_control_assert(ir->rst);
 
 	return ret;
 }
@@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
 
 	clk_disable_unprepare(ir->clk);
 	clk_disable_unprepare(ir->apb_clk);
+	if (ir->rst)
+		reset_control_assert(ir->rst);
 
 	spin_lock_irqsave(&ir->ir_lock, flags);
 	/* disable IR IRQ */
Signature · 1 line
2.1.0
#10 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 16 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
 .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
 drivers/media/rc/sunxi-cir.c                       | 25 ++++++++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

ChenYu

Quoted 88 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
 Example:
 
@@ -17,6 +18,7 @@ ir0: ir at 01c21800 {
        compatible = "allwinner,sun4i-a10-ir";
        clocks = <&apb0_gates 6>, <&ir0_clk>;
        clock-names = "apb", "ir";
+       resets = <&apb0_rst 1>;
        interrupts = <0 5 1>;
        reg = <0x01C21800 0x40>;
        linux,rc-map-name = "rc-rc6-mce";
drivers/media/rc/sunxi-cir.c +23 -3
index 340f7f5..06170e0 100644
@@ -23,6 +23,7 @@
 #include <linux/interrupt.h>
 #include <linux/module.h>
 #include <linux/of_platform.h>
+#include <linux/reset.h>
 #include <media/rc-core.h>
 
 #define SUNXI_IR_DEV "sunxi-ir"
@@ -95,6 +96,7 @@ struct sunxi_ir {
        int             irq;
        struct clk      *clk;
        struct clk      *apb_clk;
+       struct reset_control *rst;
        const char      *map_name;
 };
 
@@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
                return PTR_ERR(ir->clk);
        }
 
+       /* Reset (optional) */
+       ir->rst = devm_reset_control_get_optional(dev, NULL);
+       if (IS_ERR(ir->rst)) {
+               ret = PTR_ERR(ir->rst);
+               if (ret == -EPROBE_DEFER)
+                       return ret;
+               ir->rst = NULL;
+       } else {
+               ret = reset_control_deassert(ir->rst);
+               if (ret)
+                       return ret;
+       }
+
        ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
        if (ret) {
                dev_err(dev, "set ir base clock failed!\n");
-               return ret;
+               goto exit_reset_assert;
        }
 
        if (clk_prepare_enable(ir->apb_clk)) {
                dev_err(dev, "try to enable apb_ir_clk failed\n");
-               return -EINVAL;
+               ret = -EINVAL;
+               goto exit_reset_assert;
        }
 
        if (clk_prepare_enable(ir->clk)) {
@@ -271,6 +287,9 @@ exit_clkdisable_clk:
        clk_disable_unprepare(ir->clk);
 exit_clkdisable_apb_clk:
        clk_disable_unprepare(ir->apb_clk);
+exit_reset_assert:
+       if (ir->rst)
+               reset_control_assert(ir->rst);
 
        return ret;
 }
@@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
 
        clk_disable_unprepare(ir->clk);
        clk_disable_unprepare(ir->apb_clk);
+       if (ir->rst)
+               reset_control_assert(ir->rst);
 
        spin_lock_irqsave(&ir->ir_lock, flags);
        /* disable IR IRQ */
--

2.1.0

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#11 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 28 lines · Chen-Yu Tsai

Hi,

Quoted 16 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
  .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
  drivers/media/rc/sunxi-cir.c                       | 25 ++++++++++++++++++++--
  2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
  Optional properties:
  - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Quoted 2 lines

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

Regards,

Hans

#12 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 31 lines · Hans de Goede

Hi,

Quoted 28 lines · Chen-Yu Tsai

Hi,

Quoted 16 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
 .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
 drivers/media/rc/sunxi-cir.c                       | 25 ++++++++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Quoted 7 lines
Quoted 2 lines

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

He has a point though. Your driver might very well probe nicely and everything, but still wouldn't be functional at all because the reset line wouldn't have been specified in the DT.

The easiest way to deal with that would be in the bindings doc to update it with a compatible for the A31, and mentionning that the reset property is mandatory there.

Note that the code itself might not change at all though. I'd just like to avoid any potential breaking of the DT bindings themselves. If we further want to refine the code, we can do that however we want.

I have a slight preference for a clean error if reset is missing, but I won't get in the way just for that.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#13 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 37 lines · Maxime Ripard

Hi,

Quoted 34 lines · Hans de Goede

Hi,

Quoted 30 lines · Chen-Yu Tsai

Hi,

Quoted 16 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
  .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
  drivers/media/rc/sunxi-cir.c                       | 25 ++++++++++++++++++++--
  2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
  Optional properties:
  - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

Quoted 8 lines
Quoted 4 lines

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

He has a point though. Your driver might very well probe nicely and everything, but still wouldn't be functional at all because the reset line wouldn't have been specified in the DT.

Right, just like other drivers we've, see e.g.:

Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

Which is dealing with this in the same way.

Quoted 3 lines

The easiest way to deal with that would be in the bindings doc to update it with a compatible for the A31, and mentionning that the reset property is mandatory there.

No the easiest way to deal with this is to expect people writing the dts to know what they are doing, just like we do for a lot of the other blocks in sun6i.

Maybe put a generic note somewhere that sun6i has a reset controller, and that for all the blocks with optional resets property it should be considered mandatory on sun6i ?

I'm sorry but I'm not going to make this change for the ir bindings given that we've the same situation in a lot of other places.

Consistency is important. Moreover I believe that having a sun6i specific compatible string is just wrong, since it is the exact same hardware block as on sun5i, just with its reset line routed differently, just like e.g. the mmc controller, the uarts or the gmac all of which also do not have a sun6i specific compatible to enforce reset controller usage.

Regards,

Hans

Quoted 9 lines

Note that the code itself might not change at all though. I'd just like to avoid any potential breaking of the DT bindings themselves. If we further want to refine the code, we can do that however we want.

I have a slight preference for a clean error if reset is missing, but I won't get in the way just for that.

Maxime

#14 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 90 lines · Hans de Goede

Hi,

Quoted 52 lines · Maxime Ripard

Hi,

Quoted 38 lines · Hans de Goede

Hi,

Quoted 34 lines · Chen-Yu Tsai

Hi,

Quoted 19 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
  .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
  drivers/media/rc/sunxi-cir.c                       | 25
++++++++++++++++++++--
  2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
  Optional properties:
  - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Quoted 8 lines
Quoted 2 lines

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

Quoted 3 lines

He has a point though. Your driver might very well probe nicely and everything, but still wouldn't be functional at all because the reset line wouldn't have been specified in the DT.

Right, just like other drivers we've, see e.g.:

Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

Which is dealing with this in the same way.

Quoted 3 lines

The easiest way to deal with that would be in the bindings doc to update it with a compatible for the A31, and mentionning that the reset property is mandatory there.

No the easiest way to deal with this is to expect people writing the dts to know what they are doing, just like we do for a lot of the other blocks in sun6i.

Maybe put a generic note somewhere that sun6i has a reset controller, and that for all the blocks with optional resets property it should be considered mandatory on sun6i ?

I'm sorry but I'm not going to make this change for the ir bindings given that we've the same situation in a lot of other places.

Consistency is important. Moreover I believe that having a sun6i specific compatible string is just wrong, since it is the exact same hardware block as on sun5i, just with its reset line routed differently, just like e.g. the mmc controller, the uarts or the gmac all of which also do not have a sun6i specific compatible to enforce reset controller usage.

Quoted 13 lines

Regards,

Hans

Quoted 6 lines

Note that the code itself might not change at all though. I'd just like to avoid any potential breaking of the DT bindings themselves. If we further want to refine the code, we can do that however we want.

I have a slight preference for a clean error if reset is missing, but I won't get in the way just for that.

Seems this patch and the following patch were overlooked after the discussion. Any chance we could get this in? Hans has made a good argument, so I take back any doubts I raised.

ChenYu

#15 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Hi,

Quoted 104 lines · Chen-Yu Tsai

Hi,

Quoted 101 lines · Hans de Goede

Hi,

Quoted 52 lines · Maxime Ripard

Hi,

Quoted 38 lines · Hans de Goede

Hi,

Quoted 34 lines · Chen-Yu Tsai

Hi,

Quoted 19 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support for de-asserting the reset if a reset controller is specified in dt.

---
   .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
   drivers/media/rc/sunxi-cir.c                       | 25
++++++++++++++++++++--
   2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
   Optional properties:
   - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Quoted 8 lines
Quoted 2 lines

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

Quoted 3 lines

He has a point though. Your driver might very well probe nicely and everything, but still wouldn't be functional at all because the reset line wouldn't have been specified in the DT.

Right, just like other drivers we've, see e.g.:

Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

Which is dealing with this in the same way.

Quoted 3 lines

The easiest way to deal with that would be in the bindings doc to update it with a compatible for the A31, and mentionning that the reset property is mandatory there.

No the easiest way to deal with this is to expect people writing the dts to know what they are doing, just like we do for a lot of the other blocks in sun6i.

Maybe put a generic note somewhere that sun6i has a reset controller, and that for all the blocks with optional resets property it should be considered mandatory on sun6i ?

I'm sorry but I'm not going to make this change for the ir bindings given that we've the same situation in a lot of other places.

Consistency is important. Moreover I believe that having a sun6i specific compatible string is just wrong, since it is the exact same hardware block as on sun5i, just with its reset line routed differently, just like e.g. the mmc controller, the uarts or the gmac all of which also do not have a sun6i specific compatible to enforce reset controller usage.

Regards,

Hans

Quoted 4 lines

Note that the code itself might not change at all though. I'd just like to avoid any potential breaking of the DT bindings themselves. If we further want to refine the code, we can do that however we want.

Quoted 5 lines
Quoted 2 lines
Quoted 2 lines

I have a slight preference for a clean error if reset is missing, but I won't get in the way just for that.

Seems this patch and the following patch were overlooked after the discussion. Any chance we could get this in?

I'm a linux/media sub-maintainer, so I've already send a pull-req for these 2 to the linux/media maintainer, iow this is taken care of :)

Regards,

Hans

#16 lore raw

PATCH v2 4/13 rc: sunxi-cir: Add support for an optional reset controller

Quoted 125 lines · Hans de Goede

Hi,

Quoted 121 lines · Chen-Yu Tsai

Hi,

Quoted 114 lines · Hans de Goede

Hi,

Quoted 60 lines · Maxime Ripard

Hi,

Quoted 48 lines · Hans de Goede

Hi,

Quoted 38 lines · Chen-Yu Tsai

Hi,

Quoted 21 lines · Hans de Goede

On sun6i the cir block is attached to the reset controller, add support
for de-asserting the reset if a reset controller is specified in dt.

---
   .../devicetree/bindings/media/sunxi-ir.txt         |  2 ++
   drivers/media/rc/sunxi-cir.c                       | 25
++++++++++++++++++++--
   2 files changed, 25 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +0 -0
index 23dd5ad..6b70b9b 100644

Documentation/devicetree/bindings/media/sunxi-ir.txt Required properties: · line 13

Quoted 4 lines
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -0
@@ -10,6 +10,7 @@ Required properties:
 
   Optional properties:
   - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair

Should it be optional? Or should we use a sun6i compatible with a mandatory reset phandle? I mean, the driver/hardware is not going to work with the reset missing on sun6i.

Quoted 2 lines

Seems we are doing it one way for some of our drivers, and the other (optional) way for more generic ones, like USB.

Quoted 4 lines

I do not believe that we should add a new compatible just because the reset line of a block is hooked up differently. It is the exact same ip-block. Only now the reset is not controlled through the apb-gate, but controlled separately.

Quoted 3 lines

He has a point though. Your driver might very well probe nicely and everything, but still wouldn't be functional at all because the reset line wouldn't have been specified in the DT.

Right, just like other drivers we've, see e.g.:

Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

Which is dealing with this in the same way.

Quoted 3 lines

The easiest way to deal with that would be in the bindings doc to update it with a compatible for the A31, and mentionning that the reset property is mandatory there.

No the easiest way to deal with this is to expect people writing the dts to know what they are doing, just like we do for a lot of the other blocks in sun6i.

Maybe put a generic note somewhere that sun6i has a reset controller, and that for all the blocks with optional resets property it should be considered mandatory on sun6i ?

I'm sorry but I'm not going to make this change for the ir bindings given that we've the same situation in a lot of other places.

Consistency is important. Moreover I believe that having a sun6i specific compatible string is just wrong, since it is the exact same hardware block as on sun5i, just with its reset line routed differently, just like e.g. the mmc controller, the uarts or the gmac all of which also do not have a sun6i specific compatible to enforce reset controller usage.

Regards,

Hans

Quoted 6 lines

Note that the code itself might not change at all though. I'd just like to avoid any potential breaking of the DT bindings themselves. If we further want to refine the code, we can do that however we want.

I have a slight preference for a clean error if reset is missing, but I won't get in the way just for that.

Quoted 6 lines
Quoted 2 lines

Seems this patch and the following patch were overlooked after the discussion. Any chance we could get this in?

I'm a linux/media sub-maintainer, so I've already send a pull-req for these 2 to the linux/media maintainer, iow this is taken care of :)

That's good to hear. I was going through the mainlining effort page, and couldn't find these 2 in linux-next. I'll mark them as planned for 3.20 then.

Chen-Yu

#17 lore raw

PATCH v2 5/13 rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i

In reply to Hans de Goede

Add support for the larger fifo found on sun5i and sun6i, having a separate compatible for the ir found on sun5i & sun6i also is useful if we ever want to add ir transmit support, because the sun5i & sun6i version do not have transmit support.

Note this commits also adds checking for the end-of-packet interrupt flag (which was already enabled), as the fifo-data-available interrupt flag only gets set when the trigger-level is exceeded. So far we've been getting away with not doing this because of the low trigger-level, but this is something which we should have done since day one.

---
 .../devicetree/bindings/media/sunxi-ir.txt          |  2 +-
 drivers/media/rc/sunxi-cir.c                        | 21 ++++++++++++---------
 2 files changed, 13 insertions(+), 10 deletions(-)
Documentation/devicetree/bindings/media/sunxi-ir.txt +1 -1
index 6b70b9b..1811a06 100644
@@ -1,7 +1,7 @@
 Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
 
 Required properties:
-- compatible	    : should be "allwinner,sun4i-a10-ir";
+- compatible	    : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
 - clocks	    : list of clock specifiers, corresponding to
 		      entries in clock-names property;
 - clock-names	    : should contain "apb" and "ir" entries;
drivers/media/rc/sunxi-cir.c +12 -9
index 06170e0..7830aef 100644
@@ -56,12 +56,12 @@
 #define REG_RXINT_RAI_EN		BIT(4)
 
 /* Rx FIFO available byte level */
-#define REG_RXINT_RAL(val)    (((val) << 8) & (GENMASK(11, 8)))
+#define REG_RXINT_RAL(val)    ((val) << 8)
 
 /* Rx Interrupt Status */
 #define SUNXI_IR_RXSTA_REG    0x30
 /* RX FIFO Get Available Counter */
-#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (GENMASK(5, 0)))
+#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
 /* Clear all interrupt status value */
 #define REG_RXSTA_CLEARALL    0xff
 
@@ -72,10 +72,6 @@
 /* CIR_REG register idle threshold */
 #define REG_CIR_ITHR(val)    (((val) << 8) & (GENMASK(15, 8)))
 
-/* Hardware supported fifo size */
-#define SUNXI_IR_FIFO_SIZE    16
-/* How many messages in FIFO trigger IRQ */
-#define TRIGGER_LEVEL         8
 /* Required frequency for IR0 or IR1 clock in CIR mode */
 #define SUNXI_IR_BASE_CLK     8000000
 /* Frequency after IR internal divider  */
@@ -94,6 +90,7 @@ struct sunxi_ir {
 	struct rc_dev   *rc;
 	void __iomem    *base;
 	int             irq;
+	int		fifo_size;
 	struct clk      *clk;
 	struct clk      *apb_clk;
 	struct reset_control *rst;
@@ -115,11 +112,11 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
 	/* clean all pending statuses */
 	writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
 
-	if (status & REG_RXINT_RAI_EN) {
+	if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
 		/* How many messages in fifo */
 		rc  = REG_RXSTA_GET_AC(status);
 		/* Sanity check */
-		rc = rc > SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
+		rc = rc > ir->fifo_size ? ir->fifo_size : rc;
 		/* If we have data */
 		for (cnt = 0; cnt < rc; cnt++) {
 			/* for each bit in fifo */
@@ -156,6 +153,11 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 	if (!ir)
 		return -ENOMEM;
 
+	if (of_device_is_compatible(dn, "allwinner,sun5i-a13-ir"))
+		ir->fifo_size = 64;
+	else
+		ir->fifo_size = 16;
+
 	/* Clock */
 	ir->apb_clk = devm_clk_get(dev, "apb");
 	if (IS_ERR(ir->apb_clk)) {
@@ -271,7 +273,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 	 * level
 	 */
 	writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
-	       REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
+	       REG_RXINT_RAI_EN | REG_RXINT_RAL(ir->fifo_size / 2 - 1),
 	       ir->base + SUNXI_IR_RXINT_REG);
 
 	/* Enable IR Module */
@@ -319,6 +321,7 @@ static int sunxi_ir_remove(struct platform_device *pdev)
 
 static const struct of_device_id sunxi_ir_match[] = {
 	{ .compatible = "allwinner,sun4i-a10-ir", },
+	{ .compatible = "allwinner,sun5i-a13-ir", },
 	{},
 };
 
Signature · 1 line
2.1.0
#18 lore raw

PATCH v2 6/13 clk: sunxi: Make the mod0 clk driver also a platform driver

In reply to Hans de Goede

With the prcm in sun6i (and some later SoCs) some mod0 clocks are instantiated through the mfd framework, and as such do not work with of_clk_declare, since they do not have registers assigned to them yet at of_clk_declare init time.

Silence the error on not finding registers in the of_clk_declare mod0 clk setup method, and also register mod0-clk support as a platform driver to work properly with mfd instantiated mod0 clocks.

---
 drivers/clk/sunxi/clk-mod0.c | 41 ++++++++++++++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 5 deletions(-)
drivers/clk/sunxi/clk-mod0.c +36 -5
index 658d74f..7ddab6f 100644
@@ -17,6 +17,7 @@
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
 #include <linux/of_address.h>
+#include <linux/platform_device.h>
 
 #include "clk-factors.h"
 
@@ -67,7 +68,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
 	.pwidth = 2,
 };
 
-static const struct factors_data sun4i_a10_mod0_data __initconst = {
+static const struct factors_data sun4i_a10_mod0_data = {
 	.enable = 31,
 	.mux = 24,
 	.muxmask = BIT(1) | BIT(0),
@@ -82,17 +83,47 @@ static void __init sun4i_a10_mod0_setup(struct device_node *node)
 	void __iomem *reg;
 
 	reg = of_iomap(node, 0);
-	if (!reg) {
-		pr_err("Could not get registers for mod0-clk: %s\n",
-		       node->name);
+	if (!reg)
 		return;
-	}
 
 	sunxi_factors_register(node, &sun4i_a10_mod0_data,
 			       &sun4i_a10_mod0_lock, reg);
 }
 CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup);
 
+static int sun4i_a10_mod0_clk_probe(struct platform_device *pdev)
+{
+	struct device_node *np = pdev->dev.of_node;
+	struct resource *r;
+	void __iomem *reg;
+
+	if (!np)
+		return -ENODEV;
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	reg = devm_ioremap_resource(&pdev->dev, r);
+	if (IS_ERR(reg))
+		return PTR_ERR(reg);
+
+	sunxi_factors_register(np, &sun4i_a10_mod0_data,
+			       &sun4i_a10_mod0_lock, reg);
+	return 0;
+}
+
+static const struct of_device_id sun4i_a10_mod0_clk_dt_ids[] = {
+	{ .compatible = "allwinner,sun4i-a10-mod0-clk" },
+	{ /* sentinel */ }
+};
+
+static struct platform_driver sun4i_a10_mod0_clk_driver = {
+	.driver = {
+		.name = "sun4i-a10-mod0-clk",
+		.of_match_table = sun4i_a10_mod0_clk_dt_ids,
+	},
+	.probe = sun4i_a10_mod0_clk_probe,
+};
+module_platform_driver(sun4i_a10_mod0_clk_driver);
+
 static DEFINE_SPINLOCK(sun5i_a13_mbus_lock);
 
 static void __init sun5i_a13_mbus_setup(struct device_node *node)
Signature · 1 line
2.1.0
#19 lore raw

PATCH v2 6/13 clk: sunxi: Make the mod0 clk driver also a platform driver

Hi,

Quoted 35 lines · Hans de Goede

With the prcm in sun6i (and some later SoCs) some mod0 clocks are instantiated through the mfd framework, and as such do not work with of_clk_declare, since they do not have registers assigned to them yet at of_clk_declare init time.

Silence the error on not finding registers in the of_clk_declare mod0 clk setup method, and also register mod0-clk support as a platform driver to work properly with mfd instantiated mod0 clocks.

---
 drivers/clk/sunxi/clk-mod0.c | 41 ++++++++++++++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 5 deletions(-)
drivers/clk/sunxi/clk-mod0.c +2 -1
index 658d74f..7ddab6f 100644
@@ -17,6 +17,7 @@
 #include <linux/clk-provider.h>
 #include <linux/clkdev.h>
 #include <linux/of_address.h>
+#include <linux/platform_device.h>
 
 #include "clk-factors.h"
 
@@ -67,7 +68,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
 	.pwidth = 2,
 };
 
-static const struct factors_data sun4i_a10_mod0_data __initconst = {
+static const struct factors_data sun4i_a10_mod0_data = {
 	.enable = 31,
 	.mux = 24,
 	.muxmask = BIT(1) | BIT(0),

drivers/clk/sunxi/clk-mod0.c static void __init sun4i_a10_mod0_setup(struct device_node *node) · line 89

Quoted 9 lines
drivers/clk/sunxi/clk-mod0.c +1 -4
@@ -82,17 +83,47 @@ static void __init sun4i_a10_mod0_setup(struct device_node *node)
 	void __iomem *reg;
 
 	reg = of_iomap(node, 0);
-	if (!reg) {
-		pr_err("Could not get registers for mod0-clk: %s\n",
-		       node->name);
+	if (!reg)
 		return;
-	}

A comment here would be nice to mention that this is intentional.

It looks good otherwise, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#20 lore raw

PATCH v2 6/13 clk: sunxi: Make the mod0 clk driver also a platform driver

Hi,

Quoted 40 lines · Maxime Ripard

Hi,

Quoted 37 lines · Hans de Goede

With the prcm in sun6i (and some later SoCs) some mod0 clocks are instantiated through the mfd framework, and as such do not work with of_clk_declare, since they do not have registers assigned to them yet at of_clk_declare init time.

Silence the error on not finding registers in the of_clk_declare mod0 clk setup method, and also register mod0-clk support as a platform driver to work properly with mfd instantiated mod0 clocks.

---
  drivers/clk/sunxi/clk-mod0.c | 41 ++++++++++++++++++++++++++++++++++++-----
  1 file changed, 36 insertions(+), 5 deletions(-)
drivers/clk/sunxi/clk-mod0.c +2 -1
index 658d74f..7ddab6f 100644
@@ -17,6 +17,7 @@
  #include <linux/clk-provider.h>
  #include <linux/clkdev.h>
  #include <linux/of_address.h>
+#include <linux/platform_device.h>
 
  #include "clk-factors.h"
 
@@ -67,7 +68,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
  	.pwidth = 2,
  };
 
-static const struct factors_data sun4i_a10_mod0_data __initconst = {
+static const struct factors_data sun4i_a10_mod0_data = {
  	.enable = 31,
  	.mux = 24,
  	.muxmask = BIT(1) | BIT(0),
@@ -82,17 +83,47 @@ static void __init sun4i_a10_mod0_setup(struct device_node *node)
  	void __iomem *reg;
 
Quoted 9 lines

drivers/clk/sunxi/clk-mod0.c static void __init sun4i_a10_mod0_setup(struct device_node *node) · line 89

Quoted 7 lines
drivers/clk/sunxi/clk-mod0.c +1 -4
  	reg = of_iomap(node, 0);
-	if (!reg) {
-		pr_err("Could not get registers for mod0-clk: %s\n",
-		       node->name);
+	if (!reg)
  		return;
-	}

A comment here would be nice to mention that this is intentional.

Ok, I'll respin this patch adding such a comment.

Regards,

Hans

#21 lore raw

PATCH v2 7/13 mfd: sun6i-prcm: Add support for the ir-clk

In reply to Hans de Goede

Add support for the ir-clk which is part of the sun6i SoC prcm module.

---
 drivers/mfd/sun6i-prcm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
drivers/mfd/sun6i-prcm.c +14 -0
index 2f2e9f0..1911731 100644
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
 	},
 };
 
+static const struct resource sun6i_a31_ir_clk_res[] = {
+	{
+		.start = 0x54,
+		.end = 0x57,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
 static const struct resource sun6i_a31_apb0_rstc_res[] = {
 	{
 		.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
 		.resources = sun6i_a31_apb0_gates_clk_res,
 	},
 	{
+		.name = "sun6i-a31-ir-clk",
+		.of_compatible = "allwinner,sun4i-a10-mod0-clk",
+		.num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+		.resources = sun6i_a31_ir_clk_res,
+	},
+	{
 		.name = "sun6i-a31-apb0-clock-reset",
 		.of_compatible = "allwinner,sun6i-a31-clock-reset",
 		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),
Signature · 1 line
2.1.0
#22 lore raw

PATCH v2 7/13 mfd: sun6i-prcm: Add support for the ir-clk

Quoted 6 lines · Hans de Goede

Add support for the ir-clk which is part of the sun6i SoC prcm module.

---
 drivers/mfd/sun6i-prcm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Pretty standard stuff (

Quoted 5 lines
drivers/mfd/sun6i-prcm.c +0 -0
index 2f2e9f0..1911731 100644

drivers/mfd/sun6i-prcm.c static const struct resource sun6i_a31_apb0_gates_clk_res[] = { · line 50

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +7 -0
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
 	},
 };
 
+static const struct resource sun6i_a31_ir_clk_res[] = {
+	{
+		.start = 0x54,
+		.end = 0x57,
+		.flags = IORESOURCE_MEM,
+	},
+};

I'm still unkeen on this registers not being defined -- but whateveer!

Quoted 6 lines
drivers/mfd/sun6i-prcm.c +0 -0
 static const struct resource sun6i_a31_apb0_rstc_res[] = {
 	{
 		.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
 		.resources = sun6i_a31_apb0_gates_clk_res,
 	},

drivers/mfd/sun6i-prcm.c static const struct mfd_cell sun6i_a31_prcm_subdevs[] = { · line 88

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +6 -0
 	{
+		.name = "sun6i-a31-ir-clk",
+		.of_compatible = "allwinner,sun4i-a10-mod0-clk",
+		.num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+		.resources = sun6i_a31_ir_clk_res,
+	},
+	{
 		.name = "sun6i-a31-apb0-clock-reset",
 		.of_compatible = "allwinner,sun6i-a31-clock-reset",
 		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),

This is all pretty standard stuff:

For my own reference:

Do you do you expect this patch to be handled?

Signature · 4 lines
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
#23 lore raw

PATCH v2 7/13 mfd: sun6i-prcm: Add support for the ir-clk

Hi,

Quoted 48 lines · Lee Jones
Quoted 6 lines · Hans de Goede

Add support for the ir-clk which is part of the sun6i SoC prcm module.

---
  drivers/mfd/sun6i-prcm.c | 14 ++++++++++++++
  1 file changed, 14 insertions(+)

Pretty standard stuff (

Quoted 5 lines
drivers/mfd/sun6i-prcm.c +0 -0
index 2f2e9f0..1911731 100644

drivers/mfd/sun6i-prcm.c static const struct resource sun6i_a31_apb0_gates_clk_res[] = { · line 50

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +7 -0
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
  	},
  };
 
+static const struct resource sun6i_a31_ir_clk_res[] = {
+	{
+		.start = 0x54,
+		.end = 0x57,
+		.flags = IORESOURCE_MEM,
+	},
+};

I'm still unkeen on this registers not being defined -- but whateveer!

Quoted 6 lines
drivers/mfd/sun6i-prcm.c +0 -0
  static const struct resource sun6i_a31_apb0_rstc_res[] = {
  	{
  		.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
  		.resources = sun6i_a31_apb0_gates_clk_res,
  	},

drivers/mfd/sun6i-prcm.c static const struct mfd_cell sun6i_a31_prcm_subdevs[] = { · line 88

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +6 -0
  	{
+		.name = "sun6i-a31-ir-clk",
+		.of_compatible = "allwinner,sun4i-a10-mod0-clk",
+		.num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+		.resources = sun6i_a31_ir_clk_res,
+	},
+	{
  		.name = "sun6i-a31-apb0-clock-reset",
  		.of_compatible = "allwinner,sun6i-a31-clock-reset",
  		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),

This is all pretty standard stuff:

Quoted 5 lines

For my own reference:

Do you do you expect this patch to be handled?

I've no preference for how this goes upstream. There are no compile time deps and runtime the ir will not work (but not explode) until all the bits are in place.

Regards,

Hans

Quoted 1 line
#24 lore raw

PATCH v2 7/13 mfd: sun6i-prcm: Add support for the ir-clk

Quoted 53 lines · Hans de Goede

Hi,

Quoted 50 lines · Lee Jones
Quoted 6 lines · Hans de Goede

Add support for the ir-clk which is part of the sun6i SoC prcm module.

---
 drivers/mfd/sun6i-prcm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Pretty standard stuff (

Quoted 5 lines
drivers/mfd/sun6i-prcm.c +0 -0
index 2f2e9f0..1911731 100644

drivers/mfd/sun6i-prcm.c static const struct resource sun6i_a31_apb0_gates_clk_res[] = { · line 50

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +7 -0
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
 	},
 };
 
+static const struct resource sun6i_a31_ir_clk_res[] = {
+	{
+		.start = 0x54,
+		.end = 0x57,
+		.flags = IORESOURCE_MEM,
+	},
+};

I'm still unkeen on this registers not being defined -- but whateveer!

Quoted 6 lines
drivers/mfd/sun6i-prcm.c +0 -0
 static const struct resource sun6i_a31_apb0_rstc_res[] = {
 	{
 		.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
 		.resources = sun6i_a31_apb0_gates_clk_res,
 	},

drivers/mfd/sun6i-prcm.c static const struct mfd_cell sun6i_a31_prcm_subdevs[] = { · line 88

Quoted 10 lines
drivers/mfd/sun6i-prcm.c +6 -0
 	{
+		.name = "sun6i-a31-ir-clk",
+		.of_compatible = "allwinner,sun4i-a10-mod0-clk",
+		.num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+		.resources = sun6i_a31_ir_clk_res,
+	},
+	{
 		.name = "sun6i-a31-apb0-clock-reset",
 		.of_compatible = "allwinner,sun6i-a31-clock-reset",
 		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),

This is all pretty standard stuff:

For my own reference:

Quoted 7 lines
Quoted 3 lines

Do you do you expect this patch to be handled?

I've no preference for how this goes upstream. There are no compile time deps and runtime the ir will not work (but not explode) until all the bits are in place.

Great, this is my kind of patch. Applied, thanks.

Signature · 4 lines
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
#25 lore raw

PATCH v2 8/13 ARM: dts: sun6i: Add ir_clk node

In reply to Hans de Goede

Add an ir_clk sub-node to the prcm node.

---
Changes in v2:
-Use allwinner,sun4i-a10-mod0-clk as compatible, rather then a prcm specific
compatible

---
 arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/sun6i-a31.dtsi +7 -0
index f47156b..1c1d255 100644
@@ -878,6 +878,13 @@
 						"apb0_i2c";
 			};
 
+			ir_clk: ir_clk {
+				#clock-cells = <0>;
+				compatible = "allwinner,sun4i-a10-mod0-clk";
+				clocks = <&osc32k>, <&osc24M>;
+				clock-output-names = "ir";
+			};
+
 			apb0_rst: apb0_rst {
 				compatible = "allwinner,sun6i-a31-clock-reset";
 				#reset-cells = <1>;
Signature · 1 line
2.1.0
#26 lore raw

PATCH v2 8/13 ARM: dts: sun6i: Add ir_clk node

Quoted 3 lines · Hans de Goede

Add an ir_clk sub-node to the prcm node.

Applied, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#27 lore raw

PATCH v2 9/13 ARM: dts: sun6i: Add ir node

In reply to Hans de Goede

Add a node for the ir receiver found on the A31.

---
 arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
arch/arm/boot/dts/sun6i-a31.dtsi +10 -0
index 1c1d255..85c6365 100644
@@ -896,6 +896,16 @@
 			reg = <0x01f01c00 0x300>;
 		};
 
+		ir at 01f02000 {
+			compatible = "allwinner,sun5i-a13-ir";
+			clocks = <&apb0_gates 1>, <&ir_clk>;
+			clock-names = "apb", "ir";
+			resets = <&apb0_rst 1>;
+			interrupts = <0 37 4>;
+			reg = <0x01f02000 0x40>;
+			status = "disabled";
+		};
+
 		r_pio: pinctrl at 01f02c00 {
 			compatible = "allwinner,sun6i-a31-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
Signature · 1 line
2.1.0
#28 lore raw

PATCH v2 9/13 ARM: dts: sun6i: Add ir node

Quoted 3 lines · Hans de Goede

Add a node for the ir receiver found on the A31.

Applied, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#29 lore raw

PATCH v2 10/13 ARM: dts: sun6i: Add pinmux settings for the ir pins

In reply to Hans de Goede

Add pinmux settings for the ir receive pin of the A31.

---
 arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/sun6i-a31.dtsi +7 -0
index 85c6365..9e9504c 100644
@@ -918,6 +918,13 @@
 			#interrupt-cells = <2>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
+
+			ir_pins_a: ir at 0 {
+				allwinner,pins = "PL4";
+				allwinner,function = "s_ir";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
 		};
 	};
 };
Signature · 1 line
2.1.0
#30 lore raw

PATCH v2 11/13 ARM: dts: sun6i: Enable ir receiver on the Mele M9

In reply to Hans de Goede

The Mele M9 has an ir receiver, enable it.

---
 arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/boot/dts/sun6i-a31-m9.dts +6 -0
index 3ab544f..fccf709 100644
@@ -121,6 +121,12 @@
 				reg = <1>;
 			};
 		};
+
+		ir at 01f02000 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&ir_pins_a>;
+			status = "okay";
+		};
 	};
 
 	leds {
Signature · 1 line
2.1.0
#31 lore raw

PATCH v2 11/13 ARM: dts: sun6i: Enable ir receiver on the Mele M9

Quoted 3 lines · Hans de Goede

The Mele M9 has an ir receiver, enable it.

Applied, thanks!

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#32 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

In reply to Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
copying everything

---
 arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +62 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};
Signature · 1 line
2.1.0
#33 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Quoted 74 lines · Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:

(quoted diff) +0 -2
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
 copying everything
---
 arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +52 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */

arch/arm/boot/dts/sun6i-a31s.dtsi line 62

Quoted 10 lines
arch/arm/boot/dts/sun6i-a31s.dtsi new file +10 -0
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};

Given your previous changes, you should also update the enable-method.

Also, for this patch and the next one, Arnd just warned me that we shouldn't duplicate the DT path, and that we should switch to the new trend on using label references (like what TI or Amlogic does for example).

I'll take care on converting the existing users, but could you repost these patches with this ?

Thanks,
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#34 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Hi,

Quoted 79 lines · Maxime Ripard
Quoted 78 lines · Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:

(quoted diff) +0 -2
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
  copying everything
---
  arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
  1 file changed, 62 insertions(+)
  create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +56 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
Quoted 8 lines

arch/arm/boot/dts/sun6i-a31s.dtsi line 62

Quoted 6 lines
arch/arm/boot/dts/sun6i-a31s.dtsi new file +6 -0
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};

Given your previous changes, you should also update the enable-method.

I've not added a new compatible for the enable-method, given that this is the exact same die, so the 2 are 100?% compatible, just like you insisted that "allwinner,sun4i-a10-mod0-clk" should be used for the ir-clk since it was 100% compatible to that I believe that the enable method should use the existing compatible and not invent a new one for something which is 100% compatible.

Quoted 4 lines

Also, for this patch and the next one, Arnd just warned me that we shouldn't duplicate the DT path, and that we should switch to the new trend on using label references (like what TI or Amlogic does for example).

Ok, so something like this, right ? :

&pio {
	compatible = "allwinner,sun6i-a31s-pinctrl";
};

Once we've agreement on the enable-method I'll respin this patch and the CSQ CS908 board patch.

Regards,

Hans

#35 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Quoted 91 lines · Hans de Goede

Hi,

Quoted 79 lines · Maxime Ripard
Quoted 78 lines · Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:

(quoted diff) +0 -2
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
 copying everything
---
 arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +56 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
Quoted 8 lines

arch/arm/boot/dts/sun6i-a31s.dtsi line 62

Quoted 6 lines
arch/arm/boot/dts/sun6i-a31s.dtsi new file +6 -0
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};

Given your previous changes, you should also update the enable-method.

Quoted 6 lines

I've not added a new compatible for the enable-method, given that this is the exact same die, so the 2 are 100?% compatible, just like you insisted that "allwinner,sun4i-a10-mod0-clk" should be used for the ir-clk since it was 100% compatible to that I believe that the enable method should use the existing compatible and not invent a new one for something which is 100% compatible.

Yeah, you have a point and I agree, but your patch 3 does add a CPU_METHOD_OF_DECLARE for the A31s.

Since I was going to push the branch now that 3.19-rc1 is out, do you want me to edit your patch before doing so?

Quoted 10 lines
Quoted 4 lines

Also, for this patch and the next one, Arnd just warned me that we shouldn't duplicate the DT path, and that we should switch to the new trend on using label references (like what TI or Amlogic does for example).

Ok, so something like this, right ? :

&pio {
	compatible = "allwinner,sun6i-a31s-pinctrl";
};

Yep.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#36 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Hi,

Quoted 99 lines · Maxime Ripard
Quoted 91 lines · Hans de Goede

Hi,

Quoted 79 lines · Maxime Ripard
Quoted 78 lines · Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:

(quoted diff) +0 -2
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
  copying everything
---
  arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
  1 file changed, 62 insertions(+)
  create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +56 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
Quoted 8 lines

arch/arm/boot/dts/sun6i-a31s.dtsi line 62

Quoted 6 lines
arch/arm/boot/dts/sun6i-a31s.dtsi new file +6 -0
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};

Given your previous changes, you should also update the enable-method.

Quoted 6 lines

I've not added a new compatible for the enable-method, given that this is the exact same die, so the 2 are 100?% compatible, just like you insisted that "allwinner,sun4i-a10-mod0-clk" should be used for the ir-clk since it was 100% compatible to that I believe that the enable method should use the existing compatible and not invent a new one for something which is 100% compatible.

Quoted 2 lines

Yeah, you have a point and I agree, but your patch 3 does add a CPU_METHOD_OF_DECLARE for the A31s.

Ah right, it does, my bad.

Quoted 2 lines

Since I was going to push the branch now that 3.19-rc1 is out, do you want me to edit your patch before doing so?

Yes, please drop the addition of the extra CPU_METHOD_OF_DECLARE, or let me know if you want a new version instead.

Quoted 5 lines
Quoted 5 lines
Quoted 4 lines

Also, for this patch and the next one, Arnd just warned me that we shouldn't duplicate the DT path, and that we should switch to the new trend on using label references (like what TI or Amlogic does for example).

Quoted 7 lines
Quoted 5 lines

Ok, so something like this, right ? :

&pio {
	compatible = "allwinner,sun6i-a31s-pinctrl";
};

Yep.

Regards,

Hans

#37 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Hi,

Quoted 103 lines · Hans de Goede
Quoted 99 lines · Maxime Ripard
Quoted 91 lines · Hans de Goede

Hi,

Quoted 79 lines · Maxime Ripard
Quoted 78 lines · Hans de Goede

Add a dtsi file for A31s based boards.

Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical.

---
Changes in v2:

(quoted diff) +0 -2
-include sun6i-a31.dtsi and override the pinctrl compatible, rather then
 copying everything
---
 arch/arm/boot/dts/sun6i-a31s.dtsi | 62 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi
arch/arm/boot/dts/sun6i-a31s.dtsi new file +56 -0
new file mode 100644
index 0000000..d0bd2b9
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2014 Hans de Goede <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * The A31s is the same die as the A31 in a different package, this is
+ * reflected by it having different pinctrl compatible everything else is
+ * identical.
+ */
+
+/include/ "sun6i-a31.dtsi"
+
+/ {
Quoted 8 lines

arch/arm/boot/dts/sun6i-a31s.dtsi line 62

Quoted 6 lines
arch/arm/boot/dts/sun6i-a31s.dtsi new file +6 -0
+	soc at 01c00000 {
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun6i-a31s-pinctrl";
+		};
+	};
+};

Given your previous changes, you should also update the enable-method.

Quoted 6 lines

I've not added a new compatible for the enable-method, given that this is the exact same die, so the 2 are 100?% compatible, just like you insisted that "allwinner,sun4i-a10-mod0-clk" should be used for the ir-clk since it was 100% compatible to that I believe that the enable method should use the existing compatible and not invent a new one for something which is 100% compatible.

Quoted 2 lines

Yeah, you have a point and I agree, but your patch 3 does add a CPU_METHOD_OF_DECLARE for the A31s.

Quoted 7 lines

Ah right, it does, my bad.

Quoted 2 lines

Since I was going to push the branch now that 3.19-rc1 is out, do you want me to edit your patch before doing so?

Yes, please drop the addition of the extra CPU_METHOD_OF_DECLARE, or let me know if you want a new version instead.

I just modified it, and pushed it, no need to resend it.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#38 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Hi,

Quoted 5 lines · Maxime Ripard

Hi,

Quoted 2 lines · Hans de Goede
Quoted 1 line · Maxime Ripard

On Sat, Dec 20, 2014 at 11:24:55AM +0100, Hans de Goede wrote:

<snip>

Quoted 14 lines
Quoted 14 lines
Quoted 11 lines
Quoted 8 lines
Quoted 1 line

Given your previous changes, you should also update the enable-method.

I've not added a new compatible for the enable-method, given that this is the exact same die, so the 2 are 100?% compatible, just like you insisted that "allwinner,sun4i-a10-mod0-clk" should be used for the ir-clk since it was 100% compatible to that I believe that the enable method should use the existing compatible and not invent a new one for something which is 100% compatible.

Yeah, you have a point and I agree, but your patch 3 does add a CPU_METHOD_OF_DECLARE for the A31s.

Ah right, it does, my bad.

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

Since I was going to push the branch now that 3.19-rc1 is out, do you want me to edit your patch before doing so?

Yes, please drop the addition of the extra CPU_METHOD_OF_DECLARE, or let me know if you want a new version instead.

I just modified it, and pushed it, no need to resend it.

Thanks, while looking at your dt-for-3.20 branch I noticed that you've merged v2 of "ARM: dts: sun6i: Add ir node", I did a v3 adding an ir:
label to the node, which I noticed was missing because you asked me to move the a31s dt stuff to moving label references, can you fix this up, or do you want me to do a follow up patch ?

Note that having this fixed is a pre-req for the csq-cs908 dts patch.

Regards,

Hans

#39 lore raw

PATCH v2 12/13 ARM: dts: sun6i: Add sun6i-a31s.dtsi

Hi,

Quoted 7 lines · Hans de Goede

Thanks, while looking at your dt-for-3.20 branch I noticed that you've merged v2 of "ARM: dts: sun6i: Add ir node", I did a v3 adding an ir:
label to the node, which I noticed was missing because you asked me to move the a31s dt stuff to moving label references, can you fix this up, or do you want me to do a follow up patch ?

Note that having this fixed is a pre-req for the csq-cs908 dts patch.

Ah, right. I edited your previous patch to add the label.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#40 lore raw

PATCH v2 13/13 ARM: dts: sun6i: Add dts file for CSQ CS908 board

In reply to Hans de Goede

The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND, rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG controller), ethernet, 3.5 mm jack with a/v out and hdmi out.

Note it has no sdcard slot and therefore can only be fel booted.

---
 arch/arm/boot/dts/Makefile             |   3 +-
 arch/arm/boot/dts/sun6i-a31s-cs908.dts | 109 +++++++++++++++++++++++++++++++++
 2 files changed, 111 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-cs908.dts
arch/arm/boot/dts/Makefile +2 -1
index bc58ac3..28506ab 100644
@@ -459,7 +459,8 @@ dtb-$(CONFIG_MACH_SUN6I) += \
 	sun6i-a31-app4-evb1.dtb \
 	sun6i-a31-colombus.dtb \
 	sun6i-a31-hummingbird.dtb \
-	sun6i-a31-m9.dtb
+	sun6i-a31-m9.dtb \
+	sun6i-a31s-cs908.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
 	sun7i-a20-bananapi.dtb \
 	sun7i-a20-cubieboard2.dtb \
arch/arm/boot/dts/sun6i-a31s-cs908.dts new file +109 -0

109 lines not on this page · raw message

Signature · 1 line
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