Add Armada 38x GP and AP boards support
Subsystems (5)
v4 cover Add Armada 38x GP and AP boards support
Hi,
This set of patches adds the support for the Armada 385 AP and GP boards. It introduce the bindings for the Armada388 SoC variants and also adds a few clean ups here and there, a few missing pin functions needed for the board, etc.
It follows the v3 of the AP patch set:
http://thread.gmane.org/gmane.linux.ports.arm.kernel/383709
and the v2 of the GP patch set:
http://www.spinics.net/lists/arm-kernel/msg389259.html.
Thanks,
Gregory
AP changelog:
Changes from v3:
- Switched the dts license to the dual one X11/GPL
Changes from v2:
- Removed the i2c1 bus that is not used
- Added comments for the i2c0 and the UARTs
- Removed the i2c clk-frequency property
- Fixed the SPI-NOR maximum frequency
- Fixed the phy nodes unit addresses
- Add the /chosen/stdout-path property
- Changed the filename to match the board compatible
Changes from v1:
- Removed USB3 support. This required some additional patches for the phy and USB drivers that are not really related to this serie. This will be submitted as a separate one.
- Removed earlyprintk from the default bootargs
- Removed two unneeded ranges
- Changed the phy pins node name to mdio
- Moved most of the pinctrl nodes to the DTSI
- Added a comment to mention why the phy reference clock is needed.
- Rebased on top of 3.19-rc1
GP Changelog:
v2 -> v4:
- fixed the indentation of the speed-map of gpio-fan
- moved the 2ns SATA controller node in the armada388.dtsi file
- converted the DB and RD board to the Armada 388 SoC
v1 -> v2:
- removed the earlyprintk in the command line
- added the stdout-path for the bootloader
- added the pinctrl configuration for all the node that need it
- renamed pca9555_ into expander
- added comment about the connector
- switched the PHY address to match the hardware
- removed the nr-ports property which is specific to the mv-sata and not the ahci
- removed the clock-frequency property of the sdhci node
- formatted the speed-map of gpio-fan with a newline between the map entries
- removed the SATA regulators
- added the dtsi for the Armada 388 variant
Gregory CLEMENT (5):
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Add Armada 388 General Purpose Development Board support
Maxime Ripard (7):
ARM: mvebu: Rename DEBUG_LL to indicate UART index
ARM: mvebu: Add UART1 as DEBUG_LL possible target
ARM: mvebu: a38x: Fix node names
pinctrl: mvebu: a38x: Add UART1 muxing options
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
.../devicetree/bindings/arm/armada-38x.txt | 7 +
arch/arm/Kconfig.debug | 35 ++-
arch/arm/boot/dts/Makefile | 6 +-
arch/arm/boot/dts/armada-380.dtsi | 3 +-
arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++
arch/arm/boot/dts/armada-385-gp.dts | 288 +++++++++++++++++++++
arch/arm/boot/dts/armada-385.dtsi | 3 +-
.../dts/{armada-385-db.dts => armada-388-db.dts} | 9 +-
.../dts/{armada-385-rd.dts => armada-388-rd.dts} | 9 +-
arch/arm/boot/dts/armada-388.dtsi | 70 +++++
arch/arm/boot/dts/armada-38x.dtsi | 93 ++++++-
drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 +-
12 files changed, 678 insertions(+), 29 deletions(-)
create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
create mode 100644 arch/arm/boot/dts/armada-385-gp.dts
rename arch/arm/boot/dts/{armada-385-db.dts => armada-388-db.dts} (92%)
rename arch/arm/boot/dts/{armada-385-rd.dts => armada-388-rd.dts} (88%)
create mode 100644 arch/arm/boot/dts/armada-388.dtsiSignature · 1 line
1.9.1
PATCH v4 1/12 ARM: mvebu: Rename DEBUG_LL to indicate UART index
From: Maxime Ripard <[email protected]>
The mvebu SoCs actually have more UARTs than just the one exposed in DEBUG_LL yet.
In order to differentiate them, Add the index in the configuration options and their help.
--- arch/arm/Kconfig.debug | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
arch/arm/Kconfig.debug +9 -9
@@ -455,13 +455,13 @@ choice Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration options based on your needs. - config DEBUG_MVEBU_UART - bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)" + config DEBUG_MVEBU_UART0 + bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)" depends on ARCH_MVEBU select DEBUG_UART_8250 help Say Y here if you want kernel low-level debugging support - on MVEBU based platforms. + on MVEBU based platforms on UART0. This option should be used with the old bootloaders that left the internal registers mapped at
@@ -474,13 +474,13 @@ choice when u-boot hands over to the kernel, the system silently crashes, with no serial output at all. - config DEBUG_MVEBU_UART_ALTERNATE - bool "Kernel low-level debugging messages via MVEBU UART (new bootloaders)" + config DEBUG_MVEBU_UART0_ALTERNATE + bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)" depends on ARCH_MVEBU select DEBUG_UART_8250 help Say Y here if you want kernel low-level debugging support - on MVEBU based platforms. + on MVEBU based platforms on UART0. This option should be used with the new bootloaders that remap the internal registers at 0xf1000000.
@@ -1282,7 +1282,7 @@ config DEBUG_UART_PHYS default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX - default 0xd0012000 if DEBUG_MVEBU_UART + default 0xd0012000 if DEBUG_MVEBU_UART0 default 0xc81004c0 if DEBUG_MESON_UARTAO default 0xd4017000 if DEBUG_MMP_UART2 default 0xd4018000 if DEBUG_MMP_UART3
@@ -1296,7 +1296,7 @@ config DEBUG_UART_PHYS default 0xe8008000 if DEBUG_R7S72100_SCIF2 default 0xf0000be0 if ARCH_EBSA110 default 0xf040ab00 if DEBUG_BRCMSTB_UART - default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE + default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ ARCH_ORION5X default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1377,7 +1377,7 @@ config DEBUG_UART_VIRT default 0xfeb30c00 if DEBUG_KEYSTONE_UART0 default 0xfeb31000 if DEBUG_KEYSTONE_UART1 default 0xfec02000 if DEBUG_SOCFPGA_UART - default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE + default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
Signature · 1 line
1.9.1
PATCH v4 2/12 ARM: mvebu: Add UART1 as DEBUG_LL possible target
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
Some mvebu boards have the UART1 more easily accessible than the other UARTs found on the system.
Add a debug_ll option for this case.
--- arch/arm/Kconfig.debug | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm/Kconfig.debug +17 -0
@@ -489,6 +489,21 @@ choice when u-boot hands over to the kernel, the system silently crashes, with no serial output at all. + config DEBUG_MVEBU_UART1_ALTERNATE + bool "Kernel low-level debugging messages via MVEBU UART1 (new bootloaders)" + depends on ARCH_MVEBU + select DEBUG_UART_8250 + help + Say Y here if you want kernel low-level debugging support + on MVEBU based platforms on UART1. + + This option should be used with the new bootloaders + that remap the internal registers at 0xf1000000. + + If the wrong DEBUG_MVEBU_UART* option is selected, + when u-boot hands over to the kernel, the system + silently crashes, with no serial output at all. + config DEBUG_VF_UART bool "Vybrid UART" depends on SOC_VF610
@@ -1297,6 +1312,7 @@ config DEBUG_UART_PHYS default 0xf0000be0 if ARCH_EBSA110 default 0xf040ab00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE + default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ ARCH_ORION5X default 0xf7fc9000 if DEBUG_BERLIN_UART
@@ -1378,6 +1394,7 @@ config DEBUG_UART_VIRT default 0xfeb31000 if DEBUG_KEYSTONE_UART1 default 0xfec02000 if DEBUG_SOCFPGA_UART default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE + default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfec90000 if DEBUG_RK32_UART2 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
Signature · 1 line
1.9.1
PATCH v4 3/12 ARM: mvebu: a38x: Fix node names
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
Some nodes in the DTs have a reg property but no unit name in their node name.
This contradicts the way the ePAPR defines the node names. Fix this.
--- arch/arm/boot/dts/armada-380.dtsi | 2 +- arch/arm/boot/dts/armada-385-db.dts | 2 +- arch/arm/boot/dts/armada-385-rd.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/armada-380.dtsi +1 -1
@@ -32,7 +32,7 @@ soc { internal-regs { - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6810-pinctrl"; reg = <0x18000 0x20>; };
arch/arm/boot/dts/armada-385-db.dts +1 -1
@@ -74,7 +74,7 @@ phy-mode = "rgmii-id"; }; - mdio { + mdio at 72004 { phy0: ethernet-phy at 0 { reg = <0>; };
arch/arm/boot/dts/armada-385-rd.dts +1 -1
@@ -67,7 +67,7 @@ }; - mdio { + mdio at 72004 { phy0: ethernet-phy at 0 { reg = <0>; };
arch/arm/boot/dts/armada-385.dtsi +1 -1
@@ -37,7 +37,7 @@ soc { internal-regs { - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
arch/arm/boot/dts/armada-38x.dtsi +2 -2
@@ -193,7 +193,7 @@ status = "disabled"; }; - pinctrl { + pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
@@ -373,7 +373,7 @@ status = "disabled"; }; - mdio { + mdio at 72004 { #address-cells = <1>; #size-cells = <0>; compatible = "marvell,orion-mdio";
Signature · 1 line
1.9.1
PATCH v4 4/12 pinctrl: mvebu: a38x: Add UART1 muxing options
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
The MPP19 and MMP20 pins also have the ability to be muxed to the uart1 function.
Add this case to the pinctrl driver.
--- drivers/pinctrl/mvebu/pinctrl-armada-38x.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
drivers/pinctrl/mvebu/pinctrl-armada-38x.c +4 -2
@@ -145,14 +145,16 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = { MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS), MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS), MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS), - MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)), + MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS), + MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6810_PLUS)),MPP_MODE (20 ,MPP_VAR_FUNCTION (0 ,"gpio" ,NULL ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (1 ,"ge0" ,"txclk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (2 ,"ptp" ,"clk" ,V_88F6810_PLUS ),MPP_VAR_FUNCTION (3 ,"pcie1" ,"rstout" ,V_88F6820_PLUS ),MPP_VAR_FUNCTION (4 ,"sata0" ,"prsnt" ,V_88F6810_PLUS ), -MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS )), +MPP_VAR_FUNCTION (5 ,"ua0" ,"rts" ,V_88F6810_PLUS ), +MPP_VAR_FUNCTION (6 ,"ua1" ,"txd" ,V_88F6810_PLUS )), MPP_MODE(21, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS), MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
Signature · 1 line
1.9.1
PATCH v4 5/12 ARM: mvebu: A38x: Remove redundant pinctrl informations
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
The compatible set in the armada-38x DTSI is always overridden, and the reg defined in there is duplicated in the armada-380 and armada-385 DTSIs.
Remove these useless items.
--- arch/arm/boot/dts/armada-380.dtsi | 1 - arch/arm/boot/dts/armada-385.dtsi | 1 - arch/arm/boot/dts/armada-38x.dtsi | 1 - 3 files changed, 3 deletions(-)
arch/arm/boot/dts/armada-380.dtsi +0 -1
@@ -34,7 +34,6 @@ internal-regs { pinctrl at 18000 { compatible = "marvell,mv88f6810-pinctrl"; - reg = <0x18000 0x20>; }; };
arch/arm/boot/dts/armada-385.dtsi +0 -1
@@ -39,7 +39,6 @@ internal-regs { pinctrl at 18000 { compatible = "marvell,mv88f6820-pinctrl"; - reg = <0x18000 0x20>; }; };
arch/arm/boot/dts/armada-38x.dtsi +0 -1
@@ -194,7 +194,6 @@ }; pinctrl at 18000 { - compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; };
Signature · 1 line
1.9.1
PATCH v4 6/12 ARM: mvebu: Add a number of pinctrl functions
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
Some pinctrl functions can be shared with all DTS out there, since they are generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid duplication.
--- arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +39 -0
@@ -195,6 +195,45 @@ pinctrl at 18000 { reg = <0x18000 0x20>; + + ge0_rgmii_pins: ge-rgmii-pins-0 { + marvell,pins = "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "ge0"; + }; + + i2c0_pins: i2c-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; + }; + + mdio_pins: mdio-pins { + marvell,pins = "mpp4", "mpp5"; + marvell,function = "ge"; + }; + + ref_clk0_pins: ref-clk-pins-0 { + marvell,pins = "mpp45"; + marvell,function = "ref"; + }; + + spi1_pins: spi-pins-1 { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59"; + marvell,function = "spi1"; + }; + + uart0_pins: uart-pins-0 { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "ua0"; + }; + + uart1_pins: uart-pins-1 { + marvell,pins = "mpp19", "mpp20"; + marvell,function = "ua1"; + }; }; gpio0: gpio at 18100 {
Signature · 1 line
1.9.1
PATCH v4 7/12 ARM: mvebu: Add Armada 385 Access Point Development Board support
In reply to Gregory CLEMENTFrom: Maxime Ripard <[email protected]>
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage.
[gregory.clement at free-electrons.com: switch the license to the dual X11/GPL with the agreement of the author]
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++++++++++++++++++++++ 2 files changed, 179 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -535,6 +535,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-385-db.dtb \ + armada-385-db-ap.dtb \ armada-385-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \
arch/arm/boot/dts/armada-385-db-ap.dts new file +178 -0
178 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH v4 7/12 ARM: mvebu: Add Armada 385 Access Point Development Board support
Dear Gregory CLEMENT,
Quoted 1 line · Gregory CLEMENT
+#include "
armada-385.dtsi"
Is it an Armada 385 or an Armada 388 ?
Thanks,
Thomas
Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
PATCH v4 7/12 ARM: mvebu: Add Armada 385 Access Point Development Board support
Hi Thomas,
Quoted 7 lines · Thomas Petazzoni
Dear Gregory CLEMENT,
Quoted 1 line · Gregory CLEMENT
+#include "
armada-385.dtsi"Is it an Armada 385 or an Armada 388 ?
I checked it and there is no SATA ports on the board and the SoC presented itself as an Armada 385: the revision ID is 0x6820.
Thanks,
Gregory
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH v4 7/12 ARM: mvebu: Add Armada 385 Access Point Development Board support
Dear Gregory CLEMENT,
Quoted 4 lines · Gregory CLEMENT
Quoted 1 line
Is it an Armada 385 or an Armada 388 ?
I checked it and there is no SATA ports on the board and the SoC presented itself as an Armada 385: the revision ID is
0x6820.
Great, thanks for the double check!
Best regards,
Thomas
Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
PATCH v4 8/12 ARM: mvebu: a38x: Add more pinctrl functions
In reply to Gregory CLEMENTWith the Armada 385 GP board more pinctrl functions depending of the SoC are needed. Add them to the DTSI to avoid duplication.
--- arch/arm/boot/dts/armada-38x.dtsi | 47 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
arch/arm/boot/dts/armada-38x.dtsi +47 -0
@@ -204,6 +204,14 @@ marvell,function = "ge0"; }; + ge1_rgmii_pins: ge-rgmii-pins-1 { + marvell,pins = "mpp21", "mpp27", "mpp28", + "mpp29", "mpp30", "mpp31", + "mpp32", "mpp37", "mpp38", + "mpp39", "mpp40", "mpp41"; + marvell,function = "ge1"; + }; + i2c0_pins: i2c-pins-0 { marvell,pins = "mpp2", "mpp3"; marvell,function = "i2c0";
@@ -219,6 +227,17 @@ marvell,function = "ref"; }; + ref_clk1_pins: ref-clk-pins-1 { + marvell,pins = "mpp46"; + marvell,function = "ref"; + }; + + spi0_pins: spi-pins-0 { + marvell,pins = "mpp22", "mpp23", "mpp24", + "mpp25"; + marvell,function = "spi0"; + }; + spi1_pins: spi-pins-1 { marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
@@ -234,6 +253,34 @@ marvell,pins = "mpp19", "mpp20"; marvell,function = "ua1"; }; + + sdhci_pins: sdhci-pins { + marvell,pins = "mpp48", "mpp49", "mpp50", + "mpp52", "mpp53", "mpp54", + "mpp55", "mpp57", "mpp58", + "mpp59"; + marvell,function = "sd0"; + }; + + sata0_pins: sata-pins-0 { + marvell,pins = "mpp20"; + marvell,function = "sata0"; + }; + + sata1_pins: sata-pins-1 { + marvell,pins = "mpp19"; + marvell,function = "sata1"; + }; + + sata2_pins: sata-pins-2 { + marvell,pins = "mpp47"; + marvell,function = "sata2"; + }; + + sata3_pins: sata-pins-3 { + marvell,pins = "mpp44"; + marvell,function = "sata3"; + }; }; gpio0: gpio at 18100 {
Signature · 1 line
1.9.1
PATCH v4 9/12 ARM: mvebu: a38x: Add missing labels
In reply to Gregory CLEMENTThe pintcrl label was missing. Adding it allowed referring it from the root of the device tree. Also add the uart0 label used by the bootloader.
--- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/armada-38x.dtsi +2 -2
@@ -173,7 +173,7 @@ status = "disabled"; }; - serial at 12000 { + uart0: serial at 12000 { compatible = "snps,dw-apb-uart"; reg = <0x12000 0x100>; reg-shift = <2>;
@@ -193,7 +193,7 @@ status = "disabled"; }; - pinctrl at 18000 { + pinctrl: pinctrl at 18000 { reg = <0x18000 0x20>; ge0_rgmii_pins: ge-rgmii-pins-0 {
Signature · 1 line
1.9.1
PATCH v4 10/12 ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
In reply to Gregory CLEMENTUpdate the binding documentation of the Armada 38x Soc family with the Armada 388.
--- Documentation/devicetree/bindings/arm/armada-38x.txt | 7 +++++++ 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/arm/armada-38x.txt +7 -0
@@ -15,6 +15,13 @@ Required root node property: compatible: must contain "marvell,armada385" +In addition, boards using the Marvell Armada 388 SoC shall have the +following property before the previous one: + +Required root node property: + +compatible: must contain "marvell,armada388" + Example: compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
Signature · 1 line
1.9.1
PATCH v4 11/12 ARM: mvebu: Add Device Tree description of the Armada 388 SoC
In reply to Gregory CLEMENTThis SoC belongs to the Armada 38x family. The main difference with the Armada 385 is that the 388 can handle two more SATA ports. Currently the consequence is the use of a different compatible string for the pinctrl node, in order to be able to use the pins associated to this 2 new SATA ports. The second SATA controller has also been moved from the armada38x.dtsi as it it specific to the Armada388 version.
In the same time the Armada385 DB and Armada 385 RD board have been renamed in the 388 one and now include the armada-388.dtsi file. AS both of them have 4 SATA ports the SoC used on them were wrongly described.
---
arch/arm/boot/dts/Makefile | 4 +-
.../dts/{armada-385-db.dts => armada-388-db.dts} | 7 ++-
.../dts/{armada-385-rd.dts => armada-388-rd.dts} | 7 ++-
arch/arm/boot/dts/armada-388.dtsi | 70 ++++++++++++++++++++++
4 files changed, 80 insertions(+), 8 deletions(-)
rename arch/arm/boot/dts/{armada-385-db.dts => armada-388-db.dts} (93%)
rename arch/arm/boot/dts/{armada-385-rd.dts => armada-388-rd.dts} (89%)
create mode 100644 arch/arm/boot/dts/armada-388.dtsiarch/arm/boot/dts/Makefile +2 -2
@@ -534,9 +534,9 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-db.dtb \ armada-385-db-ap.dtb \ - armada-385-rd.dtb + armada-388-db.dtb \ + armada-388-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \ armada-xp-db.dtb \
arch/arm/boot/dts/armada-388-db.dts renamed from arch/arm/boot/dts/armada-385-db.dts +4 -3
@@ -1,5 +1,5 @@ /* - * Device Tree file for Marvell Armada 385 evaluation board + * Device Tree file for Marvell Armada 388 evaluation board * (DB-88F6820) * * Copyright (C) 2014 Marvell
@@ -12,11 +12,12 @@ */ /dts-v1/; -#include "armada-385.dtsi" +#include "armada-388.dtsi" / { model = "Marvell Armada 385 Development Board"; - compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380"; + compatible = "marvell,a385-db", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; chosen { bootargs = "console=ttyS0,115200 earlyprintk";
arch/arm/boot/dts/armada-388-rd.dts renamed from arch/arm/boot/dts/armada-385-rd.dts +4 -3
@@ -1,5 +1,5 @@ /* - * Device Tree file for Marvell Armada 385 Reference Design board + * Device Tree file for Marvell Armada 388 Reference Design board * (RD-88F6820-AP) * * Copyright (C) 2014 Marvell
@@ -13,11 +13,12 @@ */ /dts-v1/; -#include "armada-385.dtsi" +#include "armada-388.dtsi" / { model = "Marvell Armada 385 Reference Design"; - compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; + compatible = "marvell,a385-rd", "marvell,armada388", + "marvell,armada385","marvell,armada380"; chosen { bootargs = "console=ttyS0,115200 earlyprintk";
arch/arm/boot/dts/armada-388.dtsi new file +70 -0
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Signature · 1 line
1.9.1
PATCH v4 12/12 ARM: mvebu: Add Armada 388 General Purpose Development Board support
In reply to Gregory CLEMENTThe A388-GP is a board produced by Marvell that holds
- 1 PCIe slot
- 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, muxing is selected through the GPIO expander)
- 1 16MB SPI-NOR
- 2 Gigabit Ethernet ports
- 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, muxing is selected through the GPIO expander)
- 1 SDIO slot
- 1 USB3 port
- 2 USB2 port
- 2 GPIO/interrupts expander on I2C
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-gp.dts | 288 ++++++++++++++++++++++++++++++++++++ 2 files changed, 289 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-gp.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -536,6 +536,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-385-db-ap.dtb \ armada-388-db.dtb \ + armada-388-gp.dtb \ armada-388-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \
arch/arm/boot/dts/armada-385-gp.dts new file +288 -0
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Signature · 1 line
1.9.1
Andrew Lunn
maintainerv4 cover Add Armada 38x GP and AP boards support
In reply to Gregory CLEMENTQuoted 6 lines
Gregory CLEMENT (5):
ARM: mvebu: a38x: Add more pinctrl functions
ARM: mvebu: a38x: Add missing labels
ARM: mvebu: Document the Device Tree binding for the Armada 388 SoC
ARM: mvebu: Add Device Tree description of the Armada 388 SoC
ARM: mvebu: Add Armada 388 General Purpose Development Board support
All added to mvebu/dt
Quoted 4 lines
Maxime Ripard (7):
ARM: mvebu: RenameDEBUG_LLto indicate UART index
ARM: mvebu: Add UART1 asDEBUG_LLpossible target
Added to mvebu/soc
Quoted 1 line
ARM: mvebu: a38x: Fix node names
All added to mvebu/dt
Quoted 1 line
pinctrl: mvebu: a38x: Add UART1 muxing options
Linus took this one already
Quoted 3 lines
ARM: mvebu: A38x: Remove redundant pinctrl informations
ARM: mvebu: Add a number of pinctrl functions
ARM: mvebu: Add Armada 385 Access Point Development Board support
All added to mvebu/dt
Thanks
Andrew