arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
PATCH 1/1 arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
Whenever Suspend PHY bit is set on DRA7x devices, USB will not work due to Set EP Configuration command always failing.
This was only found after a recent commit 2164a47 (usb:
dwc3: set SUSPHY bit for all cores, which will be merged for v3.19) added a missing *required* step to dwc3 initialization. Synopsys Databook requires that we enable Suspend PHY bit after initialization but that, unfortunately, breaks DRA7x.
Note that the same regression was already patched for AM437x.
---
Tony, this fixes a regression with v3.19
arch/arm/boot/dts/dra7.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)
arch/arm/boot/dts/dra7.dtsi +6 -0
@@ -1257,6 +1257,8 @@ tx-fifo-resize; maximum-speed = "super-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };
@@ -1278,6 +1280,8 @@ tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };
@@ -1299,6 +1303,8 @@ tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };
Signature · 1 line
2.2.0
PATCH 1/1 arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
Quoted 11 lines · Felipe Balbi
Whenever Suspend PHY bit is set on DRA7x devices, USB will not work due to Set EP Configuration command always failing.
This was only found after a recent commit 2164a47 (usb:
dwc3: set SUSPHY bit for all cores, which will be merged for v3.19) added a missing *required* step to dwc3 initialization. Synopsys Databook requires that we enable Suspend PHY bit after initialization but that, unfortunately, breaks DRA7x.
Quoted 7 lines
Note that the same regression was already patched for AM437x.
Reported-by Roger Quadros <[email protected]>Signed-off-by Felipe Balbi <[email protected]>---
Tony, this fixes a regression with v3.19
OK applying into omap-for-v3.19/fixes thanks.
Tony
Quoted 41 lines
arch/arm/boot/dts/dra7.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)arch/arm/boot/dts/dra7.dtsi +6
-0@@ -1257,6 +1257,8 @@ tx-fifo-resize; maximum-speed = "super-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };@@ -1278,6 +1280,8 @@ tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };@@ -1299,6 +1303,8 @@ tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; }; };Signature · 6 lines
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