ARM: Add ARMv7-M support

new file mode 100644
index 0000000..3279f12
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+extra-y	= start.o
+obj-y	= cpu.o

new file mode 100644
index 0000000..37cfff9
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2014
+# Kamil Lulko, <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+PLATFORM_CPPFLAGS +=  -march=armv7-m -mthumb

new file mode 100644
index 0000000..730c775
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2014
+ * Kamil Lulko, <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+
+.globl	reset
+.type reset, %function
+reset:
+	bl	_main
+
+.globl	c_runtime_cpu_setup
+c_runtime_cpu_setup:
+	mov	pc, lr

index d74e4b8..dd3afb8 100644
@@ -8,11 +8,15 @@
 lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _ashldi3.o _ashrdi3.o _divsi3.o \
 			_lshrdi3.o _modsi3.o _udivsi3.o _umodsi3.o div0.o
 
+ifdef CONFIG_ARMV7M
+obj-y	+= vectors_m.o crt0.o
+else
 ifdef CONFIG_ARM64
 obj-y	+= crt0_64.o
 else
 obj-y	+= vectors.o crt0.o
 endif
+endif
 
 ifndef CONFIG_SPL_BUILD
 ifdef CONFIG_ARM64

@@ -35,12 +39,16 @@ endif
 obj-$(CONFIG_SEMIHOSTING) += semihosting.o
 
 obj-y	+= sections.o
+ifdef CONFIG_ARMV7M
+obj-y	+= interrupts_m.o
+else
 ifdef CONFIG_ARM64
 obj-y	+= gic_64.o
 obj-y	+= interrupts_64.o
 else
 obj-y	+= interrupts.o
 endif
+endif
 obj-y	+= reset.o
 
 obj-y	+= cache.o

index 22df3e5..21e05e6 100644
@@ -9,6 +9,9 @@
 #include <config.h>
 #include <asm-offsets.h>
 #include <linux/linkage.h>
+#if defined(CONFIG_ARMV7M)
+#include <asm/armv7m.h>
+#endif
 
 /*
  * This file handles the target-independent stages of the U-Boot

@@ -66,15 +69,32 @@ ENTRY(_main)
 #else
 	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
 #endif
+#if defined(CONFIG_ARMV7M)
+	/* 8-byte alignment for ABI compliance armv7-m version */
+	mov r3, sp
+	bic r3, r3, #7
+	mov sp, r3
+#else
 	bic	sp, sp, #7	/* 8-byte alignment for ABI compliance */
+#endif
 	mov	r2, sp
 	sub	sp, sp, #GD_SIZE	/* allocate one GD above SP */
+#if defined(CONFIG_ARMV7M)
+	/* 8-byte alignment for ABI compliance armv7-m version */
+	mov r3, sp
+	bic r3, r3, #7
+	mov sp, r3
+#else
 	bic	sp, sp, #7	/* 8-byte alignment for ABI compliance */
+#endif
 	mov	r9, sp		/* GD is above SP */
 	mov	r1, sp
 	mov	r0, #0
 clr_gd:
 	cmp	r1, r2			/* while not at end of GD */
+#if defined(CONFIG_ARMV7M)
+	itt lo
+#endif
 	strlo	r0, [r1]		/* clear 32-bit GD word */
 	addlo	r1, r1, #4		/* move to next */
 	blo	clr_gd

@@ -94,13 +114,23 @@ clr_gd:
  */
 
 	ldr	sp, [r9, #GD_START_ADDR_SP]	/* sp = gd->start_addr_sp */
+#if defined(CONFIG_ARMV7M)
+	/* 8-byte alignment for ABI compliance armv7-m version */
+	mov r3, sp
+	bic r3, r3, #7
+	mov sp, r3
+#else
 	bic	sp, sp, #7	/* 8-byte alignment for ABI compliance */
+#endif
 	ldr	r9, [r9, #GD_BD]		/* r9 = gd->bd */
 	sub	r9, r9, #GD_SIZE		/* new GD is below bd */
 
 	adr	lr, here
 	ldr	r0, [r9, #GD_RELOC_OFF]		/* r0 = gd->reloc_off */
 	add	lr, lr, r0
+#if defined(CONFIG_ARMV7M)
+	orr lr, #1				/* Set bit 0 as required by Thumb-2 */
+#endif
 	ldr	r0, [r9, #GD_RELOCADDR]		/* r0 = gd->relocaddr */
 	b	relocate_code
 here:

@@ -120,6 +150,9 @@ here:
 	mov	r2, #0x00000000		/* prepare zero to clear BSS */
 
 clbss_l:cmp	r0, r1			/* while not at end of BSS */
+#if defined(CONFIG_ARMV7M)
+	itt lo
+#endif
 	strlo	r2, [r0]		/* clear 32-bit BSS word */
 	addlo	r0, r0, #4		/* move to next */
 	blo	clbss_l

index 92f5314..ef2a274 100644
@@ -9,6 +9,10 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <linux/linkage.h>
+#include <config.h>
+#if defined(CONFIG_ARMV7M)
+#include <asm/armv7m.h>
+#endif
 
 /*
  * Default/weak exception vectors relocation routine

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