Generic IOMMU page table framework
Subsystems (3)
v2 cover Generic IOMMU page table framework
Hello,
This is version two of the patch series I originally posted here:
v1: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/306786.html
Changes since v1 include:
- Separated 32-bit and 64-bit regimes
- Limited pgd allocation when a full page is not required
- Addition of NS quirk, needed by Laurent for the Renesas IOMMU
- Added kerneldoc for the API to IOMMU drivers
- A few minor changes after feedback on the list
All feedback welcome,
Will
--->8
Laurent Pinchart (1):
iommu: io-pgtable-arm: add non-secure quirk
Will Deacon (4):
iommu: introduce generic page table allocation framework
iommu: add ARM LPAE page table allocator
iommu: add self-consistency tests to ARM LPAE IO page table allocator iommu/arm-smmu: make use of generic LPAE allocator
MAINTAINERS | 1 + arch/arm64/Kconfig | 1 - drivers/iommu/Kconfig | 32 +- drivers/iommu/Makefile | 2 + drivers/iommu/arm-smmu.c | 886 +++++++++++------------------------- drivers/iommu/io-pgtable-arm.c | 986 +++++++++++++++++++++++++++++++++++++++++ drivers/iommu/io-pgtable.c | 82 ++++ drivers/iommu/io-pgtable.h | 143 ++++++ 8 files changed, 1506 insertions(+), 627 deletions(-) create mode 100644 drivers/iommu/io-pgtable-arm.c create mode 100644 drivers/iommu/io-pgtable.c create mode 100644 drivers/iommu/io-pgtable.h
Signature · 1 line
2.1.4
PATCH v2 1/5 iommu: introduce generic page table allocation framework
This patch introduces a generic framework for allocating page tables for an IOMMU. There are a number of reasons we want to do this:
- It avoids duplication of complex table management code in IOMMU drivers that use the same page table format
- It removes any coupling with the CPU table format (and even the architecture!)
- It defines an API for IOMMU TLB maintenance
--- drivers/iommu/Kconfig | 8 +++ drivers/iommu/Makefile | 1 + drivers/iommu/io-pgtable.c | 71 +++++++++++++++++++++++++ drivers/iommu/io-pgtable.h | 128 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 208 insertions(+) create mode 100644 drivers/iommu/io-pgtable.c create mode 100644 drivers/iommu/io-pgtable.h
drivers/iommu/Kconfig +8 -0
@@ -13,6 +13,14 @@ menuconfig IOMMU_SUPPORT if IOMMU_SUPPORT +menu "Generic IOMMU Pagetable Support" + +# Selected by the actual pagetable implementations +config IOMMU_IO_PGTABLE + bool + +endmenu + config OF_IOMMU def_bool y depends on OF && IOMMU_API
drivers/iommu/Makefile +1 -0
@@ -1,6 +1,7 @@ obj-$(CONFIG_IOMMU_API) += iommu.o obj-$(CONFIG_IOMMU_API) += iommu-traces.o obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o +obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o obj-$(CONFIG_OF_IOMMU) += of_iommu.o obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o msm_iommu_dev.o obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o
drivers/iommu/io-pgtable.c new file +71 -0
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drivers/iommu/io-pgtable.h new file +128 -0
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Signature · 1 line
2.1.4
PATCH v2 2/5 iommu: add ARM LPAE page table allocator
In reply to Will DeaconA number of IOMMUs found in ARM SoCs can walk architecture-compatible page tables.
This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8 long-descriptor page tables. 4k, 16k and 64k pages are supported, with up to 4-levels of walk to cover a 48-bit address space.
--- MAINTAINERS | 1 + drivers/iommu/Kconfig | 9 + drivers/iommu/Makefile | 1 + drivers/iommu/io-pgtable-arm.c | 781 +++++++++++++++++++++++++++++++++++++++++ drivers/iommu/io-pgtable.c | 11 + drivers/iommu/io-pgtable.h | 14 + 6 files changed, 817 insertions(+) create mode 100644 drivers/iommu/io-pgtable-arm.c
MAINTAINERS +1 -0
@@ -1589,6 +1589,7 @@ M: Will Deacon <[email protected]> L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers) S: Maintained F: drivers/iommu/arm-smmu.c +F: drivers/iommu/io-pgtable-arm.c ARM64 PORT (AARCH64 ARCHITECTURE) M: Catalin Marinas <[email protected]>
drivers/iommu/Kconfig +9 -0
@@ -19,6 +19,15 @@ menu "Generic IOMMU Pagetable Support" config IOMMU_IO_PGTABLE bool +config IOMMU_IO_PGTABLE_LPAE + bool "ARMv7/v8 Long Descriptor Format" + select IOMMU_IO_PGTABLE + help + Enable support for the ARM long descriptor pagetable format. + This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page + sizes at both stage-1 and stage-2, as well as address spaces + up to 48-bits in size. + endmenu config OF_IOMMU
drivers/iommu/Makefile +1 -0
@@ -2,6 +2,7 @@ obj-$(CONFIG_IOMMU_API) += iommu.o obj-$(CONFIG_IOMMU_API) += iommu-traces.o obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o +obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o obj-$(CONFIG_OF_IOMMU) += of_iommu.o obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o msm_iommu_dev.o obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o
drivers/iommu/io-pgtable-arm.c new file +781 -0
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drivers/iommu/io-pgtable.c +11 -0
@@ -24,9 +24,20 @@#include "io-pgtable.h" +extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; +extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; +extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; +extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; +static const struct io_pgtable_init_fns * io_pgtable_init_table[IO_PGTABLE_NUM_FMTS ] = { +#ifdef CONFIG_IOMMU_IO_PGTABLE_LPAE + [ARM_32_LPAE_S1 ] = &io_pgtable_arm_32_lpae_s1_init_fns, + [ARM_32_LPAE_S2 ] = &io_pgtable_arm_32_lpae_s2_init_fns, + [ARM_64_LPAE_S1 ] = &io_pgtable_arm_64_lpae_s1_init_fns, + [ARM_64_LPAE_S2 ] = &io_pgtable_arm_64_lpae_s2_init_fns, +#endif }; struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
drivers/iommu/io-pgtable.h +14 -0
@@ -5,6 +5,10 @@* Public API for use by IOMMU drivers */ enum io_pgtable_fmt { +ARM_32_LPAE_S1 , +ARM_32_LPAE_S2 , +ARM_64_LPAE_S1 , +ARM_64_LPAE_S2 ,IO_PGTABLE_NUM_FMTS , };
@@ -47,6 +51,16 @@ struct io_pgtable_cfg {/* Low-level data specific to the table format */ union { +struct { +u64 ttbr[2 ]; +u64 tcr; +u64 mair[2 ]; + } arm_lpae_s1_cfg; + +struct { +u64 vttbr; +u64 vtcr; + } arm_lpae_s2_cfg; }; };
Signature · 1 line
2.1.4
PATCH v2 3/5 iommu: add self-consistency tests to ARM LPAE IO page table allocator
In reply to Will DeaconThis patch adds a series of basic self-consistency tests to the ARM LPAE IO page table allocator that exercise corner cases in map/unmap, as well as testing all valid configurations of pagesize, ias and stage.
--- drivers/iommu/Kconfig | 9 ++ drivers/iommu/io-pgtable-arm.c | 200 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 208 insertions(+), 1 deletion(-)
drivers/iommu/Kconfig +9 -0
@@ -28,6 +28,15 @@ config IOMMU_IO_PGTABLE_LPAE sizes at both stage-1 and stage-2, as well as address spaces up to 48-bits in size. +config IOMMU_IO_PGTABLE_LPAE_SELFTEST + bool "LPAE selftests" + depends on IOMMU_IO_PGTABLE_LPAE + help + Enable self-tests for LPAE page table allocator. This performs + a series of page-table consistency checks during boot. + + If unsure, say N here. + endmenu config OF_IOMMU
drivers/iommu/io-pgtable-arm.c +199 -1
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Signature · 1 line
2.1.4
PATCH v2 4/5 iommu/arm-smmu: make use of generic LPAE allocator
In reply to Will DeaconThe ARM SMMU can walk LPAE page tables, so make use of the generic allocator.
--- arch/arm64/Kconfig | 1 - drivers/iommu/Kconfig | 6 +- drivers/iommu/arm-smmu.c | 886 ++++++++++++++--------------------------------- 3 files changed, 266 insertions(+), 627 deletions(-)
arch/arm64/Kconfig +0 -1
@@ -349,7 +349,6 @@ config ARM64_VA_BITS_42 config ARM64_VA_BITS_48 bool "48-bit" - depends on !ARM_SMMU endchoice
drivers/iommu/Kconfig +3 -3
@@ -330,13 +330,13 @@ config SPAPR_TCE_IOMMU config ARM_SMMU bool "ARM Ltd. System MMU (SMMU) Support" - depends on ARM64 || (ARM_LPAE && OF) + depends on ARM64 || ARM select IOMMU_API + select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU if ARM help Support for implementations of the ARM System MMU architecture - versions 1 and 2. The driver supports both v7l and v8l table - formats with 4k and 64k page sizes. + versions 1 and 2. Say Y here if your SoC includes an IOMMU device implementing the ARM SMMU architecture.
drivers/iommu/arm-smmu.c +263 -623
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Signature · 1 line
2.1.4
PATCH v2 5/5 iommu: io-pgtable-arm: add non-secure quirk
In reply to Will DeaconFrom: Laurent Pinchart <[email protected]>
The quirk causes the Non-Secure bit to be set in all page table entries.
--- drivers/iommu/io-pgtable-arm.c | 7 +++++++ drivers/iommu/io-pgtable.h | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-)
drivers/iommu/io-pgtable-arm.c +7 -0
@@ -82,11 +82,13 @@#define ARM_LPAE_PTE_TYPE_TABLE 3#define ARM_LPAE_PTE_TYPE_PAGE 3 +#define ARM_LPAE_PTE_NSTABLE (((arm_lpae_iopte)1) << 63)#define ARM_LPAE_PTE_XN (((arm_lpae_iopte)3) << 53)#define ARM_LPAE_PTE_AF (((arm_lpae_iopte)1) << 10)#define ARM_LPAE_PTE_SH_NS (((arm_lpae_iopte)0) << 8)#define ARM_LPAE_PTE_SH_OS (((arm_lpae_iopte)2) << 8)#define ARM_LPAE_PTE_SH_IS (((arm_lpae_iopte)3) << 8) +#define ARM_LPAE_PTE_NS (((arm_lpae_iopte)1) << 5)#define ARM_LPAE_PTE_VALID (((arm_lpae_iopte)1) << 0)#define ARM_LPAE_PTE_ATTR_LO_MASK (((arm_lpae_iopte)0x3ff) << 2)
@@ -208,6 +210,9 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data,return -EEXIST ; } +if (data->iop.cfg.quirks &IO_PGTABLE_QUIRK_ARM_NS ) + pte |=ARM_LPAE_PTE_NS ; +if (lvl ==ARM_LPAE_MAX_LEVELS -1 ) pte |=ARM_LPAE_PTE_TYPE_PAGE ;else
@@ -251,6 +256,8 @@ static int __arm_lpae_map(struct arm_lpae_io_pgtable *data, unsigned long iova, data->iop.cfg.tlb->flush_pgtable (cptep,1UL << data->pg_shift, cookie); pte =__pa (cptep) |ARM_LPAE_PTE_TYPE_TABLE ; +if (data->iop.cfg.quirks &IO_PGTABLE_QUIRK_ARM_NS ) + pte |=ARM_LPAE_PTE_NSTABLE ; *ptep = pte; data->iop.cfg.tlb->flush_pgtable (ptep,sizeof (*ptep), cookie); }else {
drivers/iommu/io-pgtable.h +2 -1
@@ -43,7 +43,8 @@ struct iommu_gather_ops {* @tlb: TLB management callbacks for this set of tables. */ struct io_pgtable_cfg { -int quirks;/* IO_PGTABLE_QUIRK_* */ +#define IO_PGTABLE_QUIRK_ARM_NS (1 << 0)/* Set NS bit in PTEs */ +int quirks;unsigned long pgsize_bitmap;unsigned int ias;unsigned int oas;
Signature · 1 line
2.1.4
v2 cover Generic IOMMU page table framework
In reply to Will DeaconQuoted 6 lines · Will Deacon
This is version two of the patch series I originally posted here:
v1: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/306786.html
Changes since v1 include:
Quoted 7 lines
- Separated 32-bit and 64-bit regimes
- Limited pgd allocation when a full page is not required
- Addition of NS quirk, needed by Laurent for the Renesas IOMMU
- Added kerneldoc for the API to IOMMU drivers
- A few minor changes after feedback on the listAll feedback welcome,
I've not received any feedback on this revision of the series, but it's working well for me and Laurent showed that it works with his IOMMU too.
Joerg -- can I include this in my pull request for 3.20, or is there anything further you'd like me to address? The code is completely self-contained, so I wouldn't expect any impact on IOMMU drivers that don't explicitly use the new page table API.
Thanks,
Will
Quoted 27 lines
--->8
Laurent Pinchart (1):
iommu: io-pgtable-arm: add non-secure quirkWill Deacon (4):
iommu: introduce generic page table allocation framework
iommu: add ARM LPAE page table allocator
iommu: add self-consistency tests to ARM LPAE IO page table allocator iommu/arm-smmu: make use of generic LPAE allocatorMAINTAINERS | 1 + arch/arm64/Kconfig | 1 - drivers/iommu/Kconfig | 32 +- drivers/iommu/Makefile | 2 + drivers/iommu/arm-smmu.c | 886 +++++++++++------------------------- drivers/iommu/io-pgtable-arm.c | 986 +++++++++++++++++++++++++++++++++++++++++ drivers/iommu/io-pgtable.c | 82 ++++ drivers/iommu/io-pgtable.h | 143 ++++++ 8 files changed, 1506 insertions(+), 627 deletions(-) create mode 100644 drivers/iommu/io-pgtable-arm.c create mode 100644 drivers/iommu/io-pgtable.c create mode 100644 drivers/iommu/io-pgtable.hSignature · 1 line
2.1.4
joro at 8bytes.org
maintainerv2 cover Generic IOMMU page table framework
Hi Will,
Quoted 7 lines · Will Deacon
I've not received any feedback on this revision of the series, but it's working well for me and Laurent showed that it works with his IOMMU too.
Joerg -- can I include this in my pull request for 3.20, or is there anything further you'd like me to address? The code is completely self-contained, so I wouldn't expect any impact on IOMMU drivers that don't explicitly use the new page table API.
The patch-set looks good to me. But with code generification in general, what are the plans for other arm iommu drivers to adopt this?
Joerg
v2 cover Generic IOMMU page table framework
Hi Joerg,
Thanks for the reply.
Quoted 11 lines · On Mon, Jan 19, 2015 at 01:09:41PM +0000, joro at 8bytes.org wrote:
Quoted 7 lines · Will Deacon
I've not received any feedback on this revision of the series, but it's working well for me and Laurent showed that it works with his IOMMU too.
Joerg -- can I include this in my pull request for 3.20, or is there anything further you'd like me to address? The code is completely self-contained, so I wouldn't expect any impact on IOMMU drivers that don't explicitly use the new page table API.
The patch-set looks good to me. But with code generification in general, what are the plans for other arm iommu drivers to adopt this?
I think Laurent was going to make use of it and I'm working on a driver that will use it too.
Laurent -- you had patches ready to go for v1, right?
Will
v2 cover Generic IOMMU page table framework
Hi Will,
Quoted 10 lines · On Monday 19 January 2015 13:18:43 Will Deacon wrote:
Quoted 9 lines · On Mon, Jan 19, 2015 at 01:09:41PM +0000, joro at 8bytes.org wrote:
Quoted 7 lines · Will Deacon
I've not received any feedback on this revision of the series, but it's working well for me and Laurent showed that it works with his IOMMU too.
Joerg -- can I include this in my pull request for 3.20, or is there anything further you'd like me to address? The code is completely self-contained, so I wouldn't expect any impact on IOMMU drivers that don't explicitly use the new page table API.
Quoted 7 lines
Quoted 2 lines
The patch-set looks good to me. But with code generification in general, what are the plans for other arm iommu drivers to adopt this?
I think Laurent was going to make use of it and I'm working on a driver that will use it too.
Laurent -- you had patches ready to go for v1, right?
Yes, and I've rebased them (or actually it, it's a single patch) on v2. I haven't had time to test the result yet, I'll try to do so later tonight or tomorrow.
Signature · 3 lines
Regards, Laurent Pinchart
joro at 8bytes.org
maintainerv2 cover Generic IOMMU page table framework
Quoted 3 lines · Laurent Pinchart
Yes, and I've rebased them (or actually it, it's a single patch) on v2. I haven't had time to test the result yet, I'll try to do so later tonight or tomorrow.
Great! Would be good if this can go upstream with more than one user.
Joerg
PATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Replace the custom page table allocation implementation with the standard allocator.
The driver loses the ability to map 64kB chunkgs using the PTE contiguous hint, hence the removal of the SZ_64K page size from the IOMMU page sizes bitmap.
--- drivers/iommu/Kconfig | 1 + drivers/iommu/ipmmu-vmsa.c | 554 +++++---------------------------------------- 2 files changed, 61 insertions(+), 494 deletions(-)
This patch depends on Will Deacon's "[PATCH v2 0/5] Generic IOMMU page table framework" series.
Joerg, if you want to merge Will's patches in v3.20 with one user, this is a good candidate.
Changes since v1:
- Rebased on top of latest page table framework and iommu next branch.
drivers/iommu/Kconfig +1 -0
@@ -317,6 +317,7 @@ config IPMMU_VMSA depends on ARM_LPAE depends on ARCH_SHMOBILE || COMPILE_TEST select IOMMU_API + select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU help Support for the Renesas VMSA-compatible IPMMU Renesas found in the
drivers/iommu/ipmmu-vmsa.c +60 -494
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Signature · 3 lines
Regards, Laurent Pinchart
PATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Quoted 16 lines · Laurent Pinchart
Replace the custom page table allocation implementation with the standard allocator.
The driver loses the ability to map 64kB chunkgs using the PTE contiguous hint, hence the removal of the
SZ_64Kpage size from the IOMMU page sizes bitmap.Signed-off-by Laurent Pinchart <[email protected]>--- drivers/iommu/Kconfig | 1 + drivers/iommu/ipmmu-vmsa.c | 554 +++++---------------------------------------- 2 files changed, 61 insertions(+), 494 deletions(-)This patch depends on Will Deacon's "[PATCH v2 0/5] Generic IOMMU page table framework" series.
Quoted 6 lines
Joerg, if you want to merge Will's patches in v3.20 with one user, this is a good candidate.
Changes since v1:
- Rebased on top of latest page table framework and iommu next branch.
Laurent, this is really good stuff, thanks!
Shall I queue this on top of the iommu/pgtbl patches, or do you have other ipmmu patches queued?
Will
PATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Hi Will,
Quoted 22 lines · On Wednesday 21 January 2015 14:44:20 Will Deacon wrote:
Quoted 21 lines · Laurent Pinchart
Replace the custom page table allocation implementation with the standard allocator.
The driver loses the ability to map 64kB chunkgs using the PTE contiguous hint, hence the removal of the
SZ_64Kpage size from the IOMMU page sizes bitmap.Signed-off-by: Laurent Pinchart
<[email protected]>
---drivers/iommu/Kconfig | 1 + drivers/iommu/ipmmu-vmsa.c | 554 ++++------------------------------------ 2 files changed, 61 insertions(+), 494 deletions(-)This patch depends on Will Deacon's "[PATCH v2 0/5] Generic IOMMU page table framework" series.
Joerg, if you want to merge Will's patches in v3.20 with one user, this is a good candidate.
Quoted 8 lines
Quoted 3 lines
Changes since v1:
- Rebased on top of latest page table framework and iommu next branch.
Laurent, this is really good stuff, thanks!
Shall I queue this on top of the iommu/pgtbl patches, or do you have other ipmmu patches queued?
All my other ipmmu patches have been queued by Joerg in his next branch, on which this patch is based. If you base your series on the same branch you can just queue this patch on top of it. Do you plan to submit the result to v3.20 or v3.21 ?
Signature · 3 lines
Regards, Laurent Pinchart
joro at 8bytes.org
maintainerPATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Quoted 4 lines · Laurent Pinchart
All my other ipmmu patches have been queued by Joerg in his next branch, on which this patch is based. If you base your series on the same branch you can just queue this patch on top of it. Do you plan to submit the result to v3.20 or v3.21 ?
Hmm, I would prefer to not merge stuff together like this. Preferably I would like to put the generic page-table patches for ARM in a seperate topic-branch without any other changes merged in, given that this does not cause any non-trivial merge conflicts in the end for my next branch.
Joerg
PATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Hi Joerg,
Quoted 10 lines · On Wednesday 21 January 2015 16:05:29 joro at 8bytes.org wrote:
Quoted 4 lines · Laurent Pinchart
All my other ipmmu patches have been queued by Joerg in his next branch, on which this patch is based. If you base your series on the same branch you can just queue this patch on top of it. Do you plan to submit the result to v3.20 or v3.21 ?
Hmm, I would prefer to not merge stuff together like this. Preferably I would like to put the generic page-table patches for ARM in a seperate topic-branch without any other changes merged in, given that this does not cause any non-trivial merge conflicts in the end for my next branch.
As you wish. I just thought you would prefer merging the series with at least one user.
Signature · 3 lines
Regards, Laurent Pinchart
joro at 8bytes.org
maintainerPATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Quoted 2 lines · Laurent Pinchart
As you wish. I just thought you would prefer merging the series with at least one user.
Yes, and with your patch there would be two users: ARM-SMMU and the VMSA IPMMU. So ideally I would apply/pull Will's patches on v3.19-rc5 with your patch on-top (and no other patches as dependency).
Joerg
PATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Quoted 7 lines · On Wednesday 21 January 2015 16:27:24 joro at 8bytes.org wrote:
Quoted 2 lines · Laurent Pinchart
As you wish. I just thought you would prefer merging the series with at least one user.
Yes, and with your patch there would be two users: ARM-SMMU and the VMSA IPMMU. So ideally I would apply/pull Will's patches on v3.19-rc5 with your patch on-top (and no other patches as dependency).
But that would conflict with the IPMMU patches that you have already queued for v3.20.
Signature · 3 lines
Regards, Laurent Pinchart
joro at 8bytes.org
maintainerPATCH v2 1/1 iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
Quoted 11 lines · Laurent Pinchart
Quoted 7 lines · On Wednesday 21 January 2015 16:27:24 joro at 8bytes.org wrote:
Quoted 2 lines · Laurent Pinchart
As you wish. I just thought you would prefer merging the series with at least one user.
Yes, and with your patch there would be two users: ARM-SMMU and the VMSA IPMMU. So ideally I would apply/pull Will's patches on v3.19-rc5 with your patch on-top (and no other patches as dependency).
But that would conflict with the IPMMU patches that you have already queued for v3.20.
Okay, I merged the arm/smmu branch into arm/renesas and applied your patch on-top.