imx6slevk: fix uImage load address

PATCH New Gilles Talis 2 participants 4 messages Jan 18, 2015 – Jan 21, 2015 Arm i.MX and Layerscape

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Gilles Talis

author

2015-01-18 10:57 UTC #0 lore raw

PATCH 1/1 imx6slevk: fix uImage load address

i.MX6 SoloLite SoC has a different external memory base address than the other i.MX6 family SoCs (0x80000000 for i.MX6 SoloLite vs 0x10000000 for the others).

Signed-off-by Gilles Talis <[email protected]>

---
 configs/freescale_imx6sololiteevk_defconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

configs/freescale_imx6sololiteevk_defconfig +1 -1

index f8ecc7b..2bb47af 100644
@@ -11,7 +11,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git://git.freescale.com/imx/linux-2.6-imx.git"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="rel_imx_3.10.17_1.0.0_ga"
 BR2_LINUX_KERNEL_DEFCONFIG="imx_v7"
-BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x10008000"
+BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x80008000"
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6sl-evk"

Signature · 1 line

1.7.10.4

Yann E. MORIN

2015-01-19 22:33 UTC #1 lore raw

PATCH 1/1 imx6slevk: fix uImage load address

Gilles, All,

On 2015-01-18 11:57 +0100, Gilles Talis spake thusly:

Quoted 3 lines

i.MX6 SoloLite SoC has a different external memory base address than the other i.MX6 family SoCs (0x80000000 for i.MX6 SoloLite vs 0x10000000 for the others).

Could you share a pointer to the reference for this, please?

It is a bit difficult to ACK such a patch without such areference, for those that do not have the board / the SoC.

Of course, the change is pretty obvious, though, so this gets my:

Reviewed-by "Yann E. MORIN" <[email protected]>

which you can add when you respin with a reference pointer (unless it gets applied in the meantime).

Regards,
Yann E. MORIN.

Quoted 25 lines

Signed-off-by Gilles Talis <[email protected]>

---
 configs/freescale_imx6sololiteevk_defconfig |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

configs/freescale_imx6sololiteevk_defconfig +1 -1

index f8ecc7b..2bb47af 100644
@@ -11,7 +11,7 @@ BR2_LINUX_KERNEL_CUSTOM_GIT=y
 BR2_LINUX_KERNEL_CUSTOM_REPO_URL="git://git.freescale.com/imx/linux-2.6-imx.git"
 BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="rel_imx_3.10.17_1.0.0_ga"
 BR2_LINUX_KERNEL_DEFCONFIG="imx_v7"
-BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x10008000"
+BR2_LINUX_KERNEL_UIMAGE_LOADADDR="0x80008000"
 BR2_LINUX_KERNEL_DTS_SUPPORT=y
 BR2_LINUX_KERNEL_INTREE_DTS_NAME="imx6sl-evk"

Signature · 6 lines

1.7.10.4

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Gilles Talis

author

2015-01-20 15:46 UTC #2 lore raw

PATCH 1/1 imx6slevk: fix uImage load address

Yann, all

2015-01-19 23:33 GMT+01:00 Yann E. MORIN <[email protected]>:

Quoted 8 lines

Gilles, All,
On 2015-01-18 11:57 +0100, Gilles Talis spake thusly:
Quoted 3 lines
i.MX6 SoloLite SoC has a different external memory base address than the other i.MX6 family SoCs (0x80000000 for i.MX6 SoloLite vs 0x10000000 for the others).
Could you share a pointer to the reference for this, please?

Yes, this makes sense. Whilst I was looking for this pointer, I stumbled across this u-boot mailing list thread where the problem is actually solved:
http://lists.denx.de/pipermail/u-boot/2014-December/199881.html

Would that be enough? or would you prefer I provide the links to the i.MX6 processors reference manuals where the DDR controller base address information is stored.

thanks
Gilles.

Yann E. MORIN

2015-01-21 17:23 UTC #3 lore raw

PATCH 1/1 imx6slevk: fix uImage load address

Gilles, All,

On 2015-01-20 16:46 +0100, Gilles Talis spake thusly:

Quoted 8 lines

2015-01-19 23:33 GMT+01:00 Yann E. MORIN <[email protected]>:
Quoted 7 lines
Gilles, All,
On 2015-01-18 11:57 +0100, Gilles Talis spake thusly:
Quoted 3 lines
i.MX6 SoloLite SoC has a different external memory base address than the other i.MX6 family SoCs (0x80000000 for i.MX6 SoloLite vs 0x10000000 for the others).

Quoted 5 lines

Quoted 1 line
Could you share a pointer to the reference for this, please?
Yes, this makes sense. Whilst I was looking for this pointer, I stumbled across this u-boot mailing list thread where the problem is actually solved:
http://lists.denx.de/pipermail/u-boot/2014-December/199881.html

That's pretty OK to add as a reference (the U-Boot guys probably know what they are doing! ;-) ).

Quoted 3 lines

Would that be enough? or would you prefer I provide the links to the i.MX6 processors reference manuals where the DDR controller base address information is stored.

Well, if you have such info, then be free to add, that would be great! Otherwise, the U-Boot reference should be enough.

Thanks! :-)

Regards,
Yann E. MORIN.

Signature · 6 lines

.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'