ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
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cover ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
Hi,
Yet another PRCM cleanup set, towards making PRCM a separate driver. This set is most likely too late for 3.19, but hopefully it can make it to 3.20. Couple of related clock patches are also within this set, as some of the clock support code is now obsolete. Most important things this set does, is to separate the PRCM driver initializations under their own parts, and split the control module init under its own driver file also. This set still does not introduce regmap support for PRCM, as I am not too sure whether it should be done at all. It seems we can implement all the clock / vcvp / etc. support rather neatly just with using iomaps.
Testing done:
am335x-evm: boot
am335x-sk: boot
am3517-evm: boot
am43xx-gpevm: boot
beaglebone-black: boot
beaglebone: boot
dra7xx-evm: boot
omap5-evm: boot
omap3-beagle: boot, suspend (ret), suspend (off) (UART wakeup seems broken on 3.18-rc1 btw)
omap4-panda-es: boot
Testing branch pushed here:
tree: https://github.com/t-kristo/linux-pm.git
branch: for-v3.19/prcm-cleanup-part2
This is based on top of Tony's omap-for-v3.19/prcm.
-Tero
PATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/clock.c | 67 +++++++++++++++++++++++++++++++------ arch/arm/mach-omap2/clock.h | 4 +-- arch/arm/mach-omap2/prcm-common.h | 2 ++ arch/arm/mach-omap2/prm_common.c | 34 +------------------ 4 files changed, 61 insertions(+), 46 deletions(-)
arch/arm/mach-omap2/clock.c +56 -11
@@ -24,6 +24,7 @@#include <linux/io.h> #include <linux/bitops.h> #include <linux/clk-private.h> +#include <linux/of_address.h> #include <asm/cpu.h> #include <trace/events/power.h>
@@ -73,32 +74,76 @@ struct ti_clk_features ti_clk_features;static bool clkdm_control = true;static LIST_HEAD (clk_hw_omap_clocks); -void __iomem *clk_memmaps[CLK_MAX_MEMMAPS ]; +static void __iomem *clk_memmaps[CLK_MAX_MEMMAPS ]; + +static void clk_memmap_writel (u32 val,void __iomem *reg) +{ +struct clk_omap_reg *r = (struct clk_omap_reg *)® + +writel_relaxed (val, clk_memmaps[r->index] + r->offset); +} + +static u32 clk_memmap_readl (void __iomem *reg) +{ +struct clk_omap_reg *r = (struct clk_omap_reg *)® + +return readl_relaxed (clk_memmaps[r->index] + r->offset); +}void omap2_clk_writel (u32 val,struct clk_hw_omap *clk,void __iomem *reg) { -if (clk->flags &MEMMAP_ADDRESSING ) { -struct clk_omap_reg *r = (struct clk_omap_reg *)® -writel_relaxed (val, clk_memmaps[r->index] + r->offset); - }else { +if (clk->flags &MEMMAP_ADDRESSING ) +clk_memmap_writel (val, reg); +else writel_relaxed (val, reg); - } }u32 omap2_clk_readl (struct clk_hw_omap *clk,void __iomem *reg) {u32 val; -if (clk->flags &MEMMAP_ADDRESSING ) { -struct clk_omap_reg *r = (struct clk_omap_reg *)® - val =readl_relaxed (clk_memmaps[r->index] + r->offset); - }else { +if (clk->flags &MEMMAP_ADDRESSING ) + val =clk_memmap_readl (reg); +else val =readl_relaxed (reg); - }return val; } +static struct ti_clk_ll_ops omap_clk_ll_ops = { + .clk_readl = clk_memmap_readl, + .clk_writel = clk_memmap_writel, +}; + +/** +* omap2_clk_provider_init - initialize a clock provider +* @match_table: DT device table to match for devices to init +* +* Initializes a clock provider module (CM/PRM etc.), allocating the +* memory mapping, allocating the mapping index and initializing the +* low level driver infrastructure. Returns 0 in success, -ENOMEM in +* failure. +*/ +int __init omap2_clk_provider_init (const struct of_device_id *match_table) +{ +struct device_node *np; +void __iomem *mem; +static int memmap_index; + + ti_clk_ll_ops = &omap_clk_ll_ops; + +for_each_matching_node (np, match_table) { + mem =of_iomap (np,0 ); +if (!mem) +return -ENOMEM ; + clk_memmaps[memmap_index] = mem; +ti_dt_clk_init_provider (np, memmap_index); + memmap_index++; + } + +return 0 ; +} +/* * OMAP2+ specific clock functions */
arch/arm/mach-omap2/clock.h +2 -2
@@ -267,8 +267,6 @@ extern const struct clksel_rate div_1_3_rates[];extern const struct clksel_rate div_1_4_rates[];extern const struct clksel_rate div31_1to31_rates[]; -extern void __iomem *clk_memmaps[]; -extern int am33xx_clk_init (void );extern int omap2_clkops_enable_clkdm (struct clk_hw *hw);
@@ -276,5 +274,7 @@ extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);extern void omap_clocks_register (struct omap_clk *oclks,int cnt); +int __init omap2_clk_provider_init (const struct of_device_id *match_table); +void __init ti_clk_init_features (void );#endif
arch/arm/mach-omap2/prcm-common.h +2 -0
@@ -517,6 +517,8 @@ struct omap_prcm_irq_setup { .priority = _priority \ } +struct of_device_id ; +extern void omap_prcm_irq_cleanup (void );extern int omap_prcm_register_chain_handler (struct omap_prcm_irq_setup *irq_setup);
arch/arm/mach-omap2/prm_common.c +1 -33
@@ -590,41 +590,9 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { } }; -static struct clk_hw_omap memmap_dummy_ck = { - .flags =MEMMAP_ADDRESSING , -}; - -static u32 prm_clk_readl (void __iomem *reg) -{ -return omap2_clk_readl (&memmap_dummy_ck, reg); -} - -static void prm_clk_writel (u32 val,void __iomem *reg) -{ -omap2_clk_writel (val, &memmap_dummy_ck, reg); -} - -static struct ti_clk_ll_ops omap_clk_ll_ops = { - .clk_readl = prm_clk_readl, - .clk_writel = prm_clk_writel, -}; -int __init of_prcm_init (void ) { -struct device_node *np; -void __iomem *mem; -int memmap_index =0 ; - - ti_clk_ll_ops = &omap_clk_ll_ops; - -for_each_matching_node (np, omap_prcm_dt_match_table) { - mem =of_iomap (np,0 ); - clk_memmaps[memmap_index] = mem; -ti_dt_clk_init_provider (np, memmap_index); - memmap_index++; - } - -return 0 ; +return omap2_clk_provider_init (omap_prcm_dt_match_table); }static int __init prm_late_init (void )
Signature · 1 line
1.7.9.5
Paul Walmsley
maintainerPATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
+ Tomi
Quoted 7 lines · Tero Kristo
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example.
Signed-off-by Tero Kristo <[email protected]>
This patch moves things in the wrong direction (ie, rather than keeping the PRM register accesses in the PRM code, it moves PRM register accesses into the clock code). But I see that a subsequent patch in this series moves them back. So this change is temporary and that seems reasonable to me.
However, as long as the clock code wants to do low-level register accesses to PRM/CM/SCM registers, there needs to be some way to keep register updates originating from the clock code from racing with register updates coming from other code (e.g. non-clock-related PRM/CM/SCM accesses). So I've changed this patch to use regmap (as below), and the followup patch later in the series will be changed too. Seems to work so far but let's see how things go with the rest of the series.
- Paul
--- arch/arm/mach-omap2/clock.c | 103 ++++++++++++++++++++++++++++++++++---- arch/arm/mach-omap2/clock.h | 4 +- arch/arm/mach-omap2/prcm-common.h | 2 + arch/arm/mach-omap2/prm_common.c | 34 +------------ 4 files changed, 97 insertions(+), 46 deletions(-)
arch/arm/mach-omap2/clock.c +92 -11
@@ -24,6 +24,8 @@#include <linux/io.h> #include <linux/bitops.h> #include <linux/clk-private.h> +#include <linux/of_address.h> +#include <linux/regmap.h> #include <asm/cpu.h> #include <trace/events/power.h>
@@ -73,32 +75,111 @@ struct ti_clk_features ti_clk_features;static bool clkdm_control = true;static LIST_HEAD (clk_hw_omap_clocks); -void __iomem *clk_memmaps[CLK_MAX_MEMMAPS ]; +static struct regmap *clk_memmaps[CLK_MAX_MEMMAPS ]; + +static struct regmap_config prcm_regmap_config = { + .reg_bits =32 , + .val_bits =32 , + .reg_stride =4 , + .fast_io =1 , +}; + +static void clk_memmap_writel (u32 val,void __iomem *reg) +{ +struct clk_omap_reg *r = (struct clk_omap_reg *)® + +/* +* XXX Can't really continue if an error occurred here, since +* this function assumes that the write will always succeed +*/ +if (regmap_write (clk_memmaps[r->index], r->offset, val)) { +WARN (1 ,"omap clock regmap write to %d %d failed\n" , + r->index, r->offset); +BUG (); + } +} + +static u32 clk_memmap_readl (void __iomem *reg) +{ +struct clk_omap_reg *r = (struct clk_omap_reg *)® +unsigned int val =0 ; + +/* +* XXX Can't really continue if an error occurred here, since +* this function assumes that the read will always succeed +*/ +if (regmap_read (clk_memmaps[r->index], r->offset, &val)) { +WARN (1 ,"omap clock regmap read from %d %d failed\n" , + r->index, r->offset); +BUG (); + } + +return val; +}void omap2_clk_writel (u32 val,struct clk_hw_omap *clk,void __iomem *reg) { -if (clk->flags &MEMMAP_ADDRESSING ) { -struct clk_omap_reg *r = (struct clk_omap_reg *)® -writel_relaxed (val, clk_memmaps[r->index] + r->offset); - }else { +if (clk->flags &MEMMAP_ADDRESSING ) +clk_memmap_writel (val, reg); +else writel_relaxed (val, reg); - } }u32 omap2_clk_readl (struct clk_hw_omap *clk,void __iomem *reg) {u32 val; -if (clk->flags &MEMMAP_ADDRESSING ) { -struct clk_omap_reg *r = (struct clk_omap_reg *)® - val =readl_relaxed (clk_memmaps[r->index] + r->offset); - }else { +if (clk->flags &MEMMAP_ADDRESSING ) + val =clk_memmap_readl (reg); +else val =readl_relaxed (reg); - }return val; } +static struct ti_clk_ll_ops omap_clk_ll_ops = { + .clk_readl = clk_memmap_readl, + .clk_writel = clk_memmap_writel, +}; + +/** +* omap2_clk_provider_init - initialize a clock provider +* @match_table: DT device table to match for devices to init +* +* Initializes a clock provider module (CM/PRM etc.), allocating the +* memory mapping, allocating the mapping index and initializing the +* low level driver infrastructure. Returns 0 in success, -ENOMEM in +* failure. +*/ +int __init omap2_clk_provider_init (const struct of_device_id *match_table) +{ +struct device_node *np; +void __iomem *mem; +static int memmap_index; +struct regmap *regmap; + + ti_clk_ll_ops = &omap_clk_ll_ops; + +for_each_matching_node (np, match_table) { + mem =of_iomap (np,0 ); +if (!mem) +return -ENOMEM ; + + regmap =regmap_init_mmio (NULL , mem, &prcm_regmap_config); +if (IS_ERR (regmap)) { +pr_err ("omap2 clock: could not create regmap for %s\n" , +of_node_full_name (np)); +continue ; + } + + clk_memmaps[memmap_index] = regmap; +ti_dt_clk_init_provider (np, memmap_index); + memmap_index++; + } + +return 0 ; +} +/* * OMAP2+ specific clock functions */
arch/arm/mach-omap2/clock.h +2 -2
@@ -267,12 +267,12 @@ extern const struct clksel_rate div_1_3_rates[];extern const struct clksel_rate div_1_4_rates[];extern const struct clksel_rate div31_1to31_rates[]; -extern void __iomem *clk_memmaps[]; -extern int omap2_clkops_enable_clkdm (struct clk_hw *hw);extern void omap2_clkops_disable_clkdm (struct clk_hw *hw);extern void omap_clocks_register (struct omap_clk *oclks,int cnt); +int __init omap2_clk_provider_init (const struct of_device_id *match_table); +void __init ti_clk_init_features (void );#endif
arch/arm/mach-omap2/prcm-common.h +2 -0
@@ -517,6 +517,8 @@ struct omap_prcm_irq_setup { .priority = _priority \ } +struct of_device_id ; +extern void omap_prcm_irq_cleanup (void );extern int omap_prcm_register_chain_handler (struct omap_prcm_irq_setup *irq_setup);
arch/arm/mach-omap2/prm_common.c +1 -33
@@ -590,41 +590,9 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { } }; -static struct clk_hw_omap memmap_dummy_ck = { - .flags =MEMMAP_ADDRESSING , -}; - -static u32 prm_clk_readl (void __iomem *reg) -{ -return omap2_clk_readl (&memmap_dummy_ck, reg); -} - -static void prm_clk_writel (u32 val,void __iomem *reg) -{ -omap2_clk_writel (val, &memmap_dummy_ck, reg); -} - -static struct ti_clk_ll_ops omap_clk_ll_ops = { - .clk_readl = prm_clk_readl, - .clk_writel = prm_clk_writel, -}; -int __init of_prcm_init (void ) { -struct device_node *np; -void __iomem *mem; -int memmap_index =0 ; - - ti_clk_ll_ops = &omap_clk_ll_ops; - -for_each_matching_node (np, omap_prcm_dt_match_table) { - mem =of_iomap (np,0 ); - clk_memmaps[memmap_index] = mem; -ti_dt_clk_init_provider (np, memmap_index); - memmap_index++; - } - -return 0 ; +return omap2_clk_provider_init (omap_prcm_dt_match_table); }static int __init prm_late_init (void )
Signature · 1 line
2.1.4
PATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Quoted 18 lines · Paul Walmsley
+ Tomi
Quoted 7 lines · Tero Kristo
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example.
Signed-off-by Tero Kristo <[email protected]>This patch moves things in the wrong direction (ie, rather than keeping the PRM register accesses in the PRM code, it moves PRM register accesses into the clock code). But I see that a subsequent patch in this series moves them back. So this change is temporary and that seems reasonable to me.
Quoted 7 lines
However, as long as the clock code wants to do low-level register accesses to PRM/CM/SCM registers, there needs to be some way to keep register updates originating from the clock code from racing with register updates coming from other code (e.g. non-clock-related PRM/CM/SCM accesses). So I've changed this patch to use regmap (as below), and the followup patch later in the series will be changed too. Seems to work so far but let's see how things go with the rest of the series.
I'm not sure if I miss something, but regmap_write does not protect from problems if there are multiple users for the same registers. You need to use regmap_update_bits() to get a protected read/write sequence, in which you can change only the bits that you want to change.
Tomi
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Tony Lindgren
maintainerPATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Quoted 27 lines · Tomi Valkeinen
Quoted 18 lines · Paul Walmsley
+ Tomi
Quoted 7 lines · Tero Kristo
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example.
Signed-off-by Tero Kristo <[email protected]>This patch moves things in the wrong direction (ie, rather than keeping the PRM register accesses in the PRM code, it moves PRM register accesses into the clock code). But I see that a subsequent patch in this series moves them back. So this change is temporary and that seems reasonable to me.
Quoted 7 lines
However, as long as the clock code wants to do low-level register accesses to PRM/CM/SCM registers, there needs to be some way to keep register updates originating from the clock code from racing with register updates coming from other code (e.g. non-clock-related PRM/CM/SCM accesses). So I've changed this patch to use regmap (as below), and the followup patch later in the series will be changed too. Seems to work so far but let's see how things go with the rest of the series.
Quoted 4 lines
I'm not sure if I miss something, but
regmap_writedoes not protect from problems if there are multiple users for the same registers. You need to useregmap_update_bits()to get a protected read/write sequence, in which you can change only the bits that you want to change.
To me it seems that issue can be fixed by making all the code use regmap. AFAIK that should work for the legacy code too.
Regards,
Tony
PATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Quoted 7 lines · Tony Lindgren
Quoted 4 lines
I'm not sure if I miss something, but
regmap_writedoes not protect from problems if there are multiple users for the same registers. You need to useregmap_update_bits()to get a protected read/write sequence, in which you can change only the bits that you want to change.To me it seems that issue can be fixed by making all the code use regmap. AFAIK that should work for the legacy code too.
Even if everybody uses regmap, doing
v = regmap_read()
modify vregmap_write(v)
is racy. regmap_update_bits() has to be used to protect the read/write sequence. Which may be somewhat challenging at times with some strange registers, the like Roger Q encountered recently related to CAN.
Tomi
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Tony Lindgren
maintainerPATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Quoted 12 lines · Tomi Valkeinen
Quoted 7 lines · Tony Lindgren
Quoted 4 lines
I'm not sure if I miss something, but
regmap_writedoes not protect from problems if there are multiple users for the same registers. You need to useregmap_update_bits()to get a protected read/write sequence, in which you can change only the bits that you want to change.To me it seems that issue can be fixed by making all the code use regmap. AFAIK that should work for the legacy code too.
Even if everybody uses regmap, doing
Quoted 7 lines
v =
regmap_read()
modify vregmap_write(v)is racy.
regmap_update_bits()has to be used to protect the read/write sequence. Which may be somewhat challenging at times with some strange registers, the like Roger Q encountered recently related to CAN.
Yeah that's a good point.
Regards,
Tony
PATCH 1/23 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Quoted 21 lines · Tony Lindgren
Quoted 12 lines · Tomi Valkeinen
Quoted 7 lines · Tony Lindgren
Quoted 4 lines
I'm not sure if I miss something, but
regmap_writedoes not protect from problems if there are multiple users for the same registers. You need to useregmap_update_bits()to get a protected read/write sequence, in which you can change only the bits that you want to change.To me it seems that issue can be fixed by making all the code use regmap. AFAIK that should work for the legacy code too.
Even if everybody uses regmap, doing
Quoted 7 lines
v =
regmap_read()
modify vregmap_write(v)is racy.
regmap_update_bits()has to be used to protect the read/write sequence. Which may be somewhat challenging at times with some strange registers, the like Roger Q encountered recently related to CAN.
Quoted 6 lines
Yeah that's a good point.
Regards,
Tony
I have a v2 of this series ready now, which also moves control module completely to use syscon for register accesses. The move to regmap is done at later point though, not in this patch as Paul proposed, as the changes to the rest of the series were not posted.
The race handling needs to be done on driver level to use regmap_update_bits, my take on this is that we can post separate patches against the individual drivers, once the regmap/syscon conversion has been done. Mostly, the drivers do not touch same register anyway, so getting any conflicts should be pretty rare. Moreover, this set does not do anything for this anyway, if there are currently races with some users of control module, these will be there still.
-Tero
PATCH 2/23 ARM: OMAP2+: PRCM: rename of_prcm_init to omap_prcm_init
In reply to Tero KristoThis avoids conflicts in the global namespace, and is more descriptive of the purpose anyway.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/io.c | 2 +- arch/arm/mach-omap2/prm.h | 2 +- arch/arm/mach-omap2/prm_common.c | 8 +++++++- 3 files changed, 9 insertions(+), 3 deletions(-)
arch/arm/mach-omap2/io.c +1 -1
@@ -731,7 +731,7 @@ int __init omap_clk_init(void)ti_clk_init_features (); - ret =of_prcm_init (); + ret =omap_prcm_init ();if (ret)return ret;
arch/arm/mach-omap2/prm.h +1 -1
@@ -19,7 +19,7 @@extern void __iomem *prm_base;extern u16 prm_features;extern void omap2_set_globals_prm (void __iomem *prm); -int of_prcm_init (void ); +int omap_prcm_init (void );# endif /*
arch/arm/mach-omap2/prm_common.c +7 -1
@@ -590,7 +590,13 @@ static const struct of_device_id omap_prcm_dt_match_table[] = { { } }; -int __init of_prcm_init (void ) +/** +* omap_prcm_init - low level init for the PRCM drivers +* +* Initializes the low level clock infrastructure for PRCM drivers. +* Returns 0 in success, negative error value in failure. +*/ +int __init omap_prcm_init (void ) {return omap2_clk_provider_init (omap_prcm_dt_match_table); }
Signature · 1 line
1.7.9.5
PATCH 3/23 ARM: OMAP2+: PRCM: split PRCM module init to their own driver files
In reply to Tero KristoSplits the clock related provider module inits under their own driver files. Previously this was done for all modules under the common PRM driver.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/cm.h | 1 + arch/arm/mach-omap2/cm_common.c | 24 ++++++++++++++++++++++++ arch/arm/mach-omap2/control.c | 20 ++++++++++++++++++++ arch/arm/mach-omap2/control.h | 1 + arch/arm/mach-omap2/io.c | 4 ++++ arch/arm/mach-omap2/prm_common.c | 20 ++++++++------------ 6 files changed, 58 insertions(+), 12 deletions(-)
arch/arm/mach-omap2/cm.h +1 -0
@@ -70,6 +70,7 @@ int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);int omap_cm_module_disable (u8 part,u16 inst,u16 clkctrl_offs);extern int cm_register (struct cm_ll_data *cld);extern int cm_unregister (struct cm_ll_data *cld); +int omap_cm_init (void );# endif
arch/arm/mach-omap2/cm_common.c +24 -0
@@ -15,10 +15,12 @@#include <linux/init.h> #include <linux/errno.h> #include <linux/bug.h> +#include <linux/of.h> #include "cm2xxx.h" #include "cm3xxx.h" #include "cm44xx.h" +#include "clock.h" /* * cm_ll_data: function pointers to SoC-specific implementations of
@@ -212,3 +214,25 @@ int cm_unregister(struct cm_ll_data *cld)return 0 ; } + +static struct of_device_id omap_cm_dt_match_table[] = { + { .compatible ="ti,omap3-cm" }, + { .compatible ="ti,omap4-cm1" }, + { .compatible ="ti,omap4-cm2" }, + { .compatible ="ti,omap5-cm-core-aon" }, + { .compatible ="ti,omap5-cm-core" }, + { .compatible ="ti,dra7-cm-core-aon" }, + { .compatible ="ti,dra7-cm-core" }, + { } +}; + +/** +* omap_cm_init - low level init for the CM drivers +* +* Initializes the low level clock infrastructure for CM drivers. +* Returns 0 in success, negative error value in failure. +*/ +int __init omap_cm_init (void ) +{ +return omap2_clk_provider_init (omap_cm_dt_match_table); +}
arch/arm/mach-omap2/control.c +20 -0
@@ -25,6 +25,7 @@#include "sdrc.h" #include "pm.h" #include "control.h" +#include "clock.h" /* Used by omap3_ctrl_save_padconf() */ #define START_PADCONF_SAVE 0x2
@@ -611,3 +612,22 @@ void __init omap3_ctrl_init(void) omap3_ctrl_setup_d2d_padconf(); }#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ + +static struct of_device_id omap_scrm_dt_match_table[] = { + { .compatible ="ti,am3-scrm" }, + { .compatible ="ti,am4-scrm" }, + { .compatible ="ti,omap2-scrm" }, + { .compatible ="ti,omap3-scrm" }, + { } +}; + +/** +* omap_control_init - low level init for the control driver +* +* Initializes the low level clock infrastructure for control driver. +* Returns 0 in success, negative error value in failure. +*/ +int __init omap_control_init (void ) +{ +return omap2_clk_provider_init (omap_scrm_dt_match_table); +}
arch/arm/mach-omap2/control.h +1 -0
@@ -456,6 +456,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);extern void omap3630_ctrl_disable_rta (void );extern int omap3_ctrl_save_padconf (void );void omap3_ctrl_init (void ); +int omap_control_init (void );extern void omap2_set_globals_control (void __iomem *ctrl,void __iomem *ctrl_pad);#else
arch/arm/mach-omap2/io.c +4 -0
@@ -731,6 +731,10 @@ int __init omap_clk_init(void)ti_clk_init_features (); + ret =omap_control_init (); +if (ret) +return ret; + ret =omap_prcm_init ();if (ret)return ret;
arch/arm/mach-omap2/prm_common.c +8 -12
@@ -35,6 +35,7 @@#include "prm44xx.h" #include "common.h" #include "clock.h" +#include "cm.h" /* * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -568,25 +569,14 @@ int prm_unregister(struct prm_ll_data *pld)static const struct of_device_id omap_prcm_dt_match_table[] = { { .compatible ="ti,am3-prcm" }, - { .compatible ="ti,am3-scrm" }, { .compatible ="ti,am4-prcm" }, - { .compatible ="ti,am4-scrm" }, { .compatible ="ti,omap2-prcm" }, - { .compatible ="ti,omap2-scrm" }, { .compatible ="ti,omap3-prm" }, - { .compatible ="ti,omap3-cm" }, - { .compatible ="ti,omap3-scrm" }, - { .compatible ="ti,omap4-cm1" }, { .compatible ="ti,omap4-prm" }, - { .compatible ="ti,omap4-cm2" }, { .compatible ="ti,omap4-scrm" }, { .compatible ="ti,omap5-prm" }, - { .compatible ="ti,omap5-cm-core-aon" }, { .compatible ="ti,omap5-scrm" }, - { .compatible ="ti,omap5-cm-core" }, { .compatible ="ti,dra7-prm" }, - { .compatible ="ti,dra7-cm-core-aon" }, - { .compatible ="ti,dra7-cm-core" }, { } };
@@ -598,7 +588,13 @@ static const struct of_device_id omap_prcm_dt_match_table[] = {*/ int __init omap_prcm_init (void ) { -return omap2_clk_provider_init (omap_prcm_dt_match_table); +int ret; + + ret =omap2_clk_provider_init (omap_prcm_dt_match_table); +if (ret) +return ret; + +return omap_cm_init (); }static int __init prm_late_init (void )
Signature · 1 line
1.7.9.5
PATCH 4/23 ARM: OMAP24xx: clock: remove unused apll code
In reply to Tero KristoAPLL clock type is no longer needed as the legacy clock support is removed.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/Makefile | 1 - arch/arm/mach-omap2/clkt2xxx_apll.c | 142 ----------------------------------- arch/arm/mach-omap2/clock2xxx.h | 11 --- 3 files changed, 154 deletions(-) delete mode 100644 arch/arm/mach-omap2/clkt2xxx_apll.c
arch/arm/mach-omap2/Makefile +0 -1
@@ -181,7 +181,6 @@ obj-$(CONFIG_SOC_DRA7XX) += clockdomains7xx_data.o obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o -obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o obj-$(CONFIG_SOC_OMAP2430) += clock2430.o obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o
arch/arm/mach-omap2/clkt2xxx_apll.c deleted +0 -142
142 lines not on this page · raw message
arch/arm/mach-omap2/clock2xxx.h +0 -11
@@ -22,12 +22,7 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,unsigned long omap2_osc_clk_recalc (struct clk_hw *clk,unsigned long parent_rate);void omap2xxx_clkt_dpllcore_init (struct clk_hw *hw); -unsigned long omap2_clk_apll54_recalc (struct clk_hw *hw, -unsigned long parent_rate); -unsigned long omap2_clk_apll96_recalc (struct clk_hw *hw, -unsigned long parent_rate);unsigned long omap2xxx_clk_get_core_rate (void ); -u32 omap2xxx_get_apll_clkin (void );u32 omap2xxx_get_sysclkdiv (void );void omap2xxx_clk_prepare_for_reboot (void );void omap2xxx_clkt_vps_check_bootloader_rates (void );
@@ -46,11 +41,5 @@ int omap2430_clk_init(void);#endif extern struct clk_hw *dclk_hw; -int omap2_enable_osc_ck (struct clk_hw *hw); -void omap2_disable_osc_ck (struct clk_hw *hw); -int omap2_clk_apll96_enable (struct clk_hw *hw); -int omap2_clk_apll54_enable (struct clk_hw *hw); -void omap2_clk_apll96_disable (struct clk_hw *hw); -void omap2_clk_apll54_disable (struct clk_hw *hw);#endif
Signature · 1 line
1.7.9.5
Tony Lindgren
maintainerPATCH 4/23 ARM: OMAP24xx: clock: remove unused apll code
Quoted 1 line · Tero Kristo
APLL clock type is no longer needed as the legacy clock support is removed.
I'm picking this patch into omap-for-v3.20/cleanup thanks.
Regards,
Tony
PATCH 5/23 ARM: OMAP2: CM: remove unused PLL functions
In reply to Tero Kristoomap2xxx_cm_get_pll_config and omap2xxx_cm_get_pll_status are not used for anything, so remove these.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/cm2xxx.c | 10 ---------- arch/arm/mach-omap2/cm2xxx.h | 2 -- 2 files changed, 12 deletions(-)
arch/arm/mach-omap2/cm2xxx.c +0 -10
@@ -370,16 +370,6 @@ u32 omap2xxx_cm_get_core_pll_config(void)return omap2_cm_read_mod_reg (PLL_MOD ,CM_CLKSEL2 ); } -u32 omap2xxx_cm_get_pll_config (void ) -{ -return omap2_cm_read_mod_reg (PLL_MOD ,CM_CLKSEL1 ); -} - -u32 omap2xxx_cm_get_pll_status (void ) -{ -return omap2_cm_read_mod_reg (PLL_MOD ,CM_CLKEN ); -} -void omap2xxx_cm_set_mod_dividers (u32 mpu,u32 dsp,u32 gfx,u32 core,u32 mdm) {u32 tmp;
arch/arm/mach-omap2/cm2xxx.h +0 -2
@@ -60,8 +60,6 @@ extern int omap2xxx_cm_fclks_active(void);extern int omap2xxx_cm_mpu_retention_allowed (void );extern u32 omap2xxx_cm_get_core_clk_src (void );extern u32 omap2xxx_cm_get_core_pll_config (void ); -extern u32 omap2xxx_cm_get_pll_config (void ); -extern u32 omap2xxx_cm_get_pll_status (void );extern void omap2xxx_cm_set_mod_dividers (u32 mpu,u32 dsp,u32 gfx,u32 core,u32 mdm);
Signature · 1 line
1.7.9.5
Tony Lindgren
maintainerPATCH 5/23 ARM: OMAP2: CM: remove unused PLL functions
Quoted 2 lines · Tero Kristo
omap2xxx_cm_get_pll_configandomap2xxx_cm_get_pll_statusare not used for anything, so remove these.
I'm picking up this one to into omap-for-v3.20/cleanup.
Regards,
Tony
PATCH 6/23 ARM: OMAP3: PRM: invert the wkst_mask for the prm_clear_mod_irqs
In reply to Tero KristoThis makes the API the same as used with OMAP2, and makes it possible to implement a generic driver API for the functionality.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/pm34xx.c | 18 +++++++++--------- arch/arm/mach-omap2/prm3xxx.c | 8 ++++---- arch/arm/mach-omap2/prm3xxx.h | 2 +- 3 files changed, 14 insertions(+), 14 deletions(-)
arch/arm/mach-omap2/pm34xx.c +9 -9
@@ -137,9 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) {int c; - c =omap3xxx_prm_clear_mod_irqs (WKUP_MOD ,1 , - ~(OMAP3430_ST_IO_MASK | -OMAP3430_ST_IO_CHAIN_MASK )); + c =omap3xxx_prm_clear_mod_irqs (WKUP_MOD ,1 ,OMAP3430_ST_IO_MASK | +OMAP3430_ST_IO_CHAIN_MASK );return c ?IRQ_HANDLED :IRQ_NONE ; }
@@ -154,13 +153,14 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)* IO events before parsing in mux code */ c =omap3xxx_prm_clear_mod_irqs (WKUP_MOD ,1 , -OMAP3430_ST_IO_MASK | -OMAP3430_ST_IO_CHAIN_MASK ); - c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,1 ,0 ); - c +=omap3xxx_prm_clear_mod_irqs (OMAP3430_PER_MOD ,1 ,0 ); + ~(OMAP3430_ST_IO_MASK | +OMAP3430_ST_IO_CHAIN_MASK )); + c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,1 , ~0 ); + c +=omap3xxx_prm_clear_mod_irqs (OMAP3430_PER_MOD ,1 , ~0 );if (omap_rev () >OMAP3430_REV_ES1_0 ) { - c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,3 ,0 ); - c +=omap3xxx_prm_clear_mod_irqs (OMAP3430ES2_USBHOST_MOD ,1 ,0 ); + c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,3 , ~0 ); + c +=omap3xxx_prm_clear_mod_irqs (OMAP3430ES2_USBHOST_MOD ,1 , + ~0 ); }return c ?IRQ_HANDLED :IRQ_NONE ;
arch/arm/mach-omap2/prm3xxx.c +4 -4
@@ -217,7 +217,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)* omap3xxx_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt * @module: PRM module to clear wakeups from * @regs: register set to clear, 1 or 3 -* @ignore_bits: wakeup status bits to ignore +* @wkst_mask: wkst bits to clear * * The purpose of this function is to clear any wake-up events latched * in the PRCM PM_WKST_x registers. It is possible that a wake-up event
@@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)* that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 ignore_bits) +int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) {u32 wkst, fclk, iclk, clken;u16 wkst_off = (regs ==3 ) ?OMAP3430ES2_PM_WKST3 :PM_WKST1 ;
@@ -238,7 +238,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits) wkst =omap2_prm_read_mod_reg (module, wkst_off); wkst &=omap2_prm_read_mod_reg (module, grpsel_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask;if (wkst) { iclk =omap2_cm_read_mod_reg (module, iclk_off); fclk =omap2_cm_read_mod_reg (module, fclk_off);
@@ -254,7 +254,7 @@ int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)omap2_cm_set_mod_reg_bits (clken, module, fclk_off);omap2_prm_write_mod_reg (wkst, module, wkst_off); wkst =omap2_prm_read_mod_reg (module, wkst_off); - wkst &= ~ignore_bits; + wkst &= wkst_mask; c++; }omap2_cm_write_mod_reg (iclk, module, iclk_off);
arch/arm/mach-omap2/prm3xxx.h +1 -1
@@ -146,7 +146,7 @@ extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);extern int __init omap3xxx_prm_init (void );extern u32 omap3xxx_prm_get_reset_sources (void ); -int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 ignore_bits); +int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask);void omap3xxx_prm_iva_idle (void );void omap3_prm_reset_modem (void );int omap3xxx_prm_clear_global_cold_reset (void );
Signature · 1 line
1.7.9.5
PATCH 7/23 ARM: OMAP2+: PRM: add generic API for clear_mod_irqs
In reply to Tero KristoOMAP2/3 now use generic API for the prm_clear_mod_irqs, the SoC specific implementation details are provided through prm_ll_data.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/pm24xx.c | 24 +++++++++++------------- arch/arm/mach-omap2/pm34xx.c | 18 ++++++++---------- arch/arm/mach-omap2/prm.h | 2 ++ arch/arm/mach-omap2/prm2xxx.c | 4 +++- arch/arm/mach-omap2/prm2xxx.h | 2 -- arch/arm/mach-omap2/prm3xxx.c | 3 ++- arch/arm/mach-omap2/prm3xxx.h | 1 - arch/arm/mach-omap2/prm_common.c | 21 +++++++++++++++++++++ 8 files changed, 47 insertions(+), 28 deletions(-)
arch/arm/mach-omap2/pm24xx.c +11 -13
@@ -75,9 +75,9 @@ static int omap2_enter_full_retention(void)/* Clear old wake-up events */ /* REVISIT: These write to reserved bits? */ -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 ); -omap2xxx_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 ); +omap_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST , ~0 );pwrdm_set_next_pwrst (core_pwrdm,PWRDM_POWER_RET );pwrdm_set_next_pwrst (mpu_pwrdm,PWRDM_POWER_RET );
@@ -104,18 +104,16 @@ no_sleep:clk_enable (osc_ck);/* clear CORE wake-up events */ -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 );/* wakeup domain events - bit 1: GPT1, bit5 GPIO */ -omap2xxx_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST ,0x4 |0x1 ); +omap_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST ,0x4 |0x1 );/* MPU domain wake events */ -omap2xxx_prm_clear_mod_irqs (OCP_MOD ,OMAP2_PRCM_IRQSTATUS_MPU_OFFSET , -0x1 ); +omap_prm_clear_mod_irqs (OCP_MOD ,OMAP2_PRCM_IRQSTATUS_MPU_OFFSET ,0x1 ); -omap2xxx_prm_clear_mod_irqs (OCP_MOD ,OMAP2_PRCM_IRQSTATUS_MPU_OFFSET , -0x20 ); +omap_prm_clear_mod_irqs (OCP_MOD ,OMAP2_PRCM_IRQSTATUS_MPU_OFFSET ,0x20 );pwrdm_set_next_pwrst (mpu_pwrdm,PWRDM_POWER_ON );pwrdm_set_next_pwrst (core_pwrdm,PWRDM_POWER_ON );
@@ -143,9 +141,9 @@ static void omap2_enter_mpu_retention(void)* it is in retention mode. */ if (omap2_allow_mpu_retention ()) {/* REVISIT: These write to reserved bits? */ -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); -omap2xxx_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 ); -omap2xxx_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,PM_WKST1 , ~0 ); +omap_prm_clear_mod_irqs (CORE_MOD ,OMAP24XX_PM_WKST2 , ~0 ); +omap_prm_clear_mod_irqs (WKUP_MOD ,PM_WKST , ~0 );/* Try to enter MPU retention */ pwrdm_set_next_pwrst (mpu_pwrdm,PWRDM_POWER_RET );
arch/arm/mach-omap2/pm34xx.c +8 -10
@@ -137,8 +137,8 @@ static irqreturn_t _prcm_int_handle_io(int irq, void *unused) {int c; - c =omap3xxx_prm_clear_mod_irqs (WKUP_MOD ,1 ,OMAP3430_ST_IO_MASK | -OMAP3430_ST_IO_CHAIN_MASK ); + c =omap_prm_clear_mod_irqs (WKUP_MOD ,1 ,OMAP3430_ST_IO_MASK | +OMAP3430_ST_IO_CHAIN_MASK );return c ?IRQ_HANDLED :IRQ_NONE ; }
@@ -152,15 +152,13 @@ static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)* these are handled in a separate handler to avoid acking * IO events before parsing in mux code */ - c =omap3xxx_prm_clear_mod_irqs (WKUP_MOD ,1 , - ~(OMAP3430_ST_IO_MASK | -OMAP3430_ST_IO_CHAIN_MASK )); - c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,1 , ~0 ); - c +=omap3xxx_prm_clear_mod_irqs (OMAP3430_PER_MOD ,1 , ~0 ); + c =omap_prm_clear_mod_irqs (WKUP_MOD ,1 , ~(OMAP3430_ST_IO_MASK | +OMAP3430_ST_IO_CHAIN_MASK )); + c +=omap_prm_clear_mod_irqs (CORE_MOD ,1 , ~0 ); + c +=omap_prm_clear_mod_irqs (OMAP3430_PER_MOD ,1 , ~0 );if (omap_rev () >OMAP3430_REV_ES1_0 ) { - c +=omap3xxx_prm_clear_mod_irqs (CORE_MOD ,3 , ~0 ); - c +=omap3xxx_prm_clear_mod_irqs (OMAP3430ES2_USBHOST_MOD ,1 , - ~0 ); + c +=omap_prm_clear_mod_irqs (CORE_MOD ,3 , ~0 ); + c +=omap_prm_clear_mod_irqs (OMAP3430ES2_USBHOST_MOD ,1 , ~0 ); }return c ?IRQ_HANDLED :IRQ_NONE ;
arch/arm/mach-omap2/prm.h +2 -0
@@ -145,6 +145,7 @@ struct prm_ll_data {int (*is_hardreset_asserted)(u8 shift,u8 part,s16 prm_mod,u16 offset);void (*reset_system)(void ); +int (*clear_mod_irqs)(s16 module,u8 regs,u32 wkst_mask); };extern int prm_register (struct prm_ll_data *pld);
@@ -160,6 +161,7 @@ extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);void omap_prm_reset_system (void );void omap_prm_reconfigure_io_chain (void ); +int omap_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask);#endif
arch/arm/mach-omap2/prm2xxx.c +3 -1
@@ -123,13 +123,14 @@ static void omap2xxx_prm_dpll_reset(void)* Clears wakeup status bits for a given module, so that the device can * re-enter idle. */ -void omap2xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) +static int omap2xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) {u32 wkst; wkst =omap2_prm_read_mod_reg (module, regs); wkst &= wkst_mask;omap2_prm_write_mod_reg (wkst, module, regs); +return 0 ; }int omap2xxx_clkdm_sleep (struct clockdomain *clkdm)
@@ -216,6 +217,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap2xxx_prm_dpll_reset, + .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, };int __init omap2xxx_prm_init (void )
arch/arm/mach-omap2/prm2xxx.h +0 -2
@@ -124,8 +124,6 @@extern int omap2xxx_clkdm_sleep (struct clockdomain *clkdm);extern int omap2xxx_clkdm_wakeup (struct clockdomain *clkdm); -void omap2xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask); -extern int __init omap2xxx_prm_init (void );#endif
arch/arm/mach-omap2/prm3xxx.c +2 -1
@@ -226,7 +226,7 @@ static void omap3xxx_prm_restore_irqen(u32 *saved_mask)* that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) +static int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) {u32 wkst, fclk, iclk, clken;u16 wkst_off = (regs ==3 ) ?OMAP3430ES2_PM_WKST3 :PM_WKST1 ;
@@ -664,6 +664,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .deassert_hardreset = &omap2_prm_deassert_hardreset, .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap3xxx_prm_dpll3_reset, + .clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs, };int __init omap3xxx_prm_init (void )
arch/arm/mach-omap2/prm3xxx.h +0 -1
@@ -146,7 +146,6 @@ extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);extern int __init omap3xxx_prm_init (void );extern u32 omap3xxx_prm_get_reset_sources (void ); -int omap3xxx_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask);void omap3xxx_prm_iva_idle (void );void omap3_prm_reset_modem (void );int omap3xxx_prm_clear_global_cold_reset (void );
arch/arm/mach-omap2/prm_common.c +21 -0
@@ -523,6 +523,27 @@ void omap_prm_reset_system(void) }/** +* omap_prm_clear_mod_irqs - clear wake-up events from PRCM interrupt +* @module: PRM module to clear wakeups from +* @regs: register to clear +* @wkst_mask: wkst bits to clear +* +* Clears any wakeup events for the module and register set defined. +* Uses SoC specific implementation to do the actual wakeup status +* clearing. +*/ +int omap_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask) +{ +if (!prm_ll_data->clear_mod_irqs) { +WARN_ONCE (1 ,"prm: %s: no mapping function defined\n" , + __func__); +return -EINVAL ; + } + +return prm_ll_data->clear_mod_irqs (module, regs, wkst_mask); +} + +/** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register *
Signature · 1 line
1.7.9.5
PATCH 8/23 ARM: OMAP3+: PRM: remove prm_get_reset_sources declaration from headers
In reply to Tero KristoThere is no implementation for this anywhere, so remove it from the header files also.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/prm3xxx.h | 1 - arch/arm/mach-omap2/prm44xx_54xx.h | 1 - 2 files changed, 2 deletions(-)
arch/arm/mach-omap2/prm3xxx.h +0 -1
@@ -145,7 +145,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset);extern u32 omap3_prm_vcvp_rmw (u32 mask,u32 bits,u8 offset);extern int __init omap3xxx_prm_init (void ); -extern u32 omap3xxx_prm_get_reset_sources (void );void omap3xxx_prm_iva_idle (void );void omap3_prm_reset_modem (void );int omap3xxx_prm_clear_global_cold_reset (void );
arch/arm/mach-omap2/prm44xx_54xx.h +0 -1
@@ -39,7 +39,6 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset);extern u32 omap4_prm_vcvp_rmw (u32 mask,u32 bits,u8 offset);extern int __init omap44xx_prm_init (void ); -extern u32 omap44xx_prm_get_reset_sources (void );#endif
Signature · 1 line
1.7.9.5
Tony Lindgren
maintainerPATCH 8/23 ARM: OMAP3+: PRM: remove prm_get_reset_sources declaration from headers
Quoted 2 lines · Tero Kristo
There is no implementation for this anywhere, so remove it from the header files also.
Picking up this too into omap-for-v3.20/cleanup.
Tony
PATCH 9/23 ARM: OMAP3+: PRM: add common APIs for prm_vp_check/clear_txdone
In reply to Tero KristoPRM driver now only exports a generic API for clearing / checking VP txdone status.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/prm.h | 14 ++++++++++++++ arch/arm/mach-omap2/prm3xxx.c | 6 ++++-- arch/arm/mach-omap2/prm3xxx.h | 4 ---- arch/arm/mach-omap2/prm44xx.c | 6 ++++-- arch/arm/mach-omap2/prm44xx_54xx.h | 4 ---- arch/arm/mach-omap2/prm_common.c | 34 ++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/vp.h | 9 --------- arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- arch/arm/mach-omap2/vp44xx_data.c | 4 ++-- 9 files changed, 60 insertions(+), 25 deletions(-)
arch/arm/mach-omap2/prm.h +14 -0
@@ -146,6 +146,8 @@ struct prm_ll_data { u16 offset);void (*reset_system)(void );int (*clear_mod_irqs)(s16 module,u8 regs,u32 wkst_mask); +u32 (*vp_check_txdone)(u8 vp_id); +void (*vp_clear_txdone)(u8 vp_id); };extern int prm_register (struct prm_ll_data *pld);
@@ -163,6 +165,18 @@ void omap_prm_reset_system(void);void omap_prm_reconfigure_io_chain (void );int omap_prm_clear_mod_irqs (s16 module,u8 regs,u32 wkst_mask); +/* +* Voltage Processor (VP) identifiers +*/ +#define OMAP3_VP_VDD_MPU_ID 0 +#define OMAP3_VP_VDD_CORE_ID 1 +#define OMAP4_VP_VDD_CORE_ID 0 +#define OMAP4_VP_VDD_IVA_ID 1 +#define OMAP4_VP_VDD_MPU_ID 2 + +u32 omap_prm_vp_check_txdone (u8 vp_id); +void omap_prm_vp_clear_txdone (u8 vp_id); +#endif
arch/arm/mach-omap2/prm3xxx.c +4 -2
@@ -96,7 +96,7 @@ static struct omap3_vp omap3_vp[] = {#define MAX_VP_ID ARRAY_SIZE(omap3_vp); -u32 omap3_prm_vp_check_txdone (u8 vp_id) +static u32 omap3_prm_vp_check_txdone (u8 vp_id) {struct omap3_vp *vp = &omap3_vp[vp_id];u32 irqstatus;
@@ -106,7 +106,7 @@ u32 omap3_prm_vp_check_txdone(u8 vp_id)return irqstatus & vp->tranxdone_status; } -void omap3_prm_vp_clear_txdone (u8 vp_id) +static void omap3_prm_vp_clear_txdone (u8 vp_id) {struct omap3_vp *vp = &omap3_vp[vp_id];
@@ -665,6 +665,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .is_hardreset_asserted = &omap2_prm_is_hardreset_asserted, .reset_system = &omap3xxx_prm_dpll3_reset, .clear_mod_irqs = &omap3xxx_prm_clear_mod_irqs, + .vp_check_txdone = &omap3_prm_vp_check_txdone, + .vp_clear_txdone = &omap3_prm_vp_clear_txdone, };int __init omap3xxx_prm_init (void )
arch/arm/mach-omap2/prm3xxx.h +0 -4
@@ -132,10 +132,6 @@#ifndef __ASSEMBLER__ -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone (u8 vp_id); -void omap3_prm_vp_clear_txdone (u8 vp_id); -/* * OMAP3 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM.
arch/arm/mach-omap2/prm44xx.c +4 -2
@@ -137,7 +137,7 @@ static struct omap4_vp omap4_vp[] = { }, }; -u32 omap4_prm_vp_check_txdone (u8 vp_id) +static u32 omap4_prm_vp_check_txdone (u8 vp_id) {struct omap4_vp *vp = &omap4_vp[vp_id];u32 irqstatus;
@@ -148,7 +148,7 @@ u32 omap4_prm_vp_check_txdone(u8 vp_id)return irqstatus & vp->tranxdone_status; } -void omap4_prm_vp_clear_txdone (u8 vp_id) +static void omap4_prm_vp_clear_txdone (u8 vp_id) {struct omap4_vp *vp = &omap4_vp[vp_id];
@@ -698,6 +698,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .deassert_hardreset = omap4_prminst_deassert_hardreset, .is_hardreset_asserted = omap4_prminst_is_hardreset_asserted, .reset_system = omap4_prminst_global_warm_sw_reset, + .vp_check_txdone = omap4_prm_vp_check_txdone, + .vp_clear_txdone = omap4_prm_vp_clear_txdone, };int __init omap44xx_prm_init (void )
arch/arm/mach-omap2/prm44xx_54xx.h +0 -4
@@ -26,10 +26,6 @@/* Function prototypes */ #ifndef __ASSEMBLER__ -/* OMAP4/OMAP5-specific VP functions */ -u32 omap4_prm_vp_check_txdone (u8 vp_id); -void omap4_prm_vp_clear_txdone (u8 vp_id); -/* * OMAP4/OMAP5 access functions for voltage controller (VC) and * voltage proccessor (VP) in the PRM.
arch/arm/mach-omap2/prm_common.c +36 -0
@@ -544,6 +544,42 @@ int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) }/** +* omap_prm_vp_check_txdone - check voltage processor TX done status +* @vp_id: voltage processor identifier to clear +* +* Checks if voltage processor transmission has been completed. +* Returns non-zero if a transmission has completed, 0 otherwise. +*/ +u32 omap_prm_vp_check_txdone (u8 vp_id) +{ +if (!prm_ll_data->vp_check_txdone) { +WARN_ONCE (1 ,"prm: %s: no mapping function defined\n" , + __func__); +return 0 ; + } + +return prm_ll_data->vp_check_txdone (vp_id); +} + +/** +* omap_prm_vp_clear_txdone - clears voltage processor TX done status +* @vp_id: voltage processor identifier to clear +* +* Clears the status bit for completed voltage processor transmission +* returned by prm_vp_check_txdone. +*/ +void omap_prm_vp_clear_txdone (u8 vp_id) +{ +if (!prm_ll_data->vp_clear_txdone) { +WARN_ONCE (1 ,"prm: %s: no mapping function defined\n" , + __func__); +return ; + } + + prm_ll_data->vp_clear_txdone (vp_id); +} + +/** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register *
arch/arm/mach-omap2/vp.h +0 -9
@@ -21,15 +21,6 @@struct voltagedomain ; -/* -* Voltage Processor (VP) identifiers -*/ -#define OMAP3_VP_VDD_MPU_ID 0 -#define OMAP3_VP_VDD_CORE_ID 1 -#define OMAP4_VP_VDD_CORE_ID 0 -#define OMAP4_VP_VDD_IVA_ID 1 -#define OMAP4_VP_VDD_MPU_ID 2 -/* XXX document */ #define VP_IDLE_TIMEOUT 200#define VP_TRANXDONE_TIMEOUT 300
arch/arm/mach-omap2/vp3xxx_data.c +2 -2
@@ -28,8 +28,8 @@#include "prm2xxx_3xxx.h" static const struct omap_vp_ops omap3_vp_ops = { - .check_txdone = omap3_prm_vp_check_txdone, - .clear_txdone = omap3_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, };/*
arch/arm/mach-omap2/vp44xx_data.c +2 -2
@@ -28,8 +28,8 @@#include "vp.h" static const struct omap_vp_ops omap4_vp_ops = { - .check_txdone = omap4_prm_vp_check_txdone, - .clear_txdone = omap4_prm_vp_clear_txdone, + .check_txdone = omap_prm_vp_check_txdone, + .clear_txdone = omap_prm_vp_clear_txdone, };/*
Signature · 1 line
1.7.9.5
PATCH 10/23 ARM: OMAP4+: PRM: move omap_prm_base_init under OMAP4 PRM driver
In reply to Tero KristoThere is no need to call this separately from io.c, rather this can be done commonly under the PRM driver.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/io.c | 4 ---- arch/arm/mach-omap2/prm44xx.c | 2 ++ 2 files changed, 2 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/io.c +0 -4
@@ -591,7 +591,6 @@ void __init am43xx_init_early(void) NULL);omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ));omap2_set_globals_cm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ),NULL ); -omap_prm_base_init ();omap_cm_base_init ();omap3xxx_check_revision ();am33xx_check_features ();
@@ -622,7 +621,6 @@ void __init omap4430_init_early(void)omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP4430_CM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP4430_CM2_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE )); -omap_prm_base_init ();omap_cm_base_init ();omap4xxx_check_revision ();omap4xxx_check_features ();
@@ -658,7 +656,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap_prm_base_init ();omap_cm_base_init ();omap44xx_prm_init ();omap5xxx_check_revision ();
@@ -690,7 +687,6 @@ void __init dra7xx_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap_prm_base_init ();omap_cm_base_init ();omap44xx_prm_init ();dra7xxx_check_revision ();
arch/arm/mach-omap2/prm44xx.c +2 -0
@@ -704,6 +704,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = {int __init omap44xx_prm_init (void ) { +omap_prm_base_init (); +if (cpu_is_omap44xx () ||soc_is_omap54xx () ||soc_is_dra7xx ()) prm_features |=PRM_HAS_IO_WAKEUP ;
Signature · 1 line
1.7.9.5
PATCH 11/23 ARM: OMAP4+: CM: move omap_cm_base_init under OMAP4 CM driver
In reply to Tero KristoThere is no need to call this separately from io.c, rather this can be done commonly under the CM driver. Also, this patch makes the API static, as it is no longer used outside the driver file.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/cm44xx.h | 1 - arch/arm/mach-omap2/cminst44xx.c | 4 +++- arch/arm/mach-omap2/io.c | 4 ---- 3 files changed, 3 insertions(+), 6 deletions(-)
arch/arm/mach-omap2/cm44xx.h +0 -1
@@ -23,7 +23,6 @@#define OMAP4_CM_CLKSTCTRL 0x0000#define OMAP4_CM_STATICDEP 0x0004 -void omap_cm_base_init (void );int omap4_cm_init (void );#endif
arch/arm/mach-omap2/cminst44xx.c +3 -1
@@ -63,7 +63,7 @@ static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];* Populates the base addresses of the _cm_bases * array used for read/write of cm module registers. */ -void omap_cm_base_init (void ) +static void omap_cm_base_init (void ) { _cm_bases[OMAP4430_PRM_PARTITION ] = prm_base; _cm_bases[OMAP4430_CM1_PARTITION ] = cm_base;
@@ -516,6 +516,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = {int __init omap4_cm_init (void ) { +omap_cm_base_init (); +return cm_register (&omap4xxx_cm_ll_data); }
arch/arm/mach-omap2/io.c +0 -4
@@ -591,7 +591,6 @@ void __init am43xx_init_early(void) NULL);omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ));omap2_set_globals_cm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ),NULL ); -omap_cm_base_init ();omap3xxx_check_revision ();am33xx_check_features ();omap44xx_prm_init ();
@@ -621,7 +620,6 @@ void __init omap4430_init_early(void)omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP4430_CM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP4430_CM2_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE )); -omap_cm_base_init ();omap4xxx_check_revision ();omap4xxx_check_features ();omap4_cm_init ();
@@ -656,7 +654,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap_cm_base_init ();omap44xx_prm_init ();omap5xxx_check_revision ();omap4_cm_init ();
@@ -687,7 +684,6 @@ void __init dra7xx_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap_cm_base_init ();omap44xx_prm_init ();dra7xxx_check_revision ();omap4_cm_init ();
Signature · 1 line
1.7.9.5
PATCH 12/23 ARM: OMAP2+: clock: add support for static clock memmap indexes
In reply to Tero KristoAll clock provider related drivers will now register their iomaps individually, and provide index number to the provider init. The clock related drivers also add support for providing init data through the DT match functionality; this is initially used only to provide the index variable, but can be expanded later to provide more functionality.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/clock.c | 32 ++++++++++++-------------- arch/arm/mach-omap2/clock.h | 10 +++++++- arch/arm/mach-omap2/cm_common.c | 43 +++++++++++++++++++++++++++------- arch/arm/mach-omap2/control.c | 37 +++++++++++++++++++++++++---- arch/arm/mach-omap2/prcm-common.h | 8 +++++++ arch/arm/mach-omap2/prm_common.c | 46 ++++++++++++++++++++++++++----------- 6 files changed, 132 insertions(+), 44 deletions(-)
arch/arm/mach-omap2/clock.c +15 -17
@@ -117,30 +117,28 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {/** * omap2_clk_provider_init - initialize a clock provider -* @match_table: DT device table to match for devices to init +* @np: device node for initializing the clock provider +* @index: memory map index for the clock provider +* @mem: iomem pointer for the memory map * -* Initializes a clock provider module (CM/PRM etc.), allocating the -* memory mapping, allocating the mapping index and initializing the -* low level driver infrastructure. Returns 0 in success, -ENOMEM in -* failure. +* Initializes a clock provider module (CM/PRM etc.), registering +* the iomap and initializing the low level driver infrastructure. +* Returns 0 in success, -EINVAL if multiple registration is attempted. */ -int __init omap2_clk_provider_init (const struct of_device_id *match_table) +int __init omap2_clk_provider_init (struct device_node *np,int index, +void __iomem *mem) { -struct device_node *np; -void __iomem *mem; -static int memmap_index; - ti_clk_ll_ops = &omap_clk_ll_ops; -for_each_matching_node (np, match_table) { - mem =of_iomap (np,0 ); -if (!mem) -return -ENOMEM ; - clk_memmaps[memmap_index] = mem; -ti_dt_clk_init_provider (np, memmap_index); - memmap_index++; +if (clk_memmaps[index]) { +pr_err ("%s: duplicate registration for index %d!\n" , __func__, + index); +return -EINVAL ; } + clk_memmaps[index] = mem; +ti_dt_clk_init_provider (np, index); +return 0 ; }
arch/arm/mach-omap2/clock.h +9 -1
@@ -235,6 +235,13 @@ struct ti_clk_features {#define TI_CLK_DPLL_HAS_FREQSEL (1 << 0) +enum { +CLK_MEMMAP_INDEX_PRM =0 , +CLK_MEMMAP_INDEX_CM1 , +CLK_MEMMAP_INDEX_CM2 , +CLK_MEMMAP_INDEX_SCRM , +}; +extern struct ti_clk_features ti_clk_features;extern const struct clkops clkops_omap2_dflt_wait;
@@ -274,7 +281,8 @@ extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);extern void omap_clocks_register (struct omap_clk *oclks,int cnt); -int __init omap2_clk_provider_init (const struct of_device_id *match_table); +int __init omap2_clk_provider_init (struct device_node *np,int index, +void __iomem *mem);void __init ti_clk_init_features (void );#endif
arch/arm/mach-omap2/cm_common.c +35 -8
60 lines not on this page · raw message
arch/arm/mach-omap2/control.c +32 -5
@@ -14,6 +14,7 @@#include <linux/kernel.h> #include <linux/io.h> +#include <linux/of_address.h> #include "soc.h" #include "iomap.h"
@@ -613,11 +614,19 @@ void __init omap3_ctrl_init(void) }#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ +struct control_init_data { +int index; +}; + +static const struct control_init_data ctrl_data = { + .index =CLK_MEMMAP_INDEX_SCRM , +}; +static struct of_device_id omap_scrm_dt_match_table[] = { - { .compatible ="ti,am3-scrm" }, - { .compatible ="ti,am4-scrm" }, - { .compatible ="ti,omap2-scrm" }, - { .compatible ="ti,omap3-scrm" }, + { .compatible ="ti,am3-scrm" , .data = &ctrl_data }, + { .compatible ="ti,am4-scrm" , .data = &ctrl_data }, + { .compatible ="ti,omap2-scrm" , .data = &ctrl_data }, + { .compatible ="ti,omap3-scrm" , .data = &ctrl_data }, { } };
@@ -629,5 +638,23 @@ static struct of_device_id omap_scrm_dt_match_table[] = {*/ int __init omap_control_init (void ) { -return omap2_clk_provider_init (omap_scrm_dt_match_table); +struct device_node *np; +const struct of_device_id *match; +const struct control_init_data *data; +void __iomem *mem; +int ret; + +for_each_matching_node_and_match (np, omap_scrm_dt_match_table, &match) { + data = match->data; + + mem =of_iomap (np,0 ); +if (!mem) +return -ENOMEM ; + + ret =omap2_clk_provider_init (np, data->index, mem); +if (ret) +return ret; + } + +return 0 ; }
arch/arm/mach-omap2/prcm-common.h +8 -0
@@ -519,6 +519,14 @@ struct omap_prcm_irq_setup {struct of_device_id ; +/** +* struct omap_prcm_init_data - PRCM driver init data +* @index: clock memory mapping index to be used +*/ +struct omap_prcm_init_data { +int index; +}; +extern void omap_prcm_irq_cleanup (void );extern int omap_prcm_register_chain_handler (struct omap_prcm_irq_setup *irq_setup);
arch/arm/mach-omap2/prm_common.c +33 -13
60 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 13/23 ARM: OMAP2+: CM: determine CM base address from device tree
In reply to Tero KristoThere is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under io.c.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/cm.h | 1 + arch/arm/mach-omap2/cm2xxx.c | 1 + arch/arm/mach-omap2/cm33xx.c | 1 + arch/arm/mach-omap2/cm3xxx.c | 1 + arch/arm/mach-omap2/cm_common.c | 56 +++++++++++++++++++++++++++++++------ arch/arm/mach-omap2/cminst44xx.c | 1 + arch/arm/mach-omap2/io.c | 12 ++------ arch/arm/mach-omap2/prcm-common.h | 4 +++ 8 files changed, 58 insertions(+), 19 deletions(-)
arch/arm/mach-omap2/cm.h +1 -0
@@ -71,6 +71,7 @@ int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);extern int cm_register (struct cm_ll_data *cld);extern int cm_unregister (struct cm_ll_data *cld);int omap_cm_init (void ); +int omap2_cm_base_init (void );# endif
arch/arm/mach-omap2/cm2xxx.c +1 -0
@@ -395,6 +395,7 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {int __init omap2xxx_cm_init (void ) { +omap2_cm_base_init ();return cm_register (&omap2xxx_cm_ll_data); }
arch/arm/mach-omap2/cm33xx.c +1 -0
@@ -375,6 +375,7 @@ static struct cm_ll_data am33xx_cm_ll_data = {int __init am33xx_cm_init (void ) { +omap2_cm_base_init ();return cm_register (&am33xx_cm_ll_data); }
arch/arm/mach-omap2/cm3xxx.c +1 -0
@@ -673,6 +673,7 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {int __init omap3xxx_cm_init (void ) { +omap2_cm_base_init ();return cm_register (&omap3xxx_cm_ll_data); }
arch/arm/mach-omap2/cm_common.c +47 -9
86 lines not on this page · raw message
arch/arm/mach-omap2/cminst44xx.c +1 -0
@@ -516,6 +516,7 @@ static struct cm_ll_data omap4xxx_cm_ll_data = {int __init omap4_cm_init (void ) { +omap2_cm_base_init ();omap_cm_base_init ();return cm_register (&omap4xxx_cm_ll_data);
arch/arm/mach-omap2/io.c +2 -10
@@ -387,7 +387,6 @@ void __init omap2420_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP242X_CTRL_BASE ),NULL );omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP2420_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP2420_CM_BASE ),NULL );omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -417,7 +416,6 @@ void __init omap2430_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP243X_CTRL_BASE ),NULL );omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP2430_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP2430_CM_BASE ),NULL );omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -451,6 +449,8 @@ void __init omap3_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE ),NULL );omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP3430_PRM_BASE )); + +/* XXX: remove this once OMAP3 is DT only */ omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP3430_CM_BASE ),NULL );omap3xxx_check_revision ();omap3xxx_check_features ();
@@ -564,7 +564,6 @@ void __init am33xx_init_early(void)omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ),NULL );omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM33XX_PRCM_BASE )); -omap2_set_globals_cm (AM33XX_L4_WK_IO_ADDRESS (AM33XX_PRCM_BASE ),NULL );omap3xxx_check_revision ();am33xx_check_features ();am33xx_prm_init ();
@@ -590,7 +589,6 @@ void __init am43xx_init_early(void)omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ),NULL );omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE )); -omap2_set_globals_cm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ),NULL );omap3xxx_check_revision ();am33xx_check_features ();omap44xx_prm_init ();
@@ -617,8 +615,6 @@ void __init omap4430_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP443X_SCM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP443X_CTRL_BASE ));omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP4430_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP4430_CM_BASE ), -OMAP2_L4_IO_ADDRESS (OMAP4430_CM2_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE ));omap4xxx_check_revision ();omap4xxx_check_features ();
@@ -650,8 +646,6 @@ void __init omap5_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP54XX_CTRL_BASE ));omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP54XX_CM_CORE_AON_BASE ), -OMAP2_L4_IO_ADDRESS (OMAP54XX_CM_CORE_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
@@ -680,8 +674,6 @@ void __init dra7xx_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ),OMAP2_L4_IO_ADDRESS (DRA7XX_CTRL_BASE ));omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (DRA7XX_CM_CORE_AON_BASE ), -OMAP2_L4_IO_ADDRESS (OMAP54XX_CM_CORE_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
arch/arm/mach-omap2/prcm-common.h +4 -0
@@ -522,9 +522,13 @@ struct of_device_id;/** * struct omap_prcm_init_data - PRCM driver init data * @index: clock memory mapping index to be used +* @mem: IO mem pointer for this module +* @offset: module base address offset from the IO base */ struct omap_prcm_init_data {int index; +void __iomem *mem; +s16 offset; };extern void omap_prcm_irq_cleanup (void );
Signature · 1 line
1.7.9.5
Paul Walmsley
maintainerPATCH 13/23 ARM: OMAP2+: CM: determine CM base address from device tree
Hi Tero
Quoted 6 lines · Tero Kristo
There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under
io.c.Signed-off-by Tero Kristo <[email protected]>
This one breaks boot on OMAP2430 (and presumably all other OMAP2xxx). Adding something like this seems to get it working.
- Paul
--- arch/arm/mach-omap2/cm_common.c | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/mach-omap2/cm_common.c +5 -0
@@ -234,7 +234,12 @@ static struct omap_prcm_init_data omap3_cm_data = { .offset = -OMAP3430_IVA2_MOD, }; +static struct omap_prcm_init_data omap2_prcm_data = { + .index =CLK_MEMMAP_INDEX_CM1 , +}; +static struct of_device_id omap_cm_dt_match_table[] = { + { .compatible ="ti,omap2-prcm" , .data = &omap2_prcm_data }, { .compatible ="ti,omap3-cm" , .data = &omap3_cm_data }, { .compatible ="ti,omap4-cm1" , .data = &cm_data }, { .compatible ="ti,omap4-cm2" , .data = &cm2_data },
Signature · 1 line
2.1.4
PATCH 13/23 ARM: OMAP2+: CM: determine CM base address from device tree
Quoted 9 lines · Paul Walmsley
Hi Tero
Quoted 5 lines · Tero Kristo
There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under
io.c.
Quoted 4 lines
Quoted 1 line
Signed-off-by Tero Kristo <[email protected]>This one breaks boot on OMAP2430 (and presumably all other OMAP2xxx). Adding something like this seems to get it working.
Yeah, you are right. This patch also broke am33xx boot, I will fix this in v2.
-Tero
Quoted 26 lines
- Paul
--- arch/arm/mach-omap2/cm_common.c | 5 +++++ 1 file changed, 5 insertions(+)arch/arm/mach-omap2/cm_common.c +5
-0@@ -234,7 +234,12 @@ static struct omap_prcm_init_data omap3_cm_data = { .offset = -OMAP3430_IVA2_MOD, }; +static struct omap_prcm_init_data omap2_prcm_data = { + .index =CLK_MEMMAP_INDEX_CM1 , +}; +static struct of_device_id omap_cm_dt_match_table[] = { + { .compatible ="ti,omap2-prcm" , .data = &omap2_prcm_data }, { .compatible ="ti,omap3-cm" , .data = &omap3_cm_data }, { .compatible ="ti,omap4-cm1" , .data = &cm_data }, { .compatible ="ti,omap4-cm2" , .data = &cm2_data },
PATCH 14/23 ARM: OMAP4: PRM: move omap4xxx_prm_init earlier in init order
In reply to Tero KristoOMAP4 has different ordering of PRM and CM init calls in the early init. Re-oder these accordingly for OMAP4 also. This is needed so that we can do some optimizations in the following patches for the PRCM init.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/io.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-omap2/io.c +1 -1
@@ -618,9 +618,9 @@ void __init omap4430_init_early(void)omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE ));omap4xxx_check_revision ();omap4xxx_check_features (); +omap44xx_prm_init ();omap4_cm_init ();omap4_pm_init_early (); -omap44xx_prm_init ();omap44xx_voltagedomains_init ();omap44xx_powerdomains_init ();omap44xx_clockdomains_init ();
Signature · 1 line
1.7.9.5
PATCH 15/23 ARM: OMAP2+: PRM: determine PRM base address from device tree
In reply to Tero KristoThere is no need to provide the PRM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the PRM drivers also to simplify the implementation under io.c.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/io.c | 11 ++------ arch/arm/mach-omap2/prm.h | 1 + arch/arm/mach-omap2/prm2xxx.c | 1 + arch/arm/mach-omap2/prm33xx.c | 1 + arch/arm/mach-omap2/prm3xxx.c | 2 ++ arch/arm/mach-omap2/prm44xx.c | 1 + arch/arm/mach-omap2/prm_common.c | 53 +++++++++++++++++++++++++++++++------- 7 files changed, 52 insertions(+), 18 deletions(-)
arch/arm/mach-omap2/io.c +2 -9
@@ -386,7 +386,6 @@ void __init omap2420_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP242X_CTRL_BASE ),NULL ); -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP2420_PRM_BASE ));omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -415,7 +414,6 @@ void __init omap2430_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP243X_CTRL_BASE ),NULL ); -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP2430_PRM_BASE ));omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -448,9 +446,8 @@ void __init omap3_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE ),NULL ); +/* XXX: remove these two once OMAP3 is DT only */ omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP3430_PRM_BASE )); - -/* XXX: remove this once OMAP3 is DT only */ omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP3430_CM_BASE ),NULL );omap3xxx_check_revision ();omap3xxx_check_features ();
@@ -498,6 +495,7 @@ void __init ti81xx_init_early(void) OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (TI81XX_CTRL_BASE ),NULL ); +/* XXX: remove these two once TI81xx is DT only */ omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ));omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ),NULL );omap3xxx_check_revision ();
@@ -563,7 +561,6 @@ void __init am33xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ),NULL ); -omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM33XX_PRCM_BASE ));omap3xxx_check_revision ();am33xx_check_features ();am33xx_prm_init ();
@@ -588,7 +585,6 @@ void __init am43xx_init_early(void) AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ),NULL ); -omap2_set_globals_prm (AM33XX_L4_WK_IO_ADDRESS (AM43XX_PRCM_BASE ));omap3xxx_check_revision ();am33xx_check_features ();omap44xx_prm_init ();
@@ -614,7 +610,6 @@ void __init omap4430_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP443X_SCM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP443X_CTRL_BASE )); -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP4430_PRM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE ));omap4xxx_check_revision ();omap4xxx_check_features ();
@@ -645,7 +640,6 @@ void __init omap5_init_early(void) OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ),OMAP2_L4_IO_ADDRESS (OMAP54XX_CTRL_BASE )); -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
@@ -673,7 +667,6 @@ void __init dra7xx_init_early(void)omap2_set_globals_tap (-1 ,OMAP2_L4_IO_ADDRESS (DRA7XX_TAP_BASE ));omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ),OMAP2_L4_IO_ADDRESS (DRA7XX_CTRL_BASE )); -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
arch/arm/mach-omap2/prm.h +1 -0
@@ -20,6 +20,7 @@ extern void __iomem *prm_base;extern u16 prm_features;extern void omap2_set_globals_prm (void __iomem *prm);int omap_prcm_init (void ); +int omap2_prm_base_init (void );# endif /*
arch/arm/mach-omap2/prm2xxx.c +1 -0
@@ -222,6 +222,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {int __init omap2xxx_prm_init (void ) { +omap2_prm_base_init ();return prm_register (&omap2xxx_prm_ll_data); }
arch/arm/mach-omap2/prm33xx.c +1 -0
@@ -380,6 +380,7 @@ static struct prm_ll_data am33xx_prm_ll_data = {int __init am33xx_prm_init (void ) { +omap2_prm_base_init ();return prm_register (&am33xx_prm_ll_data); }
arch/arm/mach-omap2/prm3xxx.c +2 -0
@@ -671,6 +671,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {int __init omap3xxx_prm_init (void ) { +omap2_prm_base_init (); +if (omap3_has_io_wakeup ()) prm_features |=PRM_HAS_IO_WAKEUP ;
arch/arm/mach-omap2/prm44xx.c +1 -0
@@ -704,6 +704,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {int __init omap44xx_prm_init (void ) { +omap2_prm_base_init ();omap_prm_base_init ();if (cpu_is_omap44xx () ||soc_is_omap54xx () ||soc_is_dra7xx ())
arch/arm/mach-omap2/prm_common.c +44 -9
85 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 16/23 ARM: OMAP4: omapdss: remove legacy pad muxing support
In reply to Tero KristoOMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver.
Signed-off-by Tero Kristo <[email protected]>
Cc Tomi Valkeinen <[email protected]>
--- arch/arm/mach-omap2/display.c | 38 -------------------------------------- 1 file changed, 38 deletions(-)
arch/arm/mach-omap2/display.c +0 -38
@@ -104,51 +104,13 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = { { "dss_hdmi", "omapdss_hdmi", -1 }, }; -static int omap4_dsi_mux_pads (int dsi_id,unsigned lanes) -{ -u32 enable_mask, enable_shift; -u32 pipd_mask, pipd_shift; -u32 reg; - -if (dsi_id ==0 ) { - enable_mask =OMAP4_DSI1_LANEENABLE_MASK ; - enable_shift =OMAP4_DSI1_LANEENABLE_SHIFT ; - pipd_mask =OMAP4_DSI1_PIPD_MASK ; - pipd_shift =OMAP4_DSI1_PIPD_SHIFT ; - }else if (dsi_id ==1 ) { - enable_mask =OMAP4_DSI2_LANEENABLE_MASK ; - enable_shift =OMAP4_DSI2_LANEENABLE_SHIFT ; - pipd_mask =OMAP4_DSI2_PIPD_MASK ; - pipd_shift =OMAP4_DSI2_PIPD_SHIFT ; - }else { -return -ENODEV ; - } - - reg =omap4_ctrl_pad_readl (OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY ); - - reg &= ~enable_mask; - reg &= ~pipd_mask; - - reg |= (lanes << enable_shift) & enable_mask; - reg |= (lanes << pipd_shift) & pipd_mask; - -omap4_ctrl_pad_writel (reg,OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY ); - -return 0 ; -} -static int omap_dsi_enable_pads (int dsi_id,unsigned lane_mask) { -if (cpu_is_omap44xx ()) -return omap4_dsi_mux_pads (dsi_id, lane_mask); -return 0 ; }static void omap_dsi_disable_pads (int dsi_id,unsigned lane_mask) { -if (cpu_is_omap44xx ()) -omap4_dsi_mux_pads (dsi_id,0 ); }static int omap_dss_set_min_bus_tput (struct device *dev,unsigned long tput)
Signature · 1 line
1.7.9.5
PATCH 16/23 ARM: OMAP4: omapdss: remove legacy pad muxing support
Quoted 3 lines · Tero Kristo
OMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver.
We still use those mux functions for DT. The mux registers for DSI are so funny that we can't use the normal padconf for them.
I did do some work to use syscon, but I never had time to finish it.
Tomi
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PATCH 16/23 ARM: OMAP4: omapdss: remove legacy pad muxing support
Quoted 7 lines · Tomi Valkeinen
Quoted 3 lines · Tero Kristo
OMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver.
We still use those mux functions for DT. The mux registers for DSI are so funny that we can't use the normal padconf for them.
Ah hmm, so it seems, I overlooked the omapdss_init_of() function. Looks like some of the patches in this set needs to be dropped for now then, namely 16, 17, and patch 18 has to be modified.
The direct omap4 padconf hacks are very bad though. Maybe it should be changed to only allow access to that single DSIPHY register.
-Tero
Quoted 5 lines
I did do some work to use syscon, but I never had time to finish it.
Tomi
Paul Walmsley
maintainerPATCH 16/23 ARM: OMAP4: omapdss: remove legacy pad muxing support
In reply to Tero KristoQuoted 6 lines · Tero Kristo
OMAP4 is DT only now, so the legacy mux support is not needed anymore. Padconf is used instead from the driver / DT. This removes the need for having the mux APIs exported from the control module driver.
Signed-off-by Tero Kristo <[email protected]>Cc Tomi Valkeinen <[email protected]>
Dropping since Tomi mentioned legacy mux support is still in use.
- Paul
PATCH 17/23 ARM: OMAP4: control: remove support for legacy padconf APIs
In reply to Tero KristoThese are no longer needed for anything with the introduction of pinctrl DT support, thus removed.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/control.c | 23 +---------------------- arch/arm/mach-omap2/control.h | 5 +---- arch/arm/mach-omap2/io.c | 27 +++++++++------------------ 3 files changed, 11 insertions(+), 44 deletions(-)
arch/arm/mach-omap2/control.c +1 -22
@@ -33,7 +33,6 @@#define PADCONF_SAVE_DONE 0x1static void __iomem *omap2_ctrl_base; -static void __iomem *omap4_ctrl_pad_base;#if defined(CONFIG_ARCH_OMAP3 ) && defined(CONFIG_PM ) struct omap3_scratchpad {
@@ -136,13 +135,10 @@ static struct omap3_control_regs control_context;#endif /* CONFIG_ARCH_OMAP3 && CONFIG_PM */ #define OMAP_CTRL_REGADDR (reg) (omap2_ctrl_base + (reg)) -#define OMAP4_CTRL_PAD_REGADDR (reg) (omap4_ctrl_pad_base + (reg)) -void __init omap2_set_globals_control (void __iomem *ctrl, -void __iomem *ctrl_pad) +void __init omap2_set_globals_control (void __iomem *ctrl) { omap2_ctrl_base = ctrl; - omap4_ctrl_pad_base = ctrl_pad; }void __iomem *omap_ctrl_base_get (void )
@@ -180,23 +176,6 @@ void omap_ctrl_writel(u32 val, u16 offset)writel_relaxed (val,OMAP_CTRL_REGADDR (offset)); } -/* -* On OMAP4 control pad are not addressable from control -* core base. So the common omap_ctrl_read/write APIs breaks -* Hence export separate APIs to manage the omap4 pad control -* registers. This APIs will work only for OMAP4 -*/ - -u32 omap4_ctrl_pad_readl (u16 offset) -{ -return readl_relaxed (OMAP4_CTRL_PAD_REGADDR (offset)); -} - -void omap4_ctrl_pad_writel (u32 val,u16 offset) -{ -writel_relaxed (val,OMAP4_CTRL_PAD_REGADDR (offset)); -} -#ifdef CONFIG_ARCH_OMAP3 /**
arch/arm/mach-omap2/control.h +1 -4
@@ -436,11 +436,9 @@ extern void __iomem *omap_ctrl_base_get(void);extern u8 omap_ctrl_readb (u16 offset);extern u16 omap_ctrl_readw (u16 offset);extern u32 omap_ctrl_readl (u16 offset); -extern u32 omap4_ctrl_pad_readl (u16 offset);extern void omap_ctrl_writeb (u8 val,u16 offset);extern void omap_ctrl_writew (u16 val,u16 offset);extern void omap_ctrl_writel (u32 val,u16 offset); -extern void omap4_ctrl_pad_writel (u32 val,u16 offset);extern void omap3_save_scratchpad_contents (void );extern void omap3_clear_scratchpad_contents (void );
@@ -457,8 +455,7 @@ extern void omap3630_ctrl_disable_rta(void);extern int omap3_ctrl_save_padconf (void );void omap3_ctrl_init (void );int omap_control_init (void ); -extern void omap2_set_globals_control (void __iomem *ctrl, -void __iomem *ctrl_pad); +void omap2_set_globals_control (void __iomem *ctrl);#else #define omap_ctrl_base_get () 0#define omap_ctrl_readb (x) 0
arch/arm/mach-omap2/io.c +9 -18
@@ -384,8 +384,7 @@ void __init omap2420_init_early(void)omap2_set_globals_tap (OMAP242X_CLASS ,OMAP2_L4_IO_ADDRESS (0x48014000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP2420_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP2420_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP242X_CTRL_BASE ), -NULL ); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP242X_CTRL_BASE ));omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -412,8 +411,7 @@ void __init omap2430_init_early(void)omap2_set_globals_tap (OMAP243X_CLASS ,OMAP2_L4_IO_ADDRESS (0x4900a000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP243X_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP243X_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP243X_CTRL_BASE ), -NULL ); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP243X_CTRL_BASE ));omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -444,8 +442,7 @@ void __init omap3_init_early(void)omap2_set_globals_tap (OMAP343X_CLASS ,OMAP2_L4_IO_ADDRESS (0x4830A000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP343X_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP343X_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE ), -NULL ); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE ));/* XXX: remove these two once OMAP3 is DT only */ omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP3430_PRM_BASE ));omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP3430_CM_BASE ),NULL );
@@ -493,8 +490,7 @@ void __init ti81xx_init_early(void) {omap2_set_globals_tap (OMAP343X_CLASS ,OMAP2_L4_IO_ADDRESS (TI81XX_TAP_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (TI81XX_CTRL_BASE ), -NULL ); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (TI81XX_CTRL_BASE ));/* XXX: remove these two once TI81xx is DT only */ omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ));omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ),NULL );
@@ -559,8 +555,7 @@ void __init am33xx_init_early(void) {omap2_set_globals_tap (AM335X_CLASS ,AM33XX_L4_WK_IO_ADDRESS (AM33XX_TAP_BASE )); -omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ), -NULL ); +omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ));omap3xxx_check_revision ();am33xx_check_features ();am33xx_prm_init ();
@@ -583,8 +578,7 @@ void __init am43xx_init_early(void) {omap2_set_globals_tap (AM335X_CLASS ,AM33XX_L4_WK_IO_ADDRESS (AM33XX_TAP_BASE )); -omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ), -NULL ); +omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE ));omap3xxx_check_revision ();am33xx_check_features ();omap44xx_prm_init ();
@@ -608,8 +602,7 @@ void __init omap4430_init_early(void) {omap2_set_globals_tap (OMAP443X_CLASS ,OMAP2_L4_IO_ADDRESS (OMAP443X_SCM_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP443X_SCM_BASE ), -OMAP2_L4_IO_ADDRESS (OMAP443X_CTRL_BASE )); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP443X_SCM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE ));omap4xxx_check_revision ();omap4xxx_check_features ();
@@ -638,8 +631,7 @@ void __init omap5_init_early(void) {omap2_set_globals_tap (OMAP54XX_CLASS ,OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ), -OMAP2_L4_IO_ADDRESS (OMAP54XX_CTRL_BASE )); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
@@ -665,8 +657,7 @@ void __init omap5_init_late(void)void __init dra7xx_init_early (void ) {omap2_set_globals_tap (-1 ,OMAP2_L4_IO_ADDRESS (DRA7XX_TAP_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ), -OMAP2_L4_IO_ADDRESS (DRA7XX_CTRL_BASE )); +omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early ();omap44xx_prm_init ();
Signature · 1 line
1.7.9.5
Paul Walmsley
maintainerPATCH 17/23 ARM: OMAP4: control: remove support for legacy padconf APIs
Quoted 4 lines · Tero Kristo
These are no longer needed for anything with the introduction of pinctrl DT support, thus removed.
Signed-off-by Tero Kristo <[email protected]>
Dropping since Tomi mentioned that the legacy mux support is still in use.
- Paul
PATCH 18/23 ARM: OMAP2+: control: determine control module base address from DT
In reply to Tero KristoThere is no need to provide the control module base address through a low-level API from the low-level IO init, as this information is available through DT. This patch adds a new API to initialize the control module though, but mostly makes the old API obsolete. The old API can be completely removed once OMAP3 is made DT only.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/control.c | 36 ++++++++++++++++++++++++++++++------ arch/arm/mach-omap2/control.h | 1 + arch/arm/mach-omap2/io.c | 34 ++++++++++++++++++++++------------ 3 files changed, 53 insertions(+), 18 deletions(-)
arch/arm/mach-omap2/control.c +30 -6
@@ -595,6 +595,7 @@ void __init omap3_ctrl_init(void)struct control_init_data {int index; +void __iomem *mem; };static const struct control_init_data ctrl_data = {
@@ -610,6 +611,34 @@ static struct of_device_id omap_scrm_dt_match_table[] = { };/** +* omap2_control_base_init - initialize iomappings for the control driver +* +* Detects and initializes the iomappings for the control driver, based +* on the DT data. Returns 0 in success, negative error value +* otherwise. +*/ +int __init omap2_control_base_init (void ) +{ +struct device_node *np; +const struct of_device_id *match; +struct control_init_data *data; +void __iomem *mem; + +for_each_matching_node_and_match (np, omap_scrm_dt_match_table, &match) { + data = (struct control_init_data *)match->data; + + mem =of_iomap (np,0 ); +if (!mem) +return -ENOMEM ; + + omap2_ctrl_base = mem; + data->mem = mem; + } + +return 0 ; +} + +/** * omap_control_init - low level init for the control driver * * Initializes the low level clock infrastructure for control driver.
@@ -620,17 +649,12 @@ int __init omap_control_init(void)struct device_node *np;const struct of_device_id *match;const struct control_init_data *data; -void __iomem *mem;int ret;for_each_matching_node_and_match (np, omap_scrm_dt_match_table, &match) { data = match->data; - mem =of_iomap (np,0 ); -if (!mem) -return -ENOMEM ; - - ret =omap2_clk_provider_init (np, data->index, mem); + ret =omap2_clk_provider_init (np, data->index, data->mem);if (ret)return ret; }
arch/arm/mach-omap2/control.h +1 -0
@@ -454,6 +454,7 @@ extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);extern void omap3630_ctrl_disable_rta (void );extern int omap3_ctrl_save_padconf (void );void omap3_ctrl_init (void ); +int omap2_control_base_init (void );int omap_control_init (void );void omap2_set_globals_control (void __iomem *ctrl);#else
arch/arm/mach-omap2/io.c +22 -12
@@ -384,7 +384,7 @@ void __init omap2420_init_early(void)omap2_set_globals_tap (OMAP242X_CLASS ,OMAP2_L4_IO_ADDRESS (0x48014000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP2420_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP2420_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP242X_CTRL_BASE )); +omap2_control_base_init ();omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -411,7 +411,7 @@ void __init omap2430_init_early(void)omap2_set_globals_tap (OMAP243X_CLASS ,OMAP2_L4_IO_ADDRESS (0x4900a000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP243X_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP243X_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP243X_CTRL_BASE )); +omap2_control_base_init ();omap2xxx_check_revision ();omap2xxx_prm_init ();omap2xxx_cm_init ();
@@ -442,10 +442,15 @@ void __init omap3_init_early(void)omap2_set_globals_tap (OMAP343X_CLASS ,OMAP2_L4_IO_ADDRESS (0x4830A000 ));omap2_set_globals_sdrc (OMAP2_L3_IO_ADDRESS (OMAP343X_SDRC_BASE ),OMAP2_L3_IO_ADDRESS (OMAP343X_SMS_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE )); -/* XXX: remove these two once OMAP3 is DT only */ -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP3430_PRM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP3430_CM_BASE ),NULL ); +/* XXX: remove these once OMAP3 is DT only */ +if (!of_have_populated_dt ()) { +omap2_set_globals_control ( +OMAP2_L4_IO_ADDRESS (OMAP343X_CTRL_BASE )); +omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (OMAP3430_PRM_BASE )); +omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (OMAP3430_CM_BASE ), +NULL ); + } +omap2_control_base_init ();omap3xxx_check_revision ();omap3xxx_check_features ();omap3xxx_prm_init ();
@@ -490,10 +495,15 @@ void __init ti81xx_init_early(void) {omap2_set_globals_tap (OMAP343X_CLASS ,OMAP2_L4_IO_ADDRESS (TI81XX_TAP_BASE )); -omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (TI81XX_CTRL_BASE )); -/* XXX: remove these two once TI81xx is DT only */ -omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE )); -omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ),NULL ); +/* XXX: remove these once TI81xx is DT only */ +if (!of_have_populated_dt ()) { +omap2_set_globals_control ( +OMAP2_L4_IO_ADDRESS (TI81XX_CTRL_BASE )); +omap2_set_globals_prm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE )); +omap2_set_globals_cm (OMAP2_L4_IO_ADDRESS (TI81XX_PRCM_BASE ), +NULL ); + } +omap2_control_base_init ();omap3xxx_check_revision ();ti81xx_check_features ();omap3xxx_voltagedomains_init ();
@@ -555,7 +565,7 @@ void __init am33xx_init_early(void) {omap2_set_globals_tap (AM335X_CLASS ,AM33XX_L4_WK_IO_ADDRESS (AM33XX_TAP_BASE )); -omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE )); +omap2_control_base_init ();omap3xxx_check_revision ();am33xx_check_features ();am33xx_prm_init ();
@@ -578,7 +588,7 @@ void __init am43xx_init_early(void) {omap2_set_globals_tap (AM335X_CLASS ,AM33XX_L4_WK_IO_ADDRESS (AM33XX_TAP_BASE )); -omap2_set_globals_control (AM33XX_L4_WK_IO_ADDRESS (AM33XX_CTRL_BASE )); +omap2_control_base_init ();omap3xxx_check_revision ();am33xx_check_features ();omap44xx_prm_init ();
Signature · 1 line
1.7.9.5
PATCH 19/23 ARM: OMAP2+: PRM: move SoC specific init calls within a generic API
In reply to Tero KristoThis gets rid of need for some exported driver APIs, and simplifies the initialization of the PRM driver. Done in preparation to make PRM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/io.c | 17 +++++++------- arch/arm/mach-omap2/prcm-common.h | 4 ++++ arch/arm/mach-omap2/prm.h | 1 + arch/arm/mach-omap2/prm2xxx.c | 3 +-- arch/arm/mach-omap2/prm2xxx.h | 2 +- arch/arm/mach-omap2/prm33xx.c | 3 +-- arch/arm/mach-omap2/prm33xx.h | 2 +- arch/arm/mach-omap2/prm3xxx.c | 4 +--- arch/arm/mach-omap2/prm3xxx.h | 2 +- arch/arm/mach-omap2/prm44xx.c | 3 +-- arch/arm/mach-omap2/prm44xx.h | 1 - arch/arm/mach-omap2/prm44xx_54xx.h | 4 +++- arch/arm/mach-omap2/prm54xx.h | 1 - arch/arm/mach-omap2/prm7xx.h | 2 +- arch/arm/mach-omap2/prm_common.c | 43 +++++++++++++++++++++++++++--------- 15 files changed, 58 insertions(+), 34 deletions(-)
arch/arm/mach-omap2/io.c +9 -8
@@ -386,7 +386,7 @@ void __init omap2420_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));omap2_control_base_init ();omap2xxx_check_revision (); -omap2xxx_prm_init (); +omap2_prcm_base_init ();omap2xxx_cm_init ();omap2xxx_voltagedomains_init ();omap242x_powerdomains_init ();
@@ -413,7 +413,7 @@ void __init omap2430_init_early(void) OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));omap2_control_base_init ();omap2xxx_check_revision (); -omap2xxx_prm_init (); +omap2_prcm_base_init ();omap2xxx_cm_init ();omap2xxx_voltagedomains_init ();omap243x_powerdomains_init ();
@@ -453,7 +453,8 @@ void __init omap3_init_early(void)omap2_control_base_init ();omap3xxx_check_revision ();omap3xxx_check_features (); -omap3xxx_prm_init (); +omap2_prcm_base_init (); +omap3xxx_prm_init (NULL );omap3xxx_cm_init ();omap3xxx_voltagedomains_init ();omap3xxx_powerdomains_init ();
@@ -568,7 +569,7 @@ void __init am33xx_init_early(void)omap2_control_base_init ();omap3xxx_check_revision ();am33xx_check_features (); -am33xx_prm_init (); +omap2_prcm_base_init ();am33xx_cm_init ();am33xx_powerdomains_init ();am33xx_clockdomains_init ();
@@ -591,7 +592,7 @@ void __init am43xx_init_early(void)omap2_control_base_init ();omap3xxx_check_revision ();am33xx_check_features (); -omap44xx_prm_init (); +omap2_prcm_base_init ();omap4_cm_init ();am43xx_powerdomains_init ();am43xx_clockdomains_init ();
@@ -616,7 +617,7 @@ void __init omap4430_init_early(void)omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP4430_PRCM_MPU_BASE ));omap4xxx_check_revision ();omap4xxx_check_features (); -omap44xx_prm_init (); +omap2_prcm_base_init ();omap4_cm_init ();omap4_pm_init_early ();omap44xx_voltagedomains_init ();
@@ -644,7 +645,7 @@ void __init omap5_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap44xx_prm_init (); +omap2_prcm_base_init ();omap5xxx_check_revision ();omap4_cm_init ();omap54xx_voltagedomains_init ();
@@ -670,7 +671,7 @@ void __init dra7xx_init_early(void)omap2_set_globals_control (OMAP2_L4_IO_ADDRESS (OMAP54XX_SCM_BASE ));omap2_set_globals_prcm_mpu (OMAP2_L4_IO_ADDRESS (OMAP54XX_PRCM_MPU_BASE ));omap4_pm_init_early (); -omap44xx_prm_init (); +omap2_prcm_base_init ();dra7xxx_check_revision ();omap4_cm_init ();dra7xx_powerdomains_init ();
arch/arm/mach-omap2/prcm-common.h +4 -0
@@ -524,11 +524,15 @@ struct of_device_id;* @index: clock memory mapping index to be used * @mem: IO mem pointer for this module * @offset: module base address offset from the IO base +* @init: low level PRCM init function for this module +* @np: device node for this PRCM module */ struct omap_prcm_init_data {int index;void __iomem *mem;s16 offset; +int (*init)(const struct omap_prcm_init_data *data); +struct device_node *np; };extern void omap_prcm_irq_cleanup (void );
arch/arm/mach-omap2/prm.h +1 -0
@@ -21,6 +21,7 @@ extern u16 prm_features;extern void omap2_set_globals_prm (void __iomem *prm);int omap_prcm_init (void );int omap2_prm_base_init (void ); +int omap2_prcm_base_init (void );# endif /*
arch/arm/mach-omap2/prm2xxx.c +1 -2
@@ -220,9 +220,8 @@ static struct prm_ll_data omap2xxx_prm_ll_data = { .clear_mod_irqs = &omap2xxx_prm_clear_mod_irqs, }; -int __init omap2xxx_prm_init (void ) +int __init omap2xxx_prm_init (const struct omap_prcm_init_data *data) { -omap2_prm_base_init ();return prm_register (&omap2xxx_prm_ll_data); }
arch/arm/mach-omap2/prm2xxx.h +1 -1
@@ -124,7 +124,7 @@extern int omap2xxx_clkdm_sleep (struct clockdomain *clkdm);extern int omap2xxx_clkdm_wakeup (struct clockdomain *clkdm); -extern int __init omap2xxx_prm_init (void ); +int __init omap2xxx_prm_init (const struct omap_prcm_init_data *data);#endif
arch/arm/mach-omap2/prm33xx.c +1 -2
@@ -378,9 +378,8 @@ static struct prm_ll_data am33xx_prm_ll_data = { .reset_system = am33xx_prm_global_warm_sw_reset, }; -int __init am33xx_prm_init (void ) +int __init am33xx_prm_init (const struct omap_prcm_init_data *data) { -omap2_prm_base_init ();return prm_register (&am33xx_prm_ll_data); }
arch/arm/mach-omap2/prm33xx.h +1 -1
@@ -118,7 +118,7 @@#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)#ifndef __ASSEMBLER__ -int am33xx_prm_init (void ); +int am33xx_prm_init (const struct omap_prcm_init_data *data);#endif /* ASSEMBLER */ #endif
arch/arm/mach-omap2/prm3xxx.c +1 -3
@@ -669,10 +669,8 @@ static struct prm_ll_data omap3xxx_prm_ll_data = { .vp_clear_txdone = &omap3_prm_vp_clear_txdone, }; -int __init omap3xxx_prm_init (void ) +int __init omap3xxx_prm_init (const struct omap_prcm_init_data *data) { -omap2_prm_base_init (); -if (omap3_has_io_wakeup ()) prm_features |=PRM_HAS_IO_WAKEUP ;
arch/arm/mach-omap2/prm3xxx.h +1 -1
@@ -140,7 +140,7 @@ extern u32 omap3_prm_vcvp_read(u8 offset);extern void omap3_prm_vcvp_write (u32 val,u8 offset);extern u32 omap3_prm_vcvp_rmw (u32 mask,u32 bits,u8 offset); -extern int __init omap3xxx_prm_init (void ); +int __init omap3xxx_prm_init (const struct omap_prcm_init_data *data);void omap3xxx_prm_iva_idle (void );void omap3_prm_reset_modem (void );int omap3xxx_prm_clear_global_cold_reset (void );
arch/arm/mach-omap2/prm44xx.c +1 -2
@@ -702,9 +702,8 @@ static struct prm_ll_data omap44xx_prm_ll_data = { .vp_clear_txdone = omap4_prm_vp_clear_txdone, }; -int __init omap44xx_prm_init (void ) +int __init omap44xx_prm_init (const struct omap_prcm_init_data *data) { -omap2_prm_base_init ();omap_prm_base_init ();if (cpu_is_omap44xx () ||soc_is_omap54xx () ||soc_is_dra7xx ())
arch/arm/mach-omap2/prm44xx.h +0 -1
@@ -26,7 +26,6 @@#define __ARCH_ARM_MACH_OMAP2_PRM44XX_H#include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP4430_PRM_BASE 0x4a306000
arch/arm/mach-omap2/prm44xx_54xx.h +3 -1
@@ -23,6 +23,8 @@#ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H#define __ARCH_ARM_MACH_OMAP2_PRM44XX_54XX_H +#include "prcm-common.h" +/* Function prototypes */ #ifndef __ASSEMBLER__
@@ -34,7 +36,7 @@ extern u32 omap4_prm_vcvp_read(u8 offset);extern void omap4_prm_vcvp_write (u32 val,u8 offset);extern u32 omap4_prm_vcvp_rmw (u32 mask,u32 bits,u8 offset); -extern int __init omap44xx_prm_init (void ); +int __init omap44xx_prm_init (const struct omap_prcm_init_data *data);#endif
arch/arm/mach-omap2/prm54xx.h +0 -1
@@ -22,7 +22,6 @@#define __ARCH_ARM_MACH_OMAP2_PRM54XX_H#include "prm44xx_54xx.h" -#include "prcm-common.h" #include "prm.h" #define OMAP54XX_PRM_BASE 0x4ae06000
arch/arm/mach-omap2/prm7xx.h +1 -1
@@ -22,8 +22,8 @@#ifndef __ARCH_ARM_MACH_OMAP2_PRM7XX_H#define __ARCH_ARM_MACH_OMAP2_PRM7XX_H -#include "prm44xx_54xx.h" #include "prcm-common.h" +#include "prm44xx_54xx.h" #include "prm.h" #define DRA7XX_PRM_BASE 0x4ae06000
arch/arm/mach-omap2/prm_common.c +33 -10
82 lines not on this page · raw message
Signature · 1 line
1.7.9.5
PATCH 20/23 ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility
In reply to Tero KristoPRM device instance offset is now provided through the prm_init_data. This gets rid of some cpu_is_X / soc_is_X calls from PRM core code, preparing for PRM to be its own separate driver.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/prcm-common.h | 2 ++ arch/arm/mach-omap2/prm44xx.c | 2 ++ arch/arm/mach-omap2/prm_common.c | 28 +++++++++++++++++++++++++--- arch/arm/mach-omap2/prminst44xx.c | 18 +++++------------- arch/arm/mach-omap2/prminst44xx.h | 1 + 5 files changed, 35 insertions(+), 16 deletions(-)
arch/arm/mach-omap2/prcm-common.h +2 -0
@@ -524,6 +524,7 @@ struct of_device_id;* @index: clock memory mapping index to be used * @mem: IO mem pointer for this module * @offset: module base address offset from the IO base +* @device_inst_offset: device instance offset within the module address space * @init: low level PRCM init function for this module * @np: device node for this PRCM module */
@@ -531,6 +532,7 @@ struct omap_prcm_init_data {int index;void __iomem *mem;s16 offset; +s32 device_inst_offset;int (*init)(const struct omap_prcm_init_data *data);struct device_node *np; };
arch/arm/mach-omap2/prm44xx.c +2 -0
@@ -712,6 +712,8 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data)if (!soc_is_dra7xx ()) prm_features |=PRM_HAS_VOLTAGE ; +omap4_prminst_set_prm_dev_inst (data->device_inst_offset); +return prm_register (&omap44xx_prm_ll_data); }
arch/arm/mach-omap2/prm_common.c +25 -3
@@ -34,6 +34,9 @@#include "prm3xxx.h" #include "prm33xx.h" #include "prm44xx.h" +#include "prm54xx.h" +#include "prm7xx.h" +#include "prcm43xx.h" #include "common.h" #include "clock.h" #include "cm.h"
@@ -647,6 +650,25 @@ static struct omap_prcm_init_data am3_prm_data __initdata = {static struct omap_prcm_init_data omap4_prm_data__initdata = { .index =CLK_MEMMAP_INDEX_PRM , .init = omap44xx_prm_init, + .device_inst_offset =OMAP4430_PRM_DEVICE_INST , +}; + +static struct omap_prcm_init_data omap5_prm_data__initdata = { + .index =CLK_MEMMAP_INDEX_PRM , + .init = omap44xx_prm_init, + .device_inst_offset =OMAP54XX_PRM_DEVICE_INST , +}; + +static struct omap_prcm_init_data dra7_prm_data__initdata = { + .index =CLK_MEMMAP_INDEX_PRM , + .init = omap44xx_prm_init, + .device_inst_offset =DRA7XX_PRM_DEVICE_INST , +}; + +static struct omap_prcm_init_data am4_prm_data__initdata = { + .index =CLK_MEMMAP_INDEX_PRM , + .init = omap44xx_prm_init, + .device_inst_offset =AM43XX_PRM_DEVICE_INST , };static struct omap_prcm_init_data scrm_data__initdata = {
@@ -655,14 +677,14 @@ static struct omap_prcm_init_data scrm_data __initdata = {static struct of_device_id omap_prcm_dt_match_table[]__initdata = { { .compatible ="ti,am3-prcm" , .data = &am3_prm_data }, - { .compatible ="ti,am4-prcm" , .data = &omap4_prm_data }, + { .compatible ="ti,am4-prcm" , .data = &am4_prm_data }, { .compatible ="ti,omap2-prcm" , .data = &omap2_prm_data }, { .compatible ="ti,omap3-prm" , .data = &omap3_prm_data }, { .compatible ="ti,omap4-prm" , .data = &omap4_prm_data }, { .compatible ="ti,omap4-scrm" , .data = &scrm_data }, - { .compatible ="ti,omap5-prm" , .data = &omap4_prm_data }, + { .compatible ="ti,omap5-prm" , .data = &omap5_prm_data }, { .compatible ="ti,omap5-scrm" , .data = &scrm_data }, - { .compatible ="ti,dra7-prm" , .data = &omap4_prm_data }, + { .compatible ="ti,dra7-prm" , .data = &dra7_prm_data }, { } };
arch/arm/mach-omap2/prminst44xx.c +5 -13
@@ -47,22 +47,14 @@ void omap_prm_base_init(void)s32 omap4_prmst_get_prm_dev_inst (void ) { -if (prm_dev_inst !=PRM_INSTANCE_UNKNOWN ) -return prm_dev_inst; - -/* This cannot be done way early at boot.. as things are not setup */ -if (cpu_is_omap44xx ()) - prm_dev_inst =OMAP4430_PRM_DEVICE_INST ; -else if (soc_is_omap54xx ()) - prm_dev_inst =OMAP54XX_PRM_DEVICE_INST ; -else if (soc_is_dra7xx ()) - prm_dev_inst =DRA7XX_PRM_DEVICE_INST ; -else if (soc_is_am43xx ()) - prm_dev_inst =AM43XX_PRM_DEVICE_INST ; -return prm_dev_inst; } +void omap4_prminst_set_prm_dev_inst (s32 dev_inst) +{ + prm_dev_inst = dev_inst; +} +/* Read a register in a PRM instance */ u32 omap4_prminst_read_inst_reg (u8 part,s16 inst,u16 idx) {
arch/arm/mach-omap2/prminst44xx.h +1 -0
@@ -14,6 +14,7 @@#define PRM_INSTANCE_UNKNOWN -1extern s32 omap4_prmst_get_prm_dev_inst (void ); +void omap4_prminst_set_prm_dev_inst (s32 dev_inst);/* * In an ideal world, we would not export these low-level functions,
Signature · 1 line
1.7.9.5
PATCH 21/23 ARM: OMAP2+: CM: move SoC specific init calls within a generic API
In reply to Tero KristoThis gets rid of need for some exported driver APIs, and simplifies the initialization of the CM driver. Done in preparation to make CM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/cm.h | 3 +++ arch/arm/mach-omap2/cm2xxx.c | 3 +-- arch/arm/mach-omap2/cm2xxx.h | 2 +- arch/arm/mach-omap2/cm33xx.c | 3 +-- arch/arm/mach-omap2/cm33xx.h | 3 ++- arch/arm/mach-omap2/cm3xxx.c | 3 +-- arch/arm/mach-omap2/cm3xxx.h | 2 +- arch/arm/mach-omap2/cm44xx.h | 2 +- arch/arm/mach-omap2/cm_common.c | 36 ++++++++++++++++++++++++++++++++---- arch/arm/mach-omap2/cminst44xx.c | 3 +-- arch/arm/mach-omap2/io.c | 14 +++++--------- arch/arm/mach-omap2/prcm-common.h | 2 ++ arch/arm/mach-omap2/prm_common.c | 8 +++++++- 13 files changed, 58 insertions(+), 26 deletions(-)
arch/arm/mach-omap2/cm.h +3 -0
@@ -28,6 +28,9 @@ extern void __iomem *cm2_base;extern void omap2_set_globals_cm (void __iomem *cm,void __iomem *cm2);# endif +#define CM_NO_CLOCKS 0x1 +#define CM_SINGLE_INSTANCE 0x2 +/* * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for * the PRCM to request that a module enter the inactive state in the
arch/arm/mach-omap2/cm2xxx.c +1 -2
@@ -393,9 +393,8 @@ static struct cm_ll_data omap2xxx_cm_ll_data = { .wait_module_ready = &omap2xxx_cm_wait_module_ready, }; -int __init omap2xxx_cm_init (void ) +int __init omap2xxx_cm_init (const struct omap_prcm_init_data *data) { -omap2_cm_base_init ();return cm_register (&omap2xxx_cm_ll_data); }
arch/arm/mach-omap2/cm2xxx.h +1 -1
@@ -63,7 +63,7 @@ extern u32 omap2xxx_cm_get_core_pll_config(void);extern void omap2xxx_cm_set_mod_dividers (u32 mpu,u32 dsp,u32 gfx,u32 core,u32 mdm); -extern int __init omap2xxx_cm_init (void ); +int __init omap2xxx_cm_init (const struct omap_prcm_init_data *data);#endif
arch/arm/mach-omap2/cm33xx.c +1 -2
@@ -373,9 +373,8 @@ static struct cm_ll_data am33xx_cm_ll_data = { .module_disable = &am33xx_cm_module_disable, }; -int __init am33xx_cm_init (void ) +int __init am33xx_cm_init (const struct omap_prcm_init_data *data) { -omap2_cm_base_init ();return cm_register (&am33xx_cm_ll_data); }
arch/arm/mach-omap2/cm33xx.h +2 -1
@@ -19,6 +19,7 @@#include "cm.h" #include "cm-regbits-33xx.h" +#include "prcm-common.h" /* CM base address */ #define AM33XX_CM_BASE 0x44e00000
@@ -374,6 +375,6 @@#ifndef __ASSEMBLER__ -int am33xx_cm_init (void ); +int am33xx_cm_init (const struct omap_prcm_init_data *data);#endif /* ASSEMBLER */ #endif
arch/arm/mach-omap2/cm3xxx.c +1 -2
@@ -671,9 +671,8 @@ static struct cm_ll_data omap3xxx_cm_ll_data = { .wait_module_ready = &omap3xxx_cm_wait_module_ready, }; -int __init omap3xxx_cm_init (void ) +int __init omap3xxx_cm_init (const struct omap_prcm_init_data *data) { -omap2_cm_base_init ();return cm_register (&omap3xxx_cm_ll_data); }
arch/arm/mach-omap2/cm3xxx.h +1 -1
@@ -72,7 +72,7 @@ extern void omap3_cm_save_context(void);extern void omap3_cm_restore_context (void );extern void omap3_cm_save_scratchpad_contents (u32 *ptr); -extern int __init omap3xxx_cm_init (void ); +int __init omap3xxx_cm_init (const struct omap_prcm_init_data *data);#endif
arch/arm/mach-omap2/cm44xx.h +1 -1
@@ -23,6 +23,6 @@#define OMAP4_CM_CLKSTCTRL 0x0000#define OMAP4_CM_STATICDEP 0x0004 -int omap4_cm_init (void ); +int omap4_cm_init (const struct omap_prcm_init_data *data);#endif
arch/arm/mach-omap2/cm_common.c +32 -4
@@ -20,6 +20,7 @@#include "cm2xxx.h" #include "cm3xxx.h" +#include "cm33xx.h" #include "cm44xx.h" #include "clock.h"
@@ -216,16 +217,20 @@ int cm_unregister(struct cm_ll_data *cld)return 0 ; } -static struct omap_prcm_init_data cm_data = { +static struct omap_prcm_init_data cm_data__initdata = { .index =CLK_MEMMAP_INDEX_CM1 , + .init = omap4_cm_init, }; -static struct omap_prcm_init_data cm2_data = { +static struct omap_prcm_init_data cm2_data__initdata = { .index =CLK_MEMMAP_INDEX_CM2 , + .init = omap4_cm_init, }; -static struct omap_prcm_init_data omap3_cm_data = { +static struct omap_prcm_init_data omap3_cm_data__initdata = { .index =CLK_MEMMAP_INDEX_CM1 , + .init = omap3xxx_cm_init, + .flags =CM_SINGLE_INSTANCE ,/* * IVA2 offset is negative value, must offset the cm_base address
@@ -234,7 +239,19 @@ static struct omap_prcm_init_data omap3_cm_data = { .offset = -OMAP3430_IVA2_MOD, }; -static struct of_device_id omap_cm_dt_match_table[] = { +static struct omap_prcm_init_data am3_prcm_data__initdata = { + .index =CLK_MEMMAP_INDEX_CM1 , + .flags =CM_NO_CLOCKS |CM_SINGLE_INSTANCE , + .init = am33xx_cm_init, +}; + +static struct omap_prcm_init_data am4_prcm_data__initdata = { + .index =CLK_MEMMAP_INDEX_CM2 , + .flags =CM_NO_CLOCKS |CM_SINGLE_INSTANCE , + .init = omap4_cm_init, +}; + +static struct of_device_id omap_cm_dt_match_table[]__initdata = { { .compatible ="ti,omap3-cm" , .data = &omap3_cm_data }, { .compatible ="ti,omap4-cm1" , .data = &cm_data }, { .compatible ="ti,omap4-cm2" , .data = &cm2_data },
@@ -242,6 +259,8 @@ static struct of_device_id omap_cm_dt_match_table[] = { { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, + { .compatible = "ti,am3-prcm", .data = &am3_prcm_data }, + { .compatible = "ti,am4-prcm", .data = &am4_prcm_data }, { } };
@@ -273,6 +292,12 @@ int __init omap2_cm_base_init(void) cm2_base = mem + data->offset; data->mem = mem; + + data->np = np; + +if (data->init && (data->flags &CM_SINGLE_INSTANCE || + (cm_base && cm2_base))) + data->init (data); }return 0 ;
@@ -294,6 +319,9 @@ int __init omap_cm_init(void)for_each_matching_node_and_match (np, omap_cm_dt_match_table, &match) { data = match->data; +if (data->flags &CM_NO_CLOCKS ) +continue ; + ret =omap2_clk_provider_init (np, data->index, data->mem);if (ret)return ret;
arch/arm/mach-omap2/cminst44xx.c +1 -2
@@ -514,9 +514,8 @@ static struct cm_ll_data omap4xxx_cm_ll_data = { .module_disable = &omap4_cminst_module_disable, }; -int __init omap4_cm_init (void ) +int __init omap4_cm_init (const struct omap_prcm_init_data *data) { -omap2_cm_base_init ();omap_cm_base_init ();return cm_register (&omap4xxx_cm_ll_data);
arch/arm/mach-omap2/io.c +5 -9
@@ -387,7 +387,6 @@ void __init omap2420_init_early(void)omap2_control_base_init ();omap2xxx_check_revision ();omap2_prcm_base_init (); -omap2xxx_cm_init ();omap2xxx_voltagedomains_init ();omap242x_powerdomains_init ();omap242x_clockdomains_init ();
@@ -414,7 +413,6 @@ void __init omap2430_init_early(void)omap2_control_base_init ();omap2xxx_check_revision ();omap2_prcm_base_init (); -omap2xxx_cm_init ();omap2xxx_voltagedomains_init ();omap243x_powerdomains_init ();omap243x_clockdomains_init ();
@@ -454,8 +452,11 @@ void __init omap3_init_early(void)omap3xxx_check_revision ();omap3xxx_check_features ();omap2_prcm_base_init (); -omap3xxx_prm_init (NULL ); -omap3xxx_cm_init (); +/* XXX: remove these once OMAP3 is DT only */ +if (!of_have_populated_dt ()) { +omap3xxx_prm_init (NULL ); +omap3xxx_cm_init (NULL ); + }omap3xxx_voltagedomains_init ();omap3xxx_powerdomains_init ();omap3xxx_clockdomains_init ();
@@ -570,7 +571,6 @@ void __init am33xx_init_early(void)omap3xxx_check_revision ();am33xx_check_features ();omap2_prcm_base_init (); -am33xx_cm_init ();am33xx_powerdomains_init ();am33xx_clockdomains_init ();am33xx_hwmod_init ();
@@ -593,7 +593,6 @@ void __init am43xx_init_early(void)omap3xxx_check_revision ();am33xx_check_features ();omap2_prcm_base_init (); -omap4_cm_init ();am43xx_powerdomains_init ();am43xx_clockdomains_init ();am43xx_hwmod_init ();
@@ -618,7 +617,6 @@ void __init omap4430_init_early(void)omap4xxx_check_revision ();omap4xxx_check_features ();omap2_prcm_base_init (); -omap4_cm_init ();omap4_pm_init_early ();omap44xx_voltagedomains_init ();omap44xx_powerdomains_init ();
@@ -647,7 +645,6 @@ void __init omap5_init_early(void)omap4_pm_init_early ();omap2_prcm_base_init ();omap5xxx_check_revision (); -omap4_cm_init ();omap54xx_voltagedomains_init ();omap54xx_powerdomains_init ();omap54xx_clockdomains_init ();
@@ -673,7 +670,6 @@ void __init dra7xx_init_early(void)omap4_pm_init_early ();omap2_prcm_base_init ();dra7xxx_check_revision (); -omap4_cm_init ();dra7xx_powerdomains_init ();dra7xx_clockdomains_init ();dra7xx_hwmod_init ();
arch/arm/mach-omap2/prcm-common.h +2 -0
@@ -524,6 +524,7 @@ struct of_device_id;* @index: clock memory mapping index to be used * @mem: IO mem pointer for this module * @offset: module base address offset from the IO base +* @flags: PRCM module init flags * @device_inst_offset: device instance offset within the module address space * @init: low level PRCM init function for this module * @np: device node for this PRCM module
@@ -532,6 +533,7 @@ struct omap_prcm_init_data {int index;void __iomem *mem;s16 offset; +u16 flags;s32 device_inst_offset;int (*init)(const struct omap_prcm_init_data *data);struct device_node *np;
arch/arm/mach-omap2/prm_common.c +7 -1
@@ -725,7 +725,13 @@ int __init omap2_prm_base_init(void)int __init omap2_prcm_base_init (void ) { -return omap2_prm_base_init (); +int ret; + + ret =omap2_prm_base_init (); +if (ret) +return ret; + +return omap2_cm_base_init (); }/**
Signature · 1 line
1.7.9.5
PATCH 22/23 ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags
In reply to Tero KristoCurrently some cpu_is_X checks are used to setup prm_features, however the same can be accomplished by just passing these flags from the PRM init data. This is done in preparation to make PRM a separate driver.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/prm44xx.c | 4 ++-- arch/arm/mach-omap2/prm_common.c | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/prm44xx.c +2 -2
@@ -706,10 +706,10 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) {omap_prm_base_init (); -if (cpu_is_omap44xx () ||soc_is_omap54xx () ||soc_is_dra7xx ()) +if (data->flags &PRM_HAS_IO_WAKEUP ) prm_features |=PRM_HAS_IO_WAKEUP ; -if (!soc_is_dra7xx ()) +if (data->flags &PRM_HAS_VOLTAGE ) prm_features |=PRM_HAS_VOLTAGE ;omap4_prminst_set_prm_dev_inst (data->device_inst_offset);
arch/arm/mach-omap2/prm_common.c +3 -0
@@ -651,18 +651,21 @@ static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = CLK_MEMMAP_INDEX_PRM, .init = omap44xx_prm_init, .device_inst_offset = OMAP4430_PRM_DEVICE_INST, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, };static struct omap_prcm_init_data omap5_prm_data__initdata = { .index =CLK_MEMMAP_INDEX_PRM , .init = omap44xx_prm_init, .device_inst_offset =OMAP54XX_PRM_DEVICE_INST , + .flags =PRM_HAS_IO_WAKEUP |PRM_HAS_VOLTAGE , };static struct omap_prcm_init_data dra7_prm_data__initdata = { .index =CLK_MEMMAP_INDEX_PRM , .init = omap44xx_prm_init, .device_inst_offset =DRA7XX_PRM_DEVICE_INST , + .flags =PRM_HAS_IO_WAKEUP , };static struct omap_prcm_init_data am4_prm_data__initdata = {
Signature · 1 line
1.7.9.5
PATCH 23/23 ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init
In reply to Tero KristoThe compatible DT node is now passed with the prm init, so there is no need to do node matching here again. Added a new flag to the init data also, to detect default IRQ support for OMAP4. Also, any booting omap4 DT setup always has a PRM node, so there is no need to check against the special case where it would be missing.
Signed-off-by Tero Kristo <[email protected]>
--- arch/arm/mach-omap2/prm.h | 2 ++ arch/arm/mach-omap2/prm44xx.c | 50 +++++++++++++++----------------------- arch/arm/mach-omap2/prm_common.c | 2 +- 3 files changed, 22 insertions(+), 32 deletions(-)
arch/arm/mach-omap2/prm.h +2 -0
@@ -29,9 +29,11 @@ int omap2_prcm_base_init(void);* * PRM_HAS_IO_WAKEUP: has IO wakeup capability * PRM_HAS_VOLTAGE: has voltage domains +* PRM_IRQ_DEFAULT: use default irq number for PRM irq */ #define PRM_HAS_IO_WAKEUP (1 << 0)#define PRM_HAS_VOLTAGE (1 << 1) +#define PRM_IRQ_DEFAULT (1 << 2)/* * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
arch/arm/mach-omap2/prm44xx.c +19 -31
76 lines not on this page · raw message
arch/arm/mach-omap2/prm_common.c +1 -1
@@ -651,7 +651,7 @@ static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = CLK_MEMMAP_INDEX_PRM, .init = omap44xx_prm_init, .device_inst_offset = OMAP4430_PRM_DEVICE_INST, - .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE, + .flags = PRM_HAS_IO_WAKEUP | PRM_HAS_VOLTAGE | PRM_IRQ_DEFAULT, };static struct omap_prcm_init_data omap5_prm_data__initdata = {
Signature · 1 line
1.7.9.5
Paul Walmsley
maintainercover ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
In reply to Tero KristoQuoted 3 lines · Tero Kristo
Yet another PRCM cleanup set, towards making PRCM a separate driver. This set is most likely too late for 3.19, but hopefully it can make it to 3.20.
Yep too late for 3.19.
...
Quoted 2 lines
Testing done:
...
Quoted 1 line
omap3-beagle: boot, suspend (ret), suspend (off) (UART wakeup seems broken on 3.18-rc1 btw)
v3.18-rc1 UART wakeups worked here on both of the 35xx Beagles:
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/README.txt
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es3beagle/3530es3beagle_log.txt
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es31beagle/3530es31beagle_log.txt
- Paul
cover ARM: OMAP2+: PRCM cleanups towards 3.19 / part2
Quoted 15 lines · Paul Walmsley
Quoted 3 lines · Tero Kristo
Yet another PRCM cleanup set, towards making PRCM a separate driver. This set is most likely too late for 3.19, but hopefully it can make it to 3.20.
Yep too late for 3.19.
...
Quoted 2 lines
Testing done:
...
Quoted 7 lines
Quoted 1 line
omap3-beagle: boot, suspend (ret), suspend (off) (UART wakeup seems broken on 3.18-rc1 btw)
v3.18-rc1 UART wakeups worked here on both of the 35xx Beagles:
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/README.txt
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es3beagle/3530es3beagle_log.txt
http://www.pwsan.com/omap/testlogs/test_v3.18-rc1/20141020095901/pm/3530es31beagle/3530es31beagle_log.txt
After investigating this a bit, it seems you are right. It looks like I just had wakeup disabled on the tty port, the default behaviour has changed at some point for some reason. After enabling wakeup, resume with console works also.
-Tero