ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names
Subsystems (2)
PATCH 1/1 ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names
* Correct base address of SD3 div6 clk.
* Update div6 clock node labels
There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3.
This has no run-time affect as the clock nodes are not currently used.
---
* A similar change to update the div6 clock node names and labels appears to be required for the r8a7791. The base addresses appear to be correct there.
* This patch is a revised version of " ARM: shmobile: r8a7794: Correct SDHI base address, clock labels and output-names"
--- arch/arm/boot/dts/r8a7794.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/r8a7794.dtsi +6 -6
@@ -294,19 +294,19 @@ "lb", "qspi", "sdh", "sd0", "z"; }; /* Variable factor clocks */ - sd1_clk: sd2_clk at e6150078 { + sd2_clk: sd2_clk at e6150078 { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; reg = <0 0xe6150078 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd1"; + clock-output-names = "sd2"; }; - sd2_clk: sd3_clk at e615007c { + sd3_clk: sd3_clk at e615026c { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; - reg = <0 0xe615007c 0 4>; + reg = <0 0xe615026c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; - clock-output-names = "sd2"; + clock-output-names = "sd3"; }; mmc0_clk: mmc0_clk at e6150240 { compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
@@ -518,7 +518,7 @@ mstp3_clks: mstp3_clks at e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, + clocks = <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7794_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = <
Signature · 1 line
2.1.4
PATCH 1/1 ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names
Quoted 6 lines · Simon Horman
* Correct base address of SD3 div6 clk.
* Update div6 clock node labels
There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3.
Quoted 6 lines
This has no run-time affect as the clock nodes are not currently used.
Fixes 8e181633e6ca96049 ("ARM: shmobile: r8a7794: Add SDHI clocks to device tree")Reported-by Sergei Shtylyov <[email protected]>Reported-by Geert Uytterhoeven <[email protected]>Signed-off-by Simon Horman <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH 1/1 ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-names
Quoted 8 lines · Geert Uytterhoeven
Quoted 6 lines · Simon Horman
* Correct base address of SD3 div6 clk.
* Update div6 clock node labels
There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3.
Quoted 8 lines
Quoted 6 lines
This has no run-time affect as the clock nodes are not currently used.
Fixes 8e181633e6ca96049 ("ARM: shmobile: r8a7794: Add SDHI clocks to device tree")Reported-by Sergei Shtylyov <[email protected]>Reported-by Geert Uytterhoeven <[email protected]>Signed-off-by Simon Horman <[email protected]>
Thanks, I will queue this up.