ARM: OMAP3: legacy clock data move under clk driver

PATCH New Tero Kristo 4 participants 19 messages Dec 16, 2014 – Feb 3, 2015

Subsystems (6)

Arm (32-bit) Arm sub-architectures Common clk OMAP2+ support +2 more subsystems

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Tero Kristo

author

2014-12-16 16:19 UTC #0 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Hi,

These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)

Testing done (on top of 3.18-rc1):

omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot

Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)

Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework

-Tero

Tero Kristo

author

2014-12-16 16:19 UTC #1 lore raw

PATCH 1/11 clk: ti: add core support for initializing legacy clocks

Legacy clock data for OMAP3 is being moved under clock driver, thus base support for this is needed. This patch adds basic definitions for clock init descriptors and core infrastructure for initialization, which will be called from the OMAP3 clock init.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c   |  110 +++++++++++++++++++++++++++++++++
 drivers/clk/ti/clock.h |  160 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 270 insertions(+)
 create mode 100644 drivers/clk/ti/clock.h

drivers/clk/ti/clk.c +110 -0

index 337abe5..a8958f1 100644
@@ -22,6 +22,8 @@
 #include <linux/of_address.h>
 #include <linux/list.h>
 
+#include "clock.h"
+
 #undef pr_fmt
 #define pr_fmt(fmt) "%s: " fmt, __func__

@@ -183,3 +185,111 @@ void ti_dt_clk_init_retry_clks(void)
 		retries--;
 	}
 }
+
+void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
+{
+	while (*patch) {
+		memcpy((*patch)->patch, *patch, sizeof(**patch));
+		patch++;
+	}
+}
+
+struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
+{
+	struct clk *clk;
+	struct ti_clk_fixed *fixed;
+	struct ti_clk_fixed_factor *fixed_factor;
+	struct clk_hw *clk_hw;
+
+	if (setup->clk)
+		return setup->clk;
+
+	switch (setup->type) {
+	case TI_CLK_FIXED:
+		fixed = setup->data;
+
+		clk = clk_register_fixed_rate(NULL, setup->name, NULL,
+					      CLK_IS_ROOT, fixed->frequency);
+		break;
+	case TI_CLK_FIXED_FACTOR:
+		fixed_factor = setup->data;
+
+		clk = clk_register_fixed_factor(NULL, setup->name,
+						fixed_factor->parent,
+						0, fixed_factor->mult,
+						fixed_factor->div);
+		break;
+	default:
+		pr_err("bad type for %s!\n", setup->name);
+		clk = ERR_PTR(-EINVAL);
+	}
+
+	if (!IS_ERR(clk)) {
+		setup->clk = clk;
+		if (setup->clkdm_name) {
+			if (__clk_get_flags(clk) & CLK_IS_BASIC) {
+				pr_warn("can't setup clkdm for basic clk %s\n",
+					setup->name);
+			} else {
+				clk_hw = __clk_get_hw(clk);
+				to_clk_hw_omap(clk_hw)->clkdm_name =
+					setup->clkdm_name;
+				omap2_init_clk_clkdm(clk_hw);
+			}
+		}
+	}
+
+	return clk;
+}
+
+int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
+{
+	struct clk *clk;
+	bool retry;
+	struct ti_clk_alias *retry_clk;
+	struct ti_clk_alias *tmp;
+
+	while (clks->clk) {
+		clk = ti_clk_register_clk(clks->clk);
+		if (IS_ERR(clk)) {
+			if (PTR_ERR(clk) == -EAGAIN) {
+				list_add(&clks->link, &retry_list);
+			} else {
+				pr_err("register for %s failed: %ld\n",
+				       clks->clk->name, PTR_ERR(clk));
+				return PTR_ERR(clk);
+			}
+		} else {
+			clks->lk.clk = clk;
+			clkdev_add(&clks->lk);
+		}
+		clks++;
+	}
+
+	retry = true;
+
+	while (!list_empty(&retry_list) && retry) {
+		retry = false;
+		list_for_each_entry_safe(retry_clk, tmp, &retry_list, link) {
+			pr_debug("retry-init: %s\n", retry_clk->clk->name);
+			clk = ti_clk_register_clk(retry_clk->clk);
+			if (IS_ERR(clk)) {
+				if (PTR_ERR(clk) == -EAGAIN) {
+					continue;
+				} else {
+					pr_err("register for %s failed: %ld\n",
+					       retry_clk->clk->name,
+					       PTR_ERR(clk));
+					return PTR_ERR(clk);
+				}
+			} else {
+				retry = true;
+				retry_clk->lk.clk = clk;
+				clkdev_add(&retry_clk->lk);
+				list_del(&retry_clk->link);
+			}
+		}
+	}
+
+	return 0;
+}

drivers/clk/ti/clock.h new file +160 -0

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Signature · 1 line

1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #2 lore raw

PATCH 2/11 clk: ti: mux: add support for legacy mux init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c   |    3 +++
 drivers/clk/ti/clock.h |    4 +++
 drivers/clk/ti/mux.c   |   70 ++++++++++++++++++++++++++++++++++++++++++++++--
 3 files changed, 75 insertions(+), 2 deletions(-)

drivers/clk/ti/clk.c +3 -0

index a8958f1..215f681 100644
@@ -211,6 +211,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 		clk = clk_register_fixed_rate(NULL, setup->name, NULL,
 					      CLK_IS_ROOT, fixed->frequency);
 		break;
+	case TI_CLK_MUX:
+		clk = ti_clk_register_mux(setup);
+		break;
 	case TI_CLK_FIXED_FACTOR:
 		fixed_factor = setup->data;

drivers/clk/ti/clock.h +4 -0

index 6ee6c6e..c06bbf4 100644
@@ -153,6 +153,10 @@ struct ti_clk_dpll {
 	u8 recal_st_bit;
 };
 
+struct clk *ti_clk_register_mux(struct ti_clk *setup);
+
+struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
+
 void ti_clk_patch_legacy_clks(struct ti_clk **patch);
 struct clk *ti_clk_register_clk(struct ti_clk *setup);
 int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);

drivers/clk/ti/mux.c +68 -2

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1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #3 lore raw

PATCH 3/11 clk: ti: gate: add support for legacy gate init

In reply to Tero Kristo

Legacy clock data is initialialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c   |    3 +
 drivers/clk/ti/clock.h |    2 +
 drivers/clk/ti/gate.c  |  158 +++++++++++++++++++++++++++++++++++++++---------
 3 files changed, 133 insertions(+), 30 deletions(-)

drivers/clk/ti/clk.c +3 -0

index 215f681..676dbf1 100644
@@ -222,6 +222,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 						0, fixed_factor->mult,
 						fixed_factor->div);
 		break;
+	case TI_CLK_GATE:
+		clk = ti_clk_register_gate(setup);
+		break;
 	default:
 		pr_err("bad type for %s!\n", setup->name);
 		clk = ERR_PTR(-EINVAL);

drivers/clk/ti/clock.h +2 -0

index c06bbf4..d0715bc 100644
@@ -153,8 +153,10 @@ struct ti_clk_dpll {
 	u8 recal_st_bit;
 };
 
+struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
 
+struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);
 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
 
 void ti_clk_patch_legacy_clks(struct ti_clk **patch);

drivers/clk/ti/gate.c +128 ~~-30~~

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1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #4 lore raw

PATCH 4/11 clk: ti: interface: add support for legacy interface clock init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. The interface clock descriptor itself is overloading the gate clock descriptor, thus it needs to be called from the gate setup.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clock.h     |    1 +
 drivers/clk/ti/gate.c      |    3 ++
 drivers/clk/ti/interface.c |   96 +++++++++++++++++++++++++++++++++-----------
 3 files changed, 76 insertions(+), 24 deletions(-)

drivers/clk/ti/clock.h +1 -0

index d0715bc..9430dc6 100644
@@ -154,6 +154,7 @@ struct ti_clk_dpll {
 };
 
 struct clk *ti_clk_register_gate(struct ti_clk *setup);
+struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
 
 struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);

drivers/clk/ti/gate.c +3 -0

index ff3380e..d4f6cb2 100644
@@ -142,6 +142,9 @@ struct clk *ti_clk_register_gate(struct ti_clk *setup)
 
 	gate = setup->data;
 
+	if (gate->flags & CLKF_INTERFACE)
+		return ti_clk_register_interface(setup);
+
 	reg_setup = (struct clk_omap_reg *)&reg;
 
 	if (gate->flags & CLKF_SET_RATE_PARENT)

drivers/clk/ti/interface.c +72 ~~-24~~

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Signature · 1 line

1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #5 lore raw

PATCH 5/11 clk: ti: divider: add support for legacy divider init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c     |    3 ++
 drivers/clk/ti/clock.h   |    2 +
 drivers/clk/ti/divider.c |  132 +++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 136 insertions(+), 1 deletion(-)

drivers/clk/ti/clk.c +3 -0

index 676dbf1..a0475e2 100644
@@ -214,6 +214,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 	case TI_CLK_MUX:
 		clk = ti_clk_register_mux(setup);
 		break;
+	case TI_CLK_DIVIDER:
+		clk = ti_clk_register_divider(setup);
+		break;
 	case TI_CLK_FIXED_FACTOR:
 		fixed_factor = setup->data;

drivers/clk/ti/clock.h +2 -0

index 9430dc6..fe70941 100644
@@ -156,7 +156,9 @@ struct ti_clk_dpll {
 struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
+struct clk *ti_clk_register_divider(struct ti_clk *setup);
 
+struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);
 struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);
 struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);

drivers/clk/ti/divider.c +131 -1

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1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #6 lore raw

PATCH 6/11 clk: ti: dpll: add support for legacy DPLL init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c   |    3 ++
 drivers/clk/ti/clock.h |    1 +
 drivers/clk/ti/dpll.c  |  118 +++++++++++++++++++++++++++++++++++++++++++-----
 3 files changed, 111 insertions(+), 11 deletions(-)

drivers/clk/ti/clk.c +3 -0

index a0475e2..f41a757 100644
@@ -228,6 +228,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 	case TI_CLK_GATE:
 		clk = ti_clk_register_gate(setup);
 		break;
+	case TI_CLK_DPLL:
+		clk = ti_clk_register_dpll(setup);
+		break;
 	default:
 		pr_err("bad type for %s!\n", setup->name);
 		clk = ERR_PTR(-EINVAL);

drivers/clk/ti/clock.h +1 -0

index fe70941..f4e8eb2 100644
@@ -157,6 +157,7 @@ struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
 struct clk *ti_clk_register_divider(struct ti_clk *setup);
+struct clk *ti_clk_register_dpll(struct ti_clk *setup);
 
 struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);
 struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);

drivers/clk/ti/dpll.c +107 ~~-11~~

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1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #7 lore raw

PATCH 7/11 clk: ti: composite: add support for legacy composite clock init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

---
 drivers/clk/ti/clk.c       |    3 +++
 drivers/clk/ti/clock.h     |    1 +
 drivers/clk/ti/composite.c |   46 ++++++++++++++++++++++++++++++++++++++++----
 3 files changed, 46 insertions(+), 4 deletions(-)

drivers/clk/ti/clk.c +3 -0

index f41a757..546dae4 100644
@@ -217,6 +217,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 	case TI_CLK_DIVIDER:
 		clk = ti_clk_register_divider(setup);
 		break;
+	case TI_CLK_COMPOSITE:
+		clk = ti_clk_register_composite(setup);
+		break;
 	case TI_CLK_FIXED_FACTOR:
 		fixed_factor = setup->data;

drivers/clk/ti/clock.h +1 -0

index f4e8eb2..8d9c603 100644
@@ -157,6 +157,7 @@ struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
 struct clk *ti_clk_register_divider(struct ti_clk *setup);
+struct clk *ti_clk_register_composite(struct ti_clk *setup);
 struct clk *ti_clk_register_dpll(struct ti_clk *setup);
 
 struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);

drivers/clk/ti/composite.c +42 -4

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1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #8 lore raw

PATCH 9/11 ARM: OMAP3: PRM: add support for legacy iomapping init

In reply to Tero Kristo

As the legacy clock data is being moved under clock driver, the clock data will be using the same low level infrastructure for register accesses. This requires the clk_memmaps to be initialized properly. This patch adds a support hook to the PRM driver to initialize the mappings.

Signed-off-by Tero Kristo <[email protected]>

---
 arch/arm/mach-omap2/prm.h        |    1 +
 arch/arm/mach-omap2/prm_common.c |   11 +++++++++++
 2 files changed, 12 insertions(+)

arch/arm/mach-omap2/prm.h +1 -0

index 48480d5..a33303c 100644
@@ -20,6 +20,7 @@ extern void __iomem *prm_base;
 extern u16 prm_features;
 extern void omap2_set_globals_prm(void __iomem *prm);
 int of_prcm_init(void);
+void omap3_prcm_legacy_iomaps_init(void);
 # endif
 
 /*

arch/arm/mach-omap2/prm_common.c +11 -0

index ee2b522..18f8bac 100644
@@ -35,6 +35,8 @@
 #include "prm44xx.h"
 #include "common.h"
 #include "clock.h"
+#include "cm.h"
+#include "control.h"
 
 /*
  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs

@@ -528,6 +530,15 @@ int __init of_prcm_init(void)
 	return 0;
 }
 
+void __init omap3_prcm_legacy_iomaps_init(void)
+{
+	ti_clk_ll_ops = &omap_clk_ll_ops;
+
+	clk_memmaps[TI_CLKM_CM] = cm_base + OMAP3430_IVA2_MOD;
+	clk_memmaps[TI_CLKM_PRM] = prm_base + OMAP3430_IVA2_MOD;
+	clk_memmaps[TI_CLKM_SCRM] = omap_ctrl_base_get();
+}
+
 static int __init prm_late_init(void)
 {
 	if (prm_ll_data->late_init)

Signature · 1 line

1.7.9.5

Tero Kristo

author

2014-12-16 16:20 UTC #9 lore raw

PATCH 10/11 ARM: OMAP3: use clock data from TI clock driver for legacy boot

In reply to Tero Kristo

As the clock data is now available for the legacy boot also from the clock driver, use this rather than the data under the mach folder. This allows us to get rid of the old clock data completely.

Signed-off-by Tero Kristo <[email protected]>

---
 arch/arm/mach-omap2/io.c |   28 +++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

arch/arm/mach-omap2/io.c +19 -9

index 03cbb16..7295943 100644
@@ -459,7 +459,17 @@ void __init omap3_init_early(void)
 	omap3xxx_clockdomains_init();
 	omap3xxx_hwmod_init();
 	omap_hwmod_init_postsetup();
-	omap_clk_soc_init = omap3xxx_clk_init;
+	if (!of_have_populated_dt()) {
+		omap3_prcm_legacy_iomaps_init();
+		if (soc_is_am35xx())
+			omap_clk_soc_init = am35xx_clk_legacy_init;
+		else if (cpu_is_omap3630())
+			omap_clk_soc_init = omap36xx_clk_legacy_init;
+		else if (omap_rev() == OMAP3430_REV_ES1_0)
+			omap_clk_soc_init = omap3430es1_clk_legacy_init;
+		else
+			omap_clk_soc_init = omap3430_clk_legacy_init;
+	}
 }
 
 void __init omap3430_init_early(void)

@@ -507,8 +517,6 @@ void __init ti81xx_init_early(void)
 	omap_hwmod_init_postsetup();
 	if (of_have_populated_dt())
 		omap_clk_soc_init = ti81xx_dt_clk_init;
-	else
-		omap_clk_soc_init = omap3xxx_clk_init;
 }
 
 void __init omap3_init_late(void)

@@ -722,15 +730,17 @@ int __init omap_clk_init(void)
 
 	ti_clk_init_features();
 
-	ret = of_prcm_init();
-	if (ret)
-		return ret;
+	if (of_have_populated_dt()) {
+		ret = of_prcm_init();
+		if (ret)
+			return ret;
 
-	of_clk_init(NULL);
+		of_clk_init(NULL);
 
-	ti_dt_clk_init_retry_clks();
+		ti_dt_clk_init_retry_clks();
 
-	ti_dt_clockdomains_setup();
+		ti_dt_clockdomains_setup();
+	}
 
 	ret = omap_clk_soc_init();

Signature · 1 line

1.7.9.5

Tony Lindgren

maintainer

2015-01-07 23:00 UTC #10 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

In reply to Tero Kristo

Quoted 13 lines · Tero Kristo

Hi,
These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)
Testing done (on top of 3.18-rc1):
omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot

Quoted 8 lines

Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)
Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework

Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)

Seems to boot just fine based on a quick legacy booting test on n900.

Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?

Please also feel free to add:

Acked-by Tony Lindgren <[email protected]>

Tero Kristo

author

2015-01-29 20:19 UTC #11 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoted 29 lines · Tony Lindgren

Quoted 13 lines · Tero Kristo
Hi,
These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)
Testing done (on top of 3.18-rc1):
omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot
Quoted 8 lines
Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)
Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.

Quoted 8 lines

Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Acked-by Tony Lindgren <[email protected]>

I just rebased these patches on top of 3.19-rc1, and noticed a problem with dpll5 on beagle-xm (basically a divide-by-zero error + locking issue during boot.) The extra diff at the end of this email fixes the problems, I will also send the updated two patches as v2. Updated branch available in my tree under name 3.19-rc1-omap3-clk-rework.

- Tero

---------------------

(quoted diff) +0 -0

b/drivers/clk/ti/clk-3xxx-legacy.c
index 81ad510..e0732a4 100644

drivers/clk/ti/clk-3xxx-legacy.c +6 -0

@@ -136,6 +136,7 @@ static struct ti_clk_dpll dpll3_ck_data = {
  	.idlest_mask = 0x1,
  	.auto_recal_bit = 0x3,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x5,
  	.max_multiplier = 0x7ff,
  	.enable_mask = 0x7,

@@ -307,6 +308,7 @@ static struct ti_clk_dpll dpll4_ck_data = {
  	.idlest_mask = 0x2,
  	.auto_recal_bit = 0x13,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x6,
  	.max_multiplier = 0x7ff,
  	.enable_mask = 0x70000,

@@ -507,6 +509,7 @@ static struct ti_clk_dpll dpll5_ck_data = {
  	.idlest_mask = 0x1,
  	.auto_recal_bit = 0x3,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x19,
  	.max_multiplier = 0x7ff,
  	.enable_mask = 0x7,

@@ -1271,6 +1274,7 @@ static struct ti_clk_dpll dpll1_ck_data = {
  	.idlest_mask = 0x1,
  	.auto_recal_bit = 0x3,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x7,
  	.max_multiplier = 0x7ff,
  	.enable_mask = 0x7,

@@ -2154,6 +2158,7 @@ static struct ti_clk_dpll dpll2_ck_data = {
  	.idlest_mask = 0x1,
  	.auto_recal_bit = 0x3,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x8,
  	.max_multiplier = 0x7ff,
  	.enable_mask = 0x7,

@@ -2513,6 +2518,7 @@ static struct ti_clk_dpll dpll4_ck_omap36xx_data = {
  	.idlest_mask = 0x2,
  	.auto_recal_bit = 0x13,
  	.max_divider = 0x80,
+	.min_divider = 0x1,
  	.recal_en_bit = 0x6,
  	.max_multiplier = 0xfff,
  	.enable_mask = 0x70000,

drivers/clk/ti/clock.h +1 -0

index 8d9c603..404158d 100644
@@ -148,6 +148,7 @@ struct ti_clk_dpll {
  	u32 sddiv_mask;
  	u16 max_multiplier;
  	u16 max_divider;
+	u8 min_divider;
  	u8 auto_recal_bit;
  	u8 recal_en_bit;
  	u8 recal_st_bit;

drivers/clk/ti/dpll.c +1 -0

index 7d67639..47ebff7 100644
@@ -243,6 +243,7 @@ struct clk *ti_clk_register_dpll(struct ti_clk *setup)
  	dd->sddiv_mask = dpll->sddiv_mask;
  	dd->dco_mask = dpll->dco_mask;
  	dd->max_divider = dpll->max_divider;
+	dd->min_divider = dpll->min_divider;
  	dd->max_multiplier = dpll->max_multiplier;
  	dd->auto_recal_bit = dpll->auto_recal_bit;
  	dd->recal_en_bit = dpll->recal_en_bit;

Mike Turquette

2015-01-30 00:42 UTC #12 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoting Tero Kristo (2015-01-29 12:19:29)

Quoted 36 lines · Tony Lindgren

Quoted 35 lines · Tero Kristo
Quoted 13 lines
Hi,
These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)
Testing done (on top of 3.18-rc1):
omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot
Quoted 8 lines
Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)
Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.
Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:

Quoted 8 lines

Quoted 2 lines
Acked-by Tony Lindgren <[email protected]>
I just rebased these patches on top of 3.19-rc1, and noticed a problem with dpll5 on beagle-xm (basically a divide-by-zero error + locking issue during boot.) The extra diff at the end of this email fixes the problems, I will also send the updated two patches as v2. Updated branch available in my tree under name 3.19-rc1-omap3-clk-rework.

I've applied these 11 patches on top of v3.19-rc1, including the two V2 patches for #6 and #8 to the clk-omap-legacy branch here:

git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-omap-legacy

Let me know if I screwed anything up. I've merged this immutable branch into clk-next.

In addition I've made some changes to remove clk-private.h permanently. I'll post those later today. Again, please let me know if I screwed anything up.

Regards,
Mike

Quoted 83 lines

- Tero

---------------------

drivers/clk/ti/clk-3xxx-legacy.c +6 -0

index 81ad510..e0732a4 100644
@@ -136,6 +136,7 @@ static struct ti_clk_dpll dpll3_ck_data = {
        .idlest_mask = 0x1,
        .auto_recal_bit = 0x3,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x5,
        .max_multiplier = 0x7ff,
        .enable_mask = 0x7,

@@ -307,6 +308,7 @@ static struct ti_clk_dpll dpll4_ck_data = {
        .idlest_mask = 0x2,
        .auto_recal_bit = 0x13,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x6,
        .max_multiplier = 0x7ff,
        .enable_mask = 0x70000,

@@ -507,6 +509,7 @@ static struct ti_clk_dpll dpll5_ck_data = {
        .idlest_mask = 0x1,
        .auto_recal_bit = 0x3,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x19,
        .max_multiplier = 0x7ff,
        .enable_mask = 0x7,

@@ -1271,6 +1274,7 @@ static struct ti_clk_dpll dpll1_ck_data = {
        .idlest_mask = 0x1,
        .auto_recal_bit = 0x3,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x7,
        .max_multiplier = 0x7ff,
        .enable_mask = 0x7,

@@ -2154,6 +2158,7 @@ static struct ti_clk_dpll dpll2_ck_data = {
        .idlest_mask = 0x1,
        .auto_recal_bit = 0x3,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x8,
        .max_multiplier = 0x7ff,
        .enable_mask = 0x7,

@@ -2513,6 +2518,7 @@ static struct ti_clk_dpll dpll4_ck_omap36xx_data = {
        .idlest_mask = 0x2,
        .auto_recal_bit = 0x13,
        .max_divider = 0x80,
+       .min_divider = 0x1,
        .recal_en_bit = 0x6,
        .max_multiplier = 0xfff,
        .enable_mask = 0x70000,

drivers/clk/ti/clock.h +1 -0

index 8d9c603..404158d 100644
@@ -148,6 +148,7 @@ struct ti_clk_dpll {
        u32 sddiv_mask;
        u16 max_multiplier;
        u16 max_divider;
+       u8 min_divider;
        u8 auto_recal_bit;
        u8 recal_en_bit;
        u8 recal_st_bit;

drivers/clk/ti/dpll.c +1 -0

index 7d67639..47ebff7 100644
@@ -243,6 +243,7 @@ struct clk *ti_clk_register_dpll(struct ti_clk *setup)
        dd->sddiv_mask = dpll->sddiv_mask;
        dd->dco_mask = dpll->dco_mask;
        dd->max_divider = dpll->max_divider;
+       dd->min_divider = dpll->min_divider;
        dd->max_multiplier = dpll->max_multiplier;
        dd->auto_recal_bit = dpll->auto_recal_bit;
        dd->recal_en_bit = dpll->recal_en_bit;

Tero Kristo

author

2015-01-30 15:20 UTC #13 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoted 49 lines · Mike Turquette

Quoting Tero Kristo (2015-01-29 12:19:29)
Quoted 36 lines · Tony Lindgren
Quoted 35 lines · Tero Kristo
Quoted 13 lines
Hi,
These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)
Testing done (on top of 3.18-rc1):
omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot
Quoted 8 lines
Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)
Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.
Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Quoted 8 lines
Quoted 2 lines
Acked-by Tony Lindgren <[email protected]>
I just rebased these patches on top of 3.19-rc1, and noticed a problem with dpll5 on beagle-xm (basically a divide-by-zero error + locking issue during boot.) The extra diff at the end of this email fixes the problems, I will also send the updated two patches as v2. Updated branch available in my tree under name 3.19-rc1-omap3-clk-rework.
I've applied these 11 patches on top of v3.19-rc1, including the two V2 patches for #6 and #8 to the clk-omap-legacy branch here:

Quoted 8 lines

git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-omap-legacy
Let me know if I screwed anything up. I've merged this immutable branch into clk-next.
In addition I've made some changes to remove clk-private.h permanently. I'll post those later today. Again, please let me know if I screwed anything up.

I can't see the clk-omap-legacy merged to clk-next so far, maybe you did not push it yet? The branch itself is identical copy of mine, so can't see any issues there so far.

-Tero

Quoted 87 lines

Regards,
Mike

Quoted 83 lines

- Tero

---------------------

drivers/clk/ti/clk-3xxx-legacy.c +6 -0

index 81ad510..e0732a4 100644
@@ -136,6 +136,7 @@ static struct ti_clk_dpll dpll3_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x5,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -307,6 +308,7 @@ static struct ti_clk_dpll dpll4_ck_data = {
         .idlest_mask = 0x2,
         .auto_recal_bit = 0x13,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x6,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x70000,

@@ -507,6 +509,7 @@ static struct ti_clk_dpll dpll5_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x19,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -1271,6 +1274,7 @@ static struct ti_clk_dpll dpll1_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x7,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -2154,6 +2158,7 @@ static struct ti_clk_dpll dpll2_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x8,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -2513,6 +2518,7 @@ static struct ti_clk_dpll dpll4_ck_omap36xx_data = {
         .idlest_mask = 0x2,
         .auto_recal_bit = 0x13,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x6,
         .max_multiplier = 0xfff,
         .enable_mask = 0x70000,

drivers/clk/ti/clock.h +1 -0

index 8d9c603..404158d 100644
@@ -148,6 +148,7 @@ struct ti_clk_dpll {
         u32 sddiv_mask;
         u16 max_multiplier;
         u16 max_divider;
+       u8 min_divider;
         u8 auto_recal_bit;
         u8 recal_en_bit;
         u8 recal_st_bit;

drivers/clk/ti/dpll.c +1 -0

index 7d67639..47ebff7 100644
@@ -243,6 +243,7 @@ struct clk *ti_clk_register_dpll(struct ti_clk *setup)
         dd->sddiv_mask = dpll->sddiv_mask;
         dd->dco_mask = dpll->dco_mask;
         dd->max_divider = dpll->max_divider;
+       dd->min_divider = dpll->min_divider;
         dd->max_multiplier = dpll->max_multiplier;
         dd->auto_recal_bit = dpll->auto_recal_bit;
         dd->recal_en_bit = dpll->recal_en_bit;

Mike Turquette

2015-01-30 18:45 UTC #14 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoting Tero Kristo (2015-01-30 07:20:36)

Quoted 55 lines · Mike Turquette

Quoted 54 lines
Quoting Tero Kristo (2015-01-29 12:19:29)
Quoted 36 lines · Tony Lindgren
Quoted 35 lines · Tero Kristo
Quoted 13 lines
Hi,
These patches move the legacy clock data for omap3 under drivers/clk/ti. After these patches are applied, it should be possible to get rid of clk-private.h (long pending project for Mike.)
Testing done (on top of 3.18-rc1):
omap3-beagle: boot / suspend-resume (ret/off) / cpuidle (ret/off)
omap3-beagle-xm: boot upto fs mount (see note below)
sdp3430: boot
n900: boot
Quoted 8 lines
Note: beagle-xm failed with FS mount on the board I have access to, but
this happens with clean 3.18-rc1 and linux-next also at the moment. The board has probably corrupted filesystem image but I am unable to fix this atm (remote board.)
Test branch:
tree: https://github.com/t-kristo/linux-pm.git
branch: 3.18-rc1-omap3-clk-rework
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.
Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Quoted 8 lines
Quoted 2 lines
Acked-by Tony Lindgren <[email protected]>
I just rebased these patches on top of 3.19-rc1, and noticed a problem with dpll5 on beagle-xm (basically a divide-by-zero error + locking issue during boot.) The extra diff at the end of this email fixes the problems, I will also send the updated two patches as v2. Updated branch available in my tree under name 3.19-rc1-omap3-clk-rework.
I've applied these 11 patches on top of v3.19-rc1, including the two V2 patches for #6 and #8 to the clk-omap-legacy branch here:
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-omap-legacy
Let me know if I screwed anything up. I've merged this immutable branch into clk-next.

Quoted 7 lines

Quoted 3 lines
In addition I've made some changes to remove clk-private.h permanently. I'll post those later today. Again, please let me know if I screwed anything up.
I can't see the clk-omap-legacy merged to clk-next so far, maybe you did not push it yet? The branch itself is identical copy of mine, so can't see any issues there so far.

That is correct. There are a lot of unrelated changes in clk-next right now so I didn't push this OMAP stuff last night. Turns out to be a good thing since linux-next had some breakage today. Once that is resolved I'll push this out, but clk-omap-legacy IS merged locally in my tree, just not on the public git that linux-next pulls.

Regards,
Mike

Quoted 91 lines

-Tero

Quoted 87 lines

Regards,
Mike

Quoted 83 lines

- Tero

---------------------

drivers/clk/ti/clk-3xxx-legacy.c +6 -0

index 81ad510..e0732a4 100644
@@ -136,6 +136,7 @@ static struct ti_clk_dpll dpll3_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x5,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -307,6 +308,7 @@ static struct ti_clk_dpll dpll4_ck_data = {
         .idlest_mask = 0x2,
         .auto_recal_bit = 0x13,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x6,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x70000,

@@ -507,6 +509,7 @@ static struct ti_clk_dpll dpll5_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x19,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -1271,6 +1274,7 @@ static struct ti_clk_dpll dpll1_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x7,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -2154,6 +2158,7 @@ static struct ti_clk_dpll dpll2_ck_data = {
         .idlest_mask = 0x1,
         .auto_recal_bit = 0x3,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x8,
         .max_multiplier = 0x7ff,
         .enable_mask = 0x7,

@@ -2513,6 +2518,7 @@ static struct ti_clk_dpll dpll4_ck_omap36xx_data = {
         .idlest_mask = 0x2,
         .auto_recal_bit = 0x13,
         .max_divider = 0x80,
+       .min_divider = 0x1,
         .recal_en_bit = 0x6,
         .max_multiplier = 0xfff,
         .enable_mask = 0x70000,

drivers/clk/ti/clock.h +1 -0

index 8d9c603..404158d 100644
@@ -148,6 +148,7 @@ struct ti_clk_dpll {
         u32 sddiv_mask;
         u16 max_multiplier;
         u16 max_divider;
+       u8 min_divider;
         u8 auto_recal_bit;
         u8 recal_en_bit;
         u8 recal_st_bit;

drivers/clk/ti/dpll.c +1 -0

index 7d67639..47ebff7 100644
@@ -243,6 +243,7 @@ struct clk *ti_clk_register_dpll(struct ti_clk *setup)
         dd->sddiv_mask = dpll->sddiv_mask;
         dd->dco_mask = dpll->dco_mask;
         dd->max_divider = dpll->max_divider;
+       dd->min_divider = dpll->min_divider;
         dd->max_multiplier = dpll->max_multiplier;
         dd->auto_recal_bit = dpll->auto_recal_bit;
         dd->recal_en_bit = dpll->recal_en_bit;

Arnd Bergmann

2015-02-03 16:59 UTC #15 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

In reply to Tony Lindgren

Quoted 6 lines · Tony Lindgren

Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.

Quoted 7 lines

Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Acked-by Tony Lindgren <[email protected]>

The series has arrived in linux-next and promptly triggered a few randconfig build errors. Here is a patch that fixes it. Feel free to replace it with a different patch if you don't like this version.

8<--------
Subject: clk: omap: compile legacy omap3 clocks conditionally

The 'ARM: OMAP3: legacy clock data move under clk driver' patch series causes build errors when CONFIG_OMAP3 is not set:

drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll':
drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function)

  const struct clk_ops *ops = &omap3_dpll_ck_ops;
                               ^
drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in
drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function)
   ops = &omap3_dpll_per_ck_ops;
          ^

drivers/built-in.o: In function `ti_clk_register_gate':
drivers/clk/ti/gate.c:179: undefined reference to clkhwops_omap3430es2_dss_usbhost_wait' drivers/clk/ti/gate.c:179: undefined reference to clkhwops_am35xx_ipss_module_wait' -in.o: In function `ti_clk_register_interface':
drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_hsotgusb_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_dss_usbhost_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_ssi_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_am35xx_ipss_wait' drivers/built-in.o: In function `ti_clk_register_composite':
:(.text+0x3da768): undefined reference to `ti_clk_build_component_gate'

In order to fix that problem, this patch makes the omap3 legacy code compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set.

Signed-off-by Arnd Bergmann <[email protected]>

----

drivers/clk/ti/Makefile +4 -2

index 14e6686a5eea..105ffd0f5e79 100644
@@ -1,4 +1,3 @@
-ifneq ($(CONFIG_OF),)
 obj-y					+= clk.o autoidle.o clockdomain.o
 clk-common				= dpll.o composite.o divider.o gate.o \
 					  fixed-factor.o mux.o apll.o

@@ -6,10 +5,13 @@ obj-$(CONFIG_SOC_AM33XX)		+= $(clk-common) clk-33xx.o
 obj-$(CONFIG_SOC_TI81XX)		+= $(clk-common) fapll.o clk-816x.o
 obj-$(CONFIG_ARCH_OMAP2)		+= $(clk-common) interface.o clk-2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(clk-common) interface.o \
-					   clk-3xxx.o clk-3xxx-legacy.o
+					   clk-3xxx.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(clk-common) clk-44xx.o
 obj-$(CONFIG_SOC_OMAP5)			+= $(clk-common) clk-54xx.o
 obj-$(CONFIG_SOC_DRA7XX)		+= $(clk-common) clk-7xx.o \
 					   clk-dra7-atl.o
 obj-$(CONFIG_SOC_AM43XX)		+= $(clk-common) clk-43xx.o
+
+ifdef CONFIG_ATAGS
+obj-$(CONFIG_ARCH_OMAP3)                += clk-3xxx-legacy.o
 endif

drivers/clk/ti/clk.c +2 -0

index 546dae405402..e22b95646e09 100644
@@ -186,6 +186,7 @@ void ti_dt_clk_init_retry_clks(void)
 	}
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
 {
 	while (*patch) {

@@ -308,3 +309,4 @@ int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
 
 	return 0;
 }
+#endif

drivers/clk/ti/composite.c +2 -0

index 3a9665fce041..3654f61912eb 100644
@@ -118,6 +118,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
 
 #define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw)
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_composite(struct ti_clk *setup)
 {
 	struct ti_clk_composite *comp;

@@ -153,6 +154,7 @@ struct clk *ti_clk_register_composite(struct ti_clk *setup)
 
 	return clk;
 }
+#endif
 
 static void __init _register_composite(struct clk_hw *hw,
 				       struct device_node *node)

drivers/clk/ti/dpll.c +2 -0

index 47ebff772b13..81dc4698dc41 100644
@@ -176,6 +176,7 @@ cleanup:
 	kfree(clk_hw);
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __iomem *_get_reg(u8 module, u16 offset)
 {
 	u32 reg;

@@ -271,6 +272,7 @@ cleanup:
 	kfree(clk_hw);
 	return clk;
 }
+#endif
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM33XX) || \

drivers/clk/ti/gate.c +2 -0

index d4f6cb20e16e..d493307b73f4 100644
@@ -130,6 +130,7 @@ static struct clk *_register_gate(struct device *dev, const char *name,
 	return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_gate(struct ti_clk *setup)
 {
 	const struct clk_ops *ops = &omap_gate_clk_ops;

@@ -208,6 +209,7 @@ struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup)
 
 	return &gate->hw;
 }
+#endif
 
 static void __init _of_ti_gate_clk_setup(struct device_node *node,
 					 const struct clk_ops *ops,

drivers/clk/ti/interface.c +2 -0

index d71cd9b5de46..265d91f071c5 100644
@@ -68,6 +68,7 @@ static struct clk *_register_interface(struct device *dev, const char *name,
 	return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_interface(struct ti_clk *setup)
 {
 	const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;

@@ -98,6 +99,7 @@ struct clk *ti_clk_register_interface(struct ti_clk *setup)
 	return _register_interface(NULL, setup->name, gate->parent,
 				   (void __iomem *)reg, gate->bit_shift, ops);
 }
+#endif
 
 static void __init _of_ti_interface_clk_setup(struct device_node *node,
 					      const struct clk_hw_omap_ops *ops)

include/linux/clk/ti.h +8 -0

index 0eac65054283..67844003493d 100644
@@ -360,9 +360,17 @@ extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait;
 
+#ifdef CONFIG_ATAGS
 int omap3430_clk_legacy_init(void);
 int omap3430es1_clk_legacy_init(void);
 int omap36xx_clk_legacy_init(void);
 int am35xx_clk_legacy_init(void);
+#else
+static inline int omap3430_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap3430es1_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap36xx_clk_legacy_init(void) { return -ENXIO; }
+static inline int am35xx_clk_legacy_init(void) { return -ENXIO; }
+#endif
+
 
 #endif

Tony Lindgren

maintainer

2015-02-03 19:04 UTC #16 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoted 46 lines · Arnd Bergmann

Quoted 6 lines · Tony Lindgren
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.
Quoted 7 lines
Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Acked-by Tony Lindgren <[email protected]>
The series has arrived in linux-next and promptly triggered a few randconfig build errors. Here is a patch that fixes it. Feel free to replace it with a different patch if you don't like this version.
8<--------
Subject: clk: omap: compile legacy omap3 clocks conditionally
The 'ARM: OMAP3: legacy clock data move under clk driver' patch series causes build errors when CONFIG_OMAP3 is not set:
drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll':
drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function)
  const struct clk_ops *ops = &omap3_dpll_ck_ops;
                               ^
drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in
drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function)
   ops = &omap3_dpll_per_ck_ops;
          ^
drivers/built-in.o: In function `ti_clk_register_gate':
drivers/clk/ti/gate.c:179: undefined reference to clkhwops_omap3430es2_dss_usbhost_wait' drivers/clk/ti/gate.c:179: undefined reference to clkhwops_am35xx_ipss_module_wait' -in.o: In function `ti_clk_register_interface':
drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_hsotgusb_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_dss_usbhost_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_ssi_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_am35xx_ipss_wait' drivers/built-in.o: In function `ti_clk_register_composite':
:(.text+0x3da768): undefined reference to `ti_clk_build_component_gate'

Quoted 2 lines

In order to fix that problem, this patch makes the omap3 legacy code compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set.

Looks OK to me:

Acked-by Tony Lindgren <[email protected]>

Quoted 149 lines

Signed-off-by Arnd Bergmann <[email protected]>

----

drivers/clk/ti/Makefile +4 -2

index 14e6686a5eea..105ffd0f5e79 100644
@@ -1,4 +1,3 @@
-ifneq ($(CONFIG_OF),)
 obj-y					+= clk.o autoidle.o clockdomain.o
 clk-common				= dpll.o composite.o divider.o gate.o \
 					  fixed-factor.o mux.o apll.o

@@ -6,10 +5,13 @@ obj-$(CONFIG_SOC_AM33XX)		+= $(clk-common) clk-33xx.o
 obj-$(CONFIG_SOC_TI81XX)		+= $(clk-common) fapll.o clk-816x.o
 obj-$(CONFIG_ARCH_OMAP2)		+= $(clk-common) interface.o clk-2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= $(clk-common) interface.o \
-					   clk-3xxx.o clk-3xxx-legacy.o
+					   clk-3xxx.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(clk-common) clk-44xx.o
 obj-$(CONFIG_SOC_OMAP5)			+= $(clk-common) clk-54xx.o
 obj-$(CONFIG_SOC_DRA7XX)		+= $(clk-common) clk-7xx.o \
 					   clk-dra7-atl.o
 obj-$(CONFIG_SOC_AM43XX)		+= $(clk-common) clk-43xx.o
+
+ifdef CONFIG_ATAGS
+obj-$(CONFIG_ARCH_OMAP3)                += clk-3xxx-legacy.o
 endif

drivers/clk/ti/clk.c +2 -0

index 546dae405402..e22b95646e09 100644
@@ -186,6 +186,7 @@ void ti_dt_clk_init_retry_clks(void)
 	}
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
 {
 	while (*patch) {

@@ -308,3 +309,4 @@ int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
 
 	return 0;
 }
+#endif

drivers/clk/ti/composite.c +2 -0

index 3a9665fce041..3654f61912eb 100644
@@ -118,6 +118,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
 
 #define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw)
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_composite(struct ti_clk *setup)
 {
 	struct ti_clk_composite *comp;

@@ -153,6 +154,7 @@ struct clk *ti_clk_register_composite(struct ti_clk *setup)
 
 	return clk;
 }
+#endif
 
 static void __init _register_composite(struct clk_hw *hw,
 				       struct device_node *node)

drivers/clk/ti/dpll.c +2 -0

index 47ebff772b13..81dc4698dc41 100644
@@ -176,6 +176,7 @@ cleanup:
 	kfree(clk_hw);
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __iomem *_get_reg(u8 module, u16 offset)
 {
 	u32 reg;

@@ -271,6 +272,7 @@ cleanup:
 	kfree(clk_hw);
 	return clk;
 }
+#endif
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM33XX) || \

drivers/clk/ti/gate.c +2 -0

index d4f6cb20e16e..d493307b73f4 100644
@@ -130,6 +130,7 @@ static struct clk *_register_gate(struct device *dev, const char *name,
 	return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_gate(struct ti_clk *setup)
 {
 	const struct clk_ops *ops = &omap_gate_clk_ops;

@@ -208,6 +209,7 @@ struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup)
 
 	return &gate->hw;
 }
+#endif
 
 static void __init _of_ti_gate_clk_setup(struct device_node *node,
 					 const struct clk_ops *ops,

drivers/clk/ti/interface.c +2 -0

index d71cd9b5de46..265d91f071c5 100644
@@ -68,6 +68,7 @@ static struct clk *_register_interface(struct device *dev, const char *name,
 	return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_interface(struct ti_clk *setup)
 {
 	const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;

@@ -98,6 +99,7 @@ struct clk *ti_clk_register_interface(struct ti_clk *setup)
 	return _register_interface(NULL, setup->name, gate->parent,
 				   (void __iomem *)reg, gate->bit_shift, ops);
 }
+#endif
 
 static void __init _of_ti_interface_clk_setup(struct device_node *node,
 					      const struct clk_hw_omap_ops *ops)

include/linux/clk/ti.h +8 -1

index 0eac65054283..67844003493d 100644
@@ -360,9 +360,17 @@ extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait;
 
+#ifdef CONFIG_ATAGS
 int omap3430_clk_legacy_init(void);
 int omap3430es1_clk_legacy_init(void);
 int omap36xx_clk_legacy_init(void);
 int am35xx_clk_legacy_init(void);
+#else
+static inline int omap3430_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap3430es1_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap36xx_clk_legacy_init(void) { return -ENXIO; }
+static inline int am35xx_clk_legacy_init(void) { return -ENXIO; }
+#endif
+
 
 #endif
--

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Mike Turquette

Applied

2015-02-03 19:11 UTC #17 lore raw

cover ARM: OMAP3: legacy clock data move under clk driver

Quoted 47 lines · Tony Lindgren

Quoted 46 lines · Arnd Bergmann
Quoted 6 lines · Tony Lindgren
Great, hopefully this will finally allow Mike to make the generic struct clk private to drivers/clk :)
Seems to boot just fine based on a quick legacy booting test on n900.
Quoted 7 lines
Mike, assuming no other issues, can you please apply these into a immutable branch against v3.19-rc1 that Paul and I can also merge in as needed?
Please also feel free to add:
Acked-by Tony Lindgren <[email protected]>
The series has arrived in linux-next and promptly triggered a few randconfig build errors. Here is a patch that fixes it. Feel free to replace it with a different patch if you don't like this version.
8<--------
Subject: clk: omap: compile legacy omap3 clocks conditionally
The 'ARM: OMAP3: legacy clock data move under clk driver' patch series causes build errors when CONFIG_OMAP3 is not set:
drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll':
drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function)
  const struct clk_ops *ops = &omap3_dpll_ck_ops;
                               ^
drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in
drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function)
   ops = &omap3_dpll_per_ck_ops;
          ^
drivers/built-in.o: In function `ti_clk_register_gate':
drivers/clk/ti/gate.c:179: undefined reference to clkhwops_omap3430es2_dss_usbhost_wait' drivers/clk/ti/gate.c:179: undefined reference to clkhwops_am35xx_ipss_module_wait' -in.o: In function `ti_clk_register_interface':
drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_hsotgusb_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_dss_usbhost_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_omap3430es2_iclk_ssi_wait' drivers/clk/ti/interface.c:100: undefined reference to clkhwops_am35xx_ipss_wait' drivers/built-in.o: In function `ti_clk_register_composite':
:(.text+0x3da768): undefined reference to `ti_clk_build_component_gate'

Quoted 6 lines

Quoted 2 lines
In order to fix that problem, this patch makes the omap3 legacy code compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set.
Looks OK to me:
Acked-by Tony Lindgren <[email protected]>

Thanks for the fix Arnd and for the Ack Tony. I beautified the commitlog a bit.

Applied to clk-next.

Regards,
Mike

Quoted 150 lines

Signed-off-by Arnd Bergmann <[email protected]>

----

drivers/clk/ti/Makefile +4 -2

index 14e6686a5eea..105ffd0f5e79 100644
@@ -1,4 +1,3 @@
-ifneq ($(CONFIG_OF),)
 obj-y                                        += clk.o autoidle.o clockdomain.o
 clk-common                           = dpll.o composite.o divider.o gate.o \
                                        fixed-factor.o mux.o apll.o

@@ -6,10 +5,13 @@ obj-$(CONFIG_SOC_AM33XX)            += $(clk-common) clk-33xx.o
 obj-$(CONFIG_SOC_TI81XX)             += $(clk-common) fapll.o clk-816x.o
 obj-$(CONFIG_ARCH_OMAP2)             += $(clk-common) interface.o clk-2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)             += $(clk-common) interface.o \
-                                        clk-3xxx.o clk-3xxx-legacy.o
+                                        clk-3xxx.o
 obj-$(CONFIG_ARCH_OMAP4)             += $(clk-common) clk-44xx.o
 obj-$(CONFIG_SOC_OMAP5)                      += $(clk-common) clk-54xx.o
 obj-$(CONFIG_SOC_DRA7XX)             += $(clk-common) clk-7xx.o \
                                         clk-dra7-atl.o
 obj-$(CONFIG_SOC_AM43XX)             += $(clk-common) clk-43xx.o
+
+ifdef CONFIG_ATAGS
+obj-$(CONFIG_ARCH_OMAP3)                += clk-3xxx-legacy.o
 endif

drivers/clk/ti/clk.c +2 -0

index 546dae405402..e22b95646e09 100644
@@ -186,6 +186,7 @@ void ti_dt_clk_init_retry_clks(void)
      }
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
 {
      while (*patch) {

@@ -308,3 +309,4 @@ int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
 
      return 0;
 }
+#endif

drivers/clk/ti/composite.c +2 -0

index 3a9665fce041..3654f61912eb 100644
@@ -118,6 +118,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
 
 #define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw)
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_composite(struct ti_clk *setup)
 {
      struct ti_clk_composite *comp;

@@ -153,6 +154,7 @@ struct clk *ti_clk_register_composite(struct ti_clk *setup)
 
      return clk;
 }
+#endif
 
 static void __init _register_composite(struct clk_hw *hw,
                                     struct device_node *node)

drivers/clk/ti/dpll.c +2 -0

index 47ebff772b13..81dc4698dc41 100644
@@ -176,6 +176,7 @@ cleanup:
      kfree(clk_hw);
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 void __iomem *_get_reg(u8 module, u16 offset)
 {
      u32 reg;

@@ -271,6 +272,7 @@ cleanup:
      kfree(clk_hw);
      return clk;
 }
+#endif
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
      defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM33XX) || \

drivers/clk/ti/gate.c +2 -0

index d4f6cb20e16e..d493307b73f4 100644
@@ -130,6 +130,7 @@ static struct clk *_register_gate(struct device *dev, const char *name,
      return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_gate(struct ti_clk *setup)
 {
      const struct clk_ops *ops = &omap_gate_clk_ops;

@@ -208,6 +209,7 @@ struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup)
 
      return &gate->hw;
 }
+#endif
 
 static void __init _of_ti_gate_clk_setup(struct device_node *node,
                                       const struct clk_ops *ops,

drivers/clk/ti/interface.c +2 -0

index d71cd9b5de46..265d91f071c5 100644
@@ -68,6 +68,7 @@ static struct clk *_register_interface(struct device *dev, const char *name,
      return clk;
 }
 
+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
 struct clk *ti_clk_register_interface(struct ti_clk *setup)
 {
      const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;

@@ -98,6 +99,7 @@ struct clk *ti_clk_register_interface(struct ti_clk *setup)
      return _register_interface(NULL, setup->name, gate->parent,
                                 (void __iomem *)reg, gate->bit_shift, ops);
 }
+#endif
 
 static void __init _of_ti_interface_clk_setup(struct device_node *node,
                                            const struct clk_hw_omap_ops *ops)

include/linux/clk/ti.h +8 -1

index 0eac65054283..67844003493d 100644
@@ -360,9 +360,17 @@ extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait;
 
+#ifdef CONFIG_ATAGS
 int omap3430_clk_legacy_init(void);
 int omap3430es1_clk_legacy_init(void);
 int omap36xx_clk_legacy_init(void);
 int am35xx_clk_legacy_init(void);
+#else
+static inline int omap3430_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap3430es1_clk_legacy_init(void) { return -ENXIO; }
+static inline int omap36xx_clk_legacy_init(void) { return -ENXIO; }
+static inline int am35xx_clk_legacy_init(void) { return -ENXIO; }
+#endif
+
 
 #endif
--

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Tero Kristo

author

2015-01-29 20:24 UTC #18 lore raw

PATCH v2 6/11 clk: ti: dpll: add support for legacy DPLL init

In reply to Tero Kristo

Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this.

Signed-off-by Tero Kristo <[email protected]>

Acked-by Tony Lindgren <[email protected]>

---
 drivers/clk/ti/clk.c   |    3 ++
 drivers/clk/ti/clock.h |    2 +
 drivers/clk/ti/dpll.c  |  119 +++++++++++++++++++++++++++++++++++++++++++-----
 3 files changed, 113 insertions(+), 11 deletions(-)

drivers/clk/ti/clk.c +3 -0

index a0475e2..f41a757 100644
@@ -228,6 +228,9 @@ struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
 	case TI_CLK_GATE:
 		clk = ti_clk_register_gate(setup);
 		break;
+	case TI_CLK_DPLL:
+		clk = ti_clk_register_dpll(setup);
+		break;
 	default:
 		pr_err("bad type for %s!\n", setup->name);
 		clk = ERR_PTR(-EINVAL);

drivers/clk/ti/clock.h +2 -0

index fe70941..578b73b 100644
@@ -148,6 +148,7 @@ struct ti_clk_dpll {
 	u32 sddiv_mask;
 	u16 max_multiplier;
 	u16 max_divider;
+	u8 min_divider;
 	u8 auto_recal_bit;
 	u8 recal_en_bit;
 	u8 recal_st_bit;

@@ -157,6 +158,7 @@ struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
 struct clk *ti_clk_register_divider(struct ti_clk *setup);
+struct clk *ti_clk_register_dpll(struct ti_clk *setup);
 
 struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);
 struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);

drivers/clk/ti/dpll.c +108 ~~-11~~

177 lines not on this page · raw message

Signature · 1 line

1.7.9.5