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spi: Add Designware SPI controller Kconfig entry

PATCH Superseded Marek Vasut 5 participants 12 messages Mar 4, 2015 – Mar 5, 2015 SPI

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/2 spi: Add Designware SPI controller Kconfig entry

Add DWC SPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>
---
 drivers/spi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/spi/Kconfig +6 -0
index 7ae2727..c0b2570 100644
@@ -10,3 +10,9 @@ config DM_SPI
 	  as 'parent data' to every slave on each bus. Slaves
 	  typically use driver-private data instead of extending the
 	  spi_slave structure.
+
+config DESIGNWARE_SPI
+	bool "Designware SPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Designware SPI driver.
Signature · 1 line
2.1.3
#1 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Add Cadence QSPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>
---
 drivers/spi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/spi/Kconfig +6 -0
index c0b2570..eaf31ed 100644
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
 	depends on DM_SPI
 	help
 	  Enable the Designware SPI driver.
+
+config CADENCE_QSPI
+	bool "Cadence QSPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Cadence QSPI driver.
Signature · 1 line
2.1.3
#2 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Quoted 11 lines · Marek Vasut

Add Cadence QSPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>

Thanks,
Stefan

#3 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

In reply to Marek Vasut

Hi Marek,

Quoted 20 lines · Marek Vasut

Add Cadence QSPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>
---
 drivers/spi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/spi/Kconfig +0 -0
index c0b2570..eaf31ed 100644

drivers/spi/Kconfig config DESIGNWARE_SPI · line 24

Quoted 9 lines
drivers/spi/Kconfig +6 -0
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
        depends on DM_SPI
        help
          Enable the Designware SPI driver.
+
+config CADENCE_QSPI
+       bool "Cadence QSPI driver"
+       depends on DM_SPI
+       help
+         Enable the Cadence QSPI driver.

Can we get a bit more detail here? What does QSPI mean? What features does it support?

Regards,
Simon

#4 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Quoted 30 lines · Simon Glass

Hi Marek,

Quoted 27 lines · Marek Vasut

Add Cadence QSPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>

---

 drivers/spi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/spi/Kconfig +0 -0
index c0b2570..eaf31ed 100644
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
 
        depends on DM_SPI
        help
 
          Enable the Designware SPI driver.
Quoted 9 lines

drivers/spi/Kconfig config DESIGNWARE_SPI · line 24

Quoted 6 lines
drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+       bool "Cadence QSPI driver"
+       depends on DM_SPI
+       help
+         Enable the Cadence QSPI driver.

Can we get a bit more detail here? What does QSPI mean? What features does it support?

Stefan ? ;-)

Best regards,
Marek Vasut

#5 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Quoted 21 lines · Marek Vasut
Quoted 11 lines
Quoted 11 lines
drivers/spi/Kconfig +0 -0
index c0b2570..eaf31ed 100644
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
 
         depends on DM_SPI
         help
 
           Enable the Designware SPI driver.
Quoted 9 lines

drivers/spi/Kconfig config DESIGNWARE_SPI · line 24

Quoted 6 lines
drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+       bool "Cadence QSPI driver"
+       depends on DM_SPI
+       help
+         Enable the Cadence QSPI driver.

Can we get a bit more detail here? What does QSPI mean? What features does it support?

Quoted 1 line

Stefan ? ;-)

Its the IP core from Cadence supporting SPI NOR flash and is present on the Altera SoCFPGA. Enabling access to such SPI NOR flash devices. QSPI stands for Quad-SPI and refers to the optional use of up to 4 data lines for flash access.

So perhaps something like this:

+
+config CADENCE_QSPI
+ bool "Cadence QSPI driver"
+ depends on DM_SPI
+ help
+ Enable the Cadence QSPI driver. This driver can be used to +
access the SPI NOR flash on platforms embedding this

+	  Cadence IP core (like the Altera SoCFPGA). QSPI stands for
+	  Quad-SPI and refers to the optional use of up to 4 data lines
+	  for flash access.

HTP.

Thanks,
Stefan

#6 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Quoted 38 lines · Stefan Roese
Quoted 21 lines · Marek Vasut
Quoted 11 lines
Quoted 11 lines
drivers/spi/Kconfig +0 -0
index c0b2570..eaf31ed 100644
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
 
        depends on DM_SPI
        help
 
          Enable the Designware SPI driver.
Quoted 9 lines

drivers/spi/Kconfig config DESIGNWARE_SPI · line 24

Quoted 6 lines
drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+       bool "Cadence QSPI driver"
+       depends on DM_SPI
+       help
+         Enable the Cadence QSPI driver.

Can we get a bit more detail here? What does QSPI mean? What features does it support?

Quoted 1 line

Stefan ? ;-)

Its the IP core from Cadence supporting SPI NOR flash and is present on the Altera SoCFPGA. Enabling access to such SPI NOR flash devices. QSPI stands for Quad-SPI and refers to the optional use of up to 4 data lines for flash access.

So perhaps something like this:

drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+	bool "Cadence QSPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Cadence QSPI driver. This driver can be used to +	

access the SPI NOR flash on platforms embedding this

Review

Quoted 3 lines
(quoted diff) +3 -0
+	  Cadence IP core (like the Altera SoCFPGA). QSPI stands for
+	  Quad-SPI and refers to the optional use of up to 4 data lines
+	  for flash access.

Please don't mention platforms in the help for what I think of as IP-block-vendor drivers. The Cadence QSPI block will be reused by others and I can see someone "needing" to patch the help text. How about:
Enable the Cadence Quad-SPI (QSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this Cadence IP core.

Signature · 8 lines
Tom
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#7 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

Quoted 43 lines · Tom Rini
Quoted 38 lines · Stefan Roese
Quoted 21 lines · Marek Vasut
Quoted 11 lines
Quoted 11 lines
drivers/spi/Kconfig +0 -0
index c0b2570..eaf31ed 100644
@@ -16,3 +16,9 @@ config DESIGNWARE_SPI
 
         depends on DM_SPI
         help
 
           Enable the Designware SPI driver.
Quoted 9 lines

drivers/spi/Kconfig config DESIGNWARE_SPI · line 24

Quoted 6 lines
drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+       bool "Cadence QSPI driver"
+       depends on DM_SPI
+       help
+         Enable the Cadence QSPI driver.

Can we get a bit more detail here? What does QSPI mean? What features does it support?

Quoted 1 line

Stefan ? ;-)

Its the IP core from Cadence supporting SPI NOR flash and is present on the Altera SoCFPGA. Enabling access to such SPI NOR flash devices. QSPI stands for Quad-SPI and refers to the optional use of up to 4 data lines for flash access.

So perhaps something like this:

drivers/spi/Kconfig +6 -0
+
+config CADENCE_QSPI
+	bool "Cadence QSPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Cadence QSPI driver. This driver can be used to +	

access the SPI NOR flash on platforms embedding this

Review

Quoted 3 lines
(quoted diff) +3 -0
+	  Cadence IP core (like the Altera SoCFPGA). QSPI stands for
+	  Quad-SPI and refers to the optional use of up to 4 data lines
+	  for flash access.
Quoted 7 lines

Please don't mention platforms in the help for what I think of as IP-block-vendor drivers. The Cadence QSPI block will be reused by others and I can see someone "needing" to patch the help text. How about:
Enable the Cadence Quad-SPI (QSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this Cadence IP core.

Even better.

Thanks,
Stefan

#8 lore raw

PATCH 2/2 spi: Add Cadence QSPI controller Kconfig entry

On Thursday, March 05, 2015 at 05:47:01 PM, Stefan Roese wrote:
[...]

Quoted 10 lines
Quoted 8 lines

Please don't mention platforms in the help for what I think of as IP-block-vendor drivers. The Cadence QSPI block will be reused by others and I can see someone "needing" to patch the help text. How

about:
Enable the Cadence Quad-SPI (QSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this Cadence IP core.

Even better.

Thanks

Best regards,
Marek Vasut

#9 lore raw

PATCH 1/2 spi: Add Designware SPI controller Kconfig entry

In reply to Marek Vasut
Quoted 11 lines · Marek Vasut

Add DWC SPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>

Thanks,
Stefan

#10 lore raw

PATCH 1/2 spi: Add Designware SPI controller Kconfig entry

In reply to Marek Vasut
Quoted 6 lines · Marek Vasut

Add DWC SPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>

(For both patches in the series).

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#11 lore raw

PATCH 1/2 spi: Add Designware SPI controller Kconfig entry

In reply to Marek Vasut

Hi,

Quoted 20 lines · Marek Vasut

Add DWC SPI controller Kconfig entry.

Cc Chin Liang See <[email protected]>
Cc Dinh Nguyen <[email protected]>
Cc Jagannadha Sutradharudu Teki <[email protected]>
Cc Pavel Machek <[email protected]>
Cc Simon Glass <[email protected]>
Cc Stefan Roese <[email protected]>
Cc Tom Rini <[email protected]>
Cc Vince Bridgers <[email protected]>
---
 drivers/spi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/spi/Kconfig +0 -0
index 7ae2727..c0b2570 100644

drivers/spi/Kconfig config DM_SPI · line 18

Quoted 9 lines
drivers/spi/Kconfig +6 -0
@@ -10,3 +10,9 @@ config DM_SPI
          as 'parent data' to every slave on each bus. Slaves
          typically use driver-private data instead of extending the
          spi_slave structure.
+
+config DESIGNWARE_SPI
+       bool "Designware SPI driver"
+       depends on DM_SPI
+       help
+         Enable the Designware SPI driver.

At least for driver model I'd like to have a nice long help message.

Regards,
Simon