Skip to contentSkip to conversation

Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

GIT PULL New Simon Horman 5 participants 23 messages Mar 5, 2015 – Mar 11, 2015

Subsystems (9)
Device tree bindings Arm (32-bit) Arm sub-architectures Common clk +5 more subsystems
lore
Share & tools
lore

Simon Horman

author
#0 lore raw

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC r8a7778 CCF and multiplatform updates for v4.1.

This pull request is based on "Renesas ARM Based SoC Simple PM Bus Updates for v4.1", tagged as renesas-simple-pm-bus-for-v4.1, which you have already pulled. That pull request provides run-time dependencies for this one.

The following changes since commit 89d463ea106dba530786a2815fd174f9e6eab71f:

drivers: bus: Add Simple Power-Managed Bus Driver (2015-02-24 06:36:18 +0900)

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-r8a7778-ccf-and-multiplatform-for-v4.1

for you to fetch changes up to 3915d36fabf143dffdf91c5372d3b0a23722af52:

ARM: shmobile: r8a7778: enable multiplatform target (2015-03-01 11:04:44 +0900)

----------------------------------------------------------------
Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

* Add CCF and them multiplatform support to r8a7778 SoC and its bockw board.

----------------------------------------------------------------
Ulrich Hecht (16):
ARM: shmobile: r8a7778: synchronize dts with reference platform
ARM: shmobile: r8a7778: add CPG register bits header
ARM: shmobile: r8a7778: Common clock framework DT description
ARM: shmobile: r8a7778: implement SoC and board CCF support
ARM: shmobile: r8a7778: add MSTP clock assignments to DT
ARM: shmobile: r8a7778: add internal ethernet controller to DT
ARM: shmobile: bockw: add USB, VIN pin descriptions to DT
ARM: shmobile: r8a7778 dtsi: Add Bus State Controller node
ARM: shmobile: bockw dts: Move Ethernet node to BSC
ARM: shmobile: bockw dts: set extal clock frequency
ARM: shmobile: r8a7778: common clock framework CPG driver
DT: i2c: add trivial binding for OKI ML86V7667 video decoder
ARM: shmobile: bockw: add devices hooked up to i2c0 to DT
ARM: shmobile: r8a7778: add sound to DT
ARM: shmobile: bockw: add sound to DT
ARM: shmobile: r8a7778: enable multiplatform target

 .../bindings/clock/renesas,r8a7778-cpg-clocks.txt  |  25 ++
 .../devicetree/bindings/i2c/trivial-devices.txt    |   1 +
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/r8a7778-bockw.dts                | 174 ++++++++++++
 arch/arm/boot/dts/r8a7778.dtsi                     | 293 +++++++++++++++++++++
 arch/arm/mach-shmobile/Kconfig                     |   4 +
 arch/arm/mach-shmobile/board-bockw-reference.c     |   2 +
 arch/arm/mach-shmobile/setup-r8a7778.c             |  19 ++
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-r8a7778.c                 | 143 ++++++++++
 include/dt-bindings/clock/r8a7778-clock.h          |  71 +++++
 include/linux/clk/shmobile.h                       |   1 +
 12 files changed, 735 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-r8a7778.c
 create mode 100644 include/dt-bindings/clock/r8a7778-clock.h
author
#1 lore raw

PATCH 1/16 ARM: shmobile: r8a7778: synchronize dts with reference platform

From: Ulrich Hecht <[email protected]>

This moves everything to the legacy dts that is missing there to make it suitable for use with multiplatform.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 106 ++++++++++++++++++++++++++++++++++++
 1 file changed, 106 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +106 -0
index 46a884d..7347223 100644
@@ -16,17 +16,123 @@
 
 /dts-v1/;
 #include "r8a7778.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "bockw";
 	compatible = "renesas,bockw", "renesas,r8a7778";
 
+	aliases {
+		serial0 = &scif0;
+	};
+
 	chosen {
 		bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
+		stdout-path = &scif0;
 	};
 
 	memory {
 		device_type = "memory";
 		reg = <0x60000000 0x10000000>;
 	};
+
+	fixedregulator3v3: fixedregulator at 0 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	ethernet at 18300000 {
+		compatible = "smsc,lan9220", "smsc,lan9115";
+		reg = <0x18300000 0x1000>;
+
+		phy-mode = "mii";
+		interrupt-parent = <&irqpin>;
+		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+		reg-io-width = <4>;
+		vddvario-supply = <&fixedregulator3v3>;
+		vdd33a-supply = <&fixedregulator3v3>;
+	};
+};
+
+&mmcif {
+	pinctrl-0 = <&mmc_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&fixedregulator3v3>;
+	bus-width = <8>;
+	broken-cd;
+	status = "okay";
+};
+
+&irqpin {
+	status = "okay";
+};
+
+&tmu0 {
+	status = "okay";
+};
+
+&pfc {
+	scif0_pins: serial0 {
+		renesas,groups = "scif0_data_a", "scif0_ctrl";
+		renesas,function = "scif0";
+	};
+
+	mmc_pins: mmc {
+		renesas,groups = "mmc_data8", "mmc_ctrl";
+		renesas,function = "mmc";
+	};
+
+	sdhi0_pins: sd0 {
+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
+				  "sdhi0_cd";
+		renesas,function = "sdhi0";
+	};
+
+	hspi0_pins: hspi0 {
+		renesas,groups = "hspi0_a";
+		renesas,function = "hspi0";
+	};
+};
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-names = "default";
+
+	vmmc-supply = <&fixedregulator3v3>;
+	bus-width = <4>;
+	status = "okay";
+	wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
+};
+
+&hspi0 {
+	pinctrl-0 = <&hspi0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	flash: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,s25fl008k";
+		reg = <0>;
+		spi-max-frequency = <104000000>;
+		m25p,fast-read;
+
+		partition at 0 {
+			label = "data(spi)";
+			reg = <0x00000000 0x00100000>;
+		};
+	};
+};
+
+&scif0 {
+	pinctrl-0 = <&scif0_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
 };
Signature · 1 line
2.1.4
#2 lore raw

PATCH 1/16 ARM: shmobile: r8a7778: synchronize dts with reference platform

Hello.

Quoted 18 lines · Simon Horman

From: Ulrich Hecht <[email protected]>

This moves everything to the legacy dts that is missing there to make it suitable for use with multiplatform.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
  arch/arm/boot/dts/r8a7778-bockw.dts | 106 ++++++++++++++++++++++++++++++++++++
  1 file changed, 106 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +0 -0
index 46a884d..7347223 100644
@@ -16,17 +16,123 @@

[...]

arch/arm/boot/dts/r8a7778-bockw.dts

Quoted 2 lines
arch/arm/boot/dts/r8a7778-bockw.dts +2 -0
+
+	fixedregulator3v3: fixedregulator at 0 {

Ugh, this node should be named just "regulator at 0". The label also doesn't
appeal to me -- I'd rather prefer a name derived from the schematics. :-/

WBR, Sergei

#3 lore raw

PATCH 1/16 ARM: shmobile: r8a7778: synchronize dts with reference platform

Quoted 23 lines · Sergei Shtylyov

Hello.

Quoted 18 lines · Simon Horman

From: Ulrich Hecht <[email protected]>

This moves everything to the legacy dts that is missing there to make it suitable for use with multiplatform.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 106 ++++++++++++++++++++++++++++++++++++
 1 file changed, 106 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +0 -0
index 46a884d..7347223 100644
@@ -16,17 +16,123 @@

[...]

Quoted 5 lines

arch/arm/boot/dts/r8a7778-bockw.dts

Quoted 2 lines
arch/arm/boot/dts/r8a7778-bockw.dts +2 -0
+
+	fixedregulator3v3: fixedregulator at 0 {

Ugh, this node should be named just "regulator at 0". The label also doesn't
appeal to me -- I'd rather prefer a name derived from the schematics. :-/

Please feel free to supply an incremental cleanup patch.

author
#4 lore raw

PATCH 2/16 ARM: shmobile: r8a7778: add CPG register bits header

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Enumerates CPG driver custom clocks and MSTP clock enable bits.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 include/dt-bindings/clock/r8a7778-clock.h | 71 +++++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)
 create mode 100644 include/dt-bindings/clock/r8a7778-clock.h
include/dt-bindings/clock/r8a7778-clock.h new file +71 -0
new file mode 100644
index 0000000..f6b07c5
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2014 Ulrich Hecht
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R8A7778_H__
+#define __DT_BINDINGS_CLOCK_R8A7778_H__
+
+/* CPG */
+#define R8A7778_CLK_PLLA	0
+#define R8A7778_CLK_PLLB	1
+#define R8A7778_CLK_B		2
+#define R8A7778_CLK_OUT		3
+#define R8A7778_CLK_P		4
+#define R8A7778_CLK_S		5
+#define R8A7778_CLK_S1		6
+
+/* MSTP0 */
+#define R8A7778_CLK_I2C0	30
+#define R8A7778_CLK_I2C1	29
+#define R8A7778_CLK_I2C2	28
+#define R8A7778_CLK_I2C3	27
+#define R8A7778_CLK_SCIF0	26
+#define R8A7778_CLK_SCIF1	25
+#define R8A7778_CLK_SCIF2	24
+#define R8A7778_CLK_SCIF3	23
+#define R8A7778_CLK_SCIF4	22
+#define R8A7778_CLK_SCIF5	21
+#define R8A7778_CLK_TMU0	16
+#define R8A7778_CLK_TMU1	15
+#define R8A7778_CLK_TMU2	14
+#define R8A7778_CLK_SSI0	12
+#define R8A7778_CLK_SSI1	11
+#define R8A7778_CLK_SSI2	10
+#define R8A7778_CLK_SSI3	9
+#define R8A7778_CLK_SRU		8
+#define R8A7778_CLK_HSPI	7
+
+/* MSTP1 */
+#define R8A7778_CLK_ETHER	14
+#define R8A7778_CLK_VIN0	10
+#define R8A7778_CLK_VIN1	9
+#define R8A7778_CLK_USB		0
+
+/* MSTP3 */
+#define R8A7778_CLK_MMC		31
+#define R8A7778_CLK_SDHI0	23
+#define R8A7778_CLK_SDHI1	22
+#define R8A7778_CLK_SDHI2	21
+#define R8A7778_CLK_SSI4	11
+#define R8A7778_CLK_SSI5	10
+#define R8A7778_CLK_SSI6	9
+#define R8A7778_CLK_SSI7	8
+#define R8A7778_CLK_SSI8	7
+
+/* MSTP5 */
+#define R8A7778_CLK_SRU_SRC0	31
+#define R8A7778_CLK_SRU_SRC1	30
+#define R8A7778_CLK_SRU_SRC2	29
+#define R8A7778_CLK_SRU_SRC3	28
+#define R8A7778_CLK_SRU_SRC4	27
+#define R8A7778_CLK_SRU_SRC5	26
+#define R8A7778_CLK_SRU_SRC6	25
+#define R8A7778_CLK_SRU_SRC7	24
+#define R8A7778_CLK_SRU_SRC8	23
+
+#endif /* __DT_BINDINGS_CLOCK_R8A7778_H__ */
Signature · 1 line
2.1.4
author
#5 lore raw

PATCH 3/16 ARM: shmobile: r8a7778: Common clock framework DT description

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Declares all r8a7778 clocks supported by the legacy clock framework, plus tmu2.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
[horms: only included dtsi changes]
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778.dtsi | 191 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 191 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +191 -0
index ef85339..822ba90 100644
@@ -16,6 +16,7 @@
 
 /include/ "skeleton.dtsi"
 
+#include <dt-bindings/clock/r8a7778-clock.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {

@@ -294,4 +295,194 @@
 		#size-cells = <0>;
 		status = "disabled";
 	};
+
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		/* External input clock */
+		extal_clk: extal_clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+			clock-output-names = "extal";
+		};
+
+		/* Special CPG clocks */
+		cpg_clocks: cpg_clocks at ffc80000 {
+			compatible = "renesas,r8a7778-cpg-clocks";
+			reg = <0xffc80000 0x80>;
+			#clock-cells = <1>;
+			clocks = <&extal_clk>;
+			clock-output-names = "plla", "pllb", "b",
+					     "out", "p", "s", "s1";
+		};
+
+		/* Audio clocks; frequencies are set by boards if applicable. */
+		audio_clk_a: audio_clk_a {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-output-names = "audio_clk_a";
+		};
+		audio_clk_b: audio_clk_b {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-output-names = "audio_clk_b";
+		};
+		audio_clk_c: audio_clk_c {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-output-names = "audio_clk_c";
+		};
+
+		/* Fixed ratio clocks */
+		g_clk: g_clk {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
+			#clock-cells = <0>;
+			clock-div = <12>;
+			clock-mult = <1>;
+			clock-output-names = "g";
+		};
+		i_clk: i_clk {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
+			#clock-cells = <0>;
+			clock-div = <1>;
+			clock-mult = <1>;
+			clock-output-names = "i";
+		};
+		s3_clk: s3_clk {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
+			#clock-cells = <0>;
+			clock-div = <4>;
+			clock-mult = <1>;
+			clock-output-names = "s3";
+		};
+		s4_clk: s4_clk {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
+			#clock-cells = <0>;
+			clock-div = <8>;
+			clock-mult = <1>;
+			clock-output-names = "s4";
+		};
+		z_clk: z_clk {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7778_CLK_PLLB>;
+			#clock-cells = <0>;
+			clock-div = <1>;
+			clock-mult = <1>;
+			clock-output-names = "z";
+		};
+
+		/* Gate clocks */
+		mstp0_clks: mstp0_clks at ffc80030 {
+			compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xffc80030 4>;
+			clocks = <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_S>;
+			#clock-cells = <1>;
+			clock-indices = <
+				R8A7778_CLK_I2C0 R8A7778_CLK_I2C1
+				R8A7778_CLK_I2C2 R8A7778_CLK_I2C3
+				R8A7778_CLK_SCIF0 R8A7778_CLK_SCIF1
+				R8A7778_CLK_SCIF2 R8A7778_CLK_SCIF3
+				R8A7778_CLK_SCIF4 R8A7778_CLK_SCIF5
+				R8A7778_CLK_TMU0 R8A7778_CLK_TMU1
+				R8A7778_CLK_TMU2 R8A7778_CLK_SSI0
+				R8A7778_CLK_SSI1 R8A7778_CLK_SSI2
+				R8A7778_CLK_SSI3 R8A7778_CLK_SRU
+				R8A7778_CLK_HSPI
+			>;
+			clock-output-names =
+				"i2c0", "i2c1", "i2c2", "i2c3", "scif0",
+				"scif1", "scif2", "scif3", "scif4", "scif5",
+				"tmu0", "tmu1", "tmu2", "ssi0", "ssi1",
+				"ssi2", "ssi3", "sru", "hspi";
+		};
+		mstp1_clks: mstp1_clks at ffc80034 {
+			compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xffc80034 4>, <0xffc80044 4>;
+			clocks = <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_S>,
+				 <&cpg_clocks R8A7778_CLK_S>,
+				 <&cpg_clocks R8A7778_CLK_P>;
+			#clock-cells = <1>;
+			clock-indices = <
+				R8A7778_CLK_ETHER R8A7778_CLK_VIN0
+				R8A7778_CLK_VIN1 R8A7778_CLK_USB
+			>;
+			clock-output-names =
+				"ether", "vin0", "vin1", "usb";
+		};
+		mstp3_clks: mstp3_clks at ffc8003c {
+			compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xffc8003c 4>;
+			clocks = <&s4_clk>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>;
+			#clock-cells = <1>;
+			clock-indices = <
+				R8A7778_CLK_MMC R8A7778_CLK_SDHI0
+				R8A7778_CLK_SDHI1 R8A7778_CLK_SDHI2
+				R8A7778_CLK_SSI4 R8A7778_CLK_SSI5
+				R8A7778_CLK_SSI6 R8A7778_CLK_SSI7
+				R8A7778_CLK_SSI8
+			>;
+			clock-output-names =
+				"mmc", "sdhi0", "sdhi1", "sdhi2", "ssi4",
+				"ssi5", "ssi6", "ssi7", "ssi8";
+		};
+		mstp5_clks: mstp5_clks at ffc80054 {
+			compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xffc80054 4>;
+			clocks = <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>,
+				 <&cpg_clocks R8A7778_CLK_P>;
+			#clock-cells = <1>;
+			clock-indices = <
+				R8A7778_CLK_SRU_SRC0 R8A7778_CLK_SRU_SRC1
+				R8A7778_CLK_SRU_SRC2 R8A7778_CLK_SRU_SRC3
+				R8A7778_CLK_SRU_SRC4 R8A7778_CLK_SRU_SRC5
+				R8A7778_CLK_SRU_SRC6 R8A7778_CLK_SRU_SRC7
+				R8A7778_CLK_SRU_SRC8
+			>;
+			clock-output-names =
+				"sru-src0", "sru-src1", "sru-src2",
+				"sru-src3", "sru-src4", "sru-src5",
+				"sru-src6", "sru-src7", "sru-src8";
+		};
+	};
 };
Signature · 1 line
2.1.4
author
#6 lore raw

PATCH 4/16 ARM: shmobile: r8a7778: implement SoC and board CCF support

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Disables the legacy clock framework and passes the mode bits to the CPG driver if CCF is enabled.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/mach-shmobile/board-bockw-reference.c |  2 ++
 arch/arm/mach-shmobile/setup-r8a7778.c         | 19 +++++++++++++++++++
 2 files changed, 21 insertions(+)
arch/arm/mach-shmobile/board-bockw-reference.c +2 -0
index d649ade..9a74efd 100644
@@ -36,7 +36,9 @@ static void __init bockw_init(void)
 	void __iomem *fpga;
 	void __iomem *pfc;
 
+#ifndef CONFIG_COMMON_CLK
 	r8a7778_clock_init();
+#endif
 	r8a7778_init_irq_extpin_dt(1);
 	r8a7778_add_dt_devices();
arch/arm/mach-shmobile/setup-r8a7778.c +19 -0
index cef8895..c49aa09 100644
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include <linux/clk/shmobile.h>
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <linux/irqchip/arm-gic.h>

@@ -41,6 +42,21 @@
 #include "irqs.h"
 #include "r8a7778.h"
 
+#define MODEMR 0xffcc0020
+
+#ifdef CONFIG_COMMON_CLK
+static void __init r8a7778_timer_init(void)
+{
+	u32 mode;
+	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+
+	BUG_ON(!modemr);
+	mode = ioread32(modemr);
+	iounmap(modemr);
+	r8a7778_clocks_init(mode);
+}
+#endif
+
 /* SCIF */
 #define R8A7778_SCIF(index, baseaddr, irq)			\
 static struct plat_sci_port scif##index##_platform_data = {	\

@@ -608,6 +624,9 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
 	.init_early	= shmobile_init_delay,
 	.init_irq	= r8a7778_init_irq_dt,
 	.init_late	= shmobile_init_late,
+#ifdef CONFIG_COMMON_CLK
+	.init_time	= r8a7778_timer_init,
+#endif
 	.dt_compat	= r8a7778_compat_dt,
 MACHINE_END
Signature · 1 line
2.1.4
author
#7 lore raw

PATCH 5/16 ARM: shmobile: r8a7778: add MSTP clock assignments to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Assigns clocks to i2c*, tmu*, scif*, mmcif, sdhi*, and hspi*.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +29 -0
index 822ba90..5c347e8 100644
@@ -133,6 +133,7 @@
 		compatible = "renesas,i2c-r8a7778";
 		reg = <0xffc70000 0x1000>;
 		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_I2C0>;
 		status = "disabled";
 	};
 

@@ -142,6 +143,7 @@
 		compatible = "renesas,i2c-r8a7778";
 		reg = <0xffc71000 0x1000>;
 		interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
 		status = "disabled";
 	};
 

@@ -151,6 +153,7 @@
 		compatible = "renesas,i2c-r8a7778";
 		reg = <0xffc72000 0x1000>;
 		interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
 		status = "disabled";
 	};
 

@@ -160,6 +163,7 @@
 		compatible = "renesas,i2c-r8a7778";
 		reg = <0xffc73000 0x1000>;
 		interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
 		status = "disabled";
 	};
 

@@ -169,6 +173,8 @@
 		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 33 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 34 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_TMU0>;
+		clock-names = "fck";
 
 		#renesas,channels = <3>;
 

@@ -181,6 +187,8 @@
 		interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 37 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 38 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_TMU1>;
+		clock-names = "fck";
 
 		#renesas,channels = <3>;
 

@@ -193,6 +201,8 @@
 		interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 41 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 42 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_TMU2>;
+		clock-names = "fck";
 
 		#renesas,channels = <3>;
 

@@ -203,6 +213,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe40000 0x100>;
 		interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF0>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -210,6 +222,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe41000 0x100>;
 		interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF1>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -217,6 +231,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe42000 0x100>;
 		interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF2>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -224,6 +240,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe43000 0x100>;
 		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF3>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -231,6 +249,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe44000 0x100>;
 		interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF4>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -238,6 +258,8 @@
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe45000 0x100>;
 		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_SCIF5>;
+		clock-names = "sci_ick";
 		status = "disabled";
 	};
 

@@ -245,6 +267,7 @@
 		compatible = "renesas,sh-mmcif";
 		reg = <0xffe4e000 0x100>;
 		interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7778_CLK_MMC>;
 		status = "disabled";
 	};
 

@@ -252,6 +275,7 @@
 		compatible = "renesas,sdhi-r8a7778";
 		reg = <0xffe4c000 0x100>;
 		interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7778_CLK_SDHI0>;
 		status = "disabled";
 	};
 

@@ -259,6 +283,7 @@
 		compatible = "renesas,sdhi-r8a7778";
 		reg = <0xffe4d000 0x100>;
 		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7778_CLK_SDHI1>;
 		status = "disabled";
 	};
 

@@ -266,6 +291,7 @@
 		compatible = "renesas,sdhi-r8a7778";
 		reg = <0xffe4f000 0x100>;
 		interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7778_CLK_SDHI2>;
 		status = "disabled";
 	};
 

@@ -273,6 +299,7 @@
 		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc7000 0x18>;
 		interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		status = "disabled";

@@ -282,6 +309,7 @@
 		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc8000 0x18>;
 		interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		status = "disabled";

@@ -291,6 +319,7 @@
 		compatible = "renesas,hspi-r8a7778", "renesas,hspi";
 		reg = <0xfffc6000 0x18>;
 		interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp0_clks R8A7778_CLK_HSPI>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		status = "disabled";
Signature · 1 line
2.1.4
author
#8 lore raw

PATCH 6/16 ARM: shmobile: r8a7778: add internal ethernet controller to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Internal Ethernet controller DT entry with clock information.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +11 -0
index 5c347e8..c802e72 100644
@@ -41,6 +41,17 @@
 		spi2 = &hspi2;
 	};
 
+	ether: ethernet at fde00000 {
+		compatible = "renesas,ether-r8a7778";
+		reg = <0xfde00000 0x400>;
+		interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp1_clks R8A7778_CLK_ETHER>;
+		phy-mode = "rmii";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller at fe438000 {
 		compatible = "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
Signature · 1 line
2.1.4
author
#9 lore raw

PATCH 7/16 ARM: shmobile: bockw: add USB, VIN pin descriptions to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Adds pin control info for USB host and video-in devices.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +20 -0
index 7347223..96cfcdc 100644
@@ -98,6 +98,26 @@
 		renesas,groups = "hspi0_a";
 		renesas,function = "hspi0";
 	};
+
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb1";
+	};
+
+	vin0_pins: vin0 {
+		renesas,groups = "vin0_data8", "vin0_clk";
+		renesas,function = "vin0";
+	};
+
+	vin1_pins: vin1 {
+		renesas,groups = "vin1_data8", "vin1_clk";
+		renesas,function = "vin1";
+	};
 };
 
 &sdhi0 {
Signature · 1 line
2.1.4
author
#10 lore raw

PATCH 8/16 ARM: shmobile: r8a7778 dtsi: Add Bus State Controller node

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Add a node for the Bus State Controller (BSC) on r8a7778, to which multiple external devices can be connected.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +7 -0
index c802e72..5d486b9 100644
@@ -41,6 +41,13 @@
 		spi2 = &hspi2;
 	};
 
+	bsc: bus at 1c000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0x1c000000>;
+	};
+
 	ether: ethernet at fde00000 {
 		compatible = "renesas,ether-r8a7778";
 		reg = <0xfde00000 0x400>;
Signature · 1 line
2.1.4
author
#11 lore raw

PATCH 9/16 ARM: shmobile: bockw dts: Move Ethernet node to BSC

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Move the Ethernet node to the new BSC node, as its connected to the Bus State Controller.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
[horms: dropped compat string changes as they seem out of scope]
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +2 -0
index 96cfcdc..274a1b6f 100644
@@ -45,7 +45,9 @@
 		regulator-boot-on;
 		regulator-always-on;
 	};
+};
 
+&bsc {
 	ethernet at 18300000 {
 		compatible = "smsc,lan9220", "smsc,lan9115";
 		reg = <0x18300000 0x1000>;
Signature · 1 line
2.1.4
author
#12 lore raw

PATCH 10/16 ARM: shmobile: bockw dts: set extal clock frequency

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Sets the extal clock to the frequency of the oscillator installed by default (33 MHz).

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +4 -0
index 274a1b6f..0011975 100644
@@ -61,6 +61,10 @@
 	};
 };
 
+&extal_clk {
+	clock-frequency = <33333333>;
+};
+
 &mmcif {
 	pinctrl-0 = <&mmc_pins>;
 	pinctrl-names = "default";
Signature · 1 line
2.1.4
author
#13 lore raw

PATCH 11/16 ARM: shmobile: r8a7778: common clock framework CPG driver

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Driver for the r8a7778's clocks that depend on the mode bits.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Michael Turquette <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 .../bindings/clock/renesas,r8a7778-cpg-clocks.txt  |  25 ++++
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-r8a7778.c                 | 143 +++++++++++++++++++++
 include/linux/clk/shmobile.h                       |   1 +
 4 files changed, 170 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-r8a7778.c
Documentation/devicetree/bindings/clock/renesas,r8a7778-cpg-clocks.txt new file +25 -0
new file mode 100644
index 0000000..2f3747f
@@ -0,0 +1,25 @@
+* Renesas R8A7778 Clock Pulse Generator (CPG)
+
+The CPG generates core clocks for the R8A7778. It includes two PLLs and
+several fixed ratio dividers
+
+Required Properties:
+
+  - compatible: Must be "renesas,r8a7778-cpg-clocks"
+  - reg: Base address and length of the memory resource used by the CPG
+  - #clock-cells: Must be 1
+  - clock-output-names: The names of the clocks. Supported clocks are
+    "plla", "pllb", "b", "out", "p", "s", and "s1".
+
+
+Example
+-------
+
+	cpg_clocks: cpg_clocks at ffc80000 {
+		compatible = "renesas,r8a7778-cpg-clocks";
+		reg = <0xffc80000 0x80>;
+		#clock-cells = <1>;
+		clocks = <&extal_clk>;
+		clock-output-names = "plla", "pllb", "b",
+				     "out", "p", "s", "s1";
+	};
drivers/clk/shmobile/Makefile +1 -0
index 0689d7f..97c71c8 100644
@@ -2,6 +2,7 @@ obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
 obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
 obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o
 obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
drivers/clk/shmobile/clk-r8a7778.c new file +143 -0

143 lines not on this page · raw message

include/linux/clk/shmobile.h +1 -0
index 9f8a140..63a8159 100644
@@ -16,6 +16,7 @@
 
 #include <linux/types.h>
 
+void r8a7778_clocks_init(u32 mode);
 void r8a7779_clocks_init(u32 mode);
 void rcar_gen2_clocks_init(u32 mode);
Signature · 1 line
2.1.4
author
#14 lore raw

PATCH 12/16 DT: i2c: add trivial binding for OKI ML86V7667 video decoder

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Wolfram Sang <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/i2c/trivial-devices.txt +1 -0
index aaa8325..7cbd62b 100644
@@ -77,6 +77,7 @@ nxp,pca9556		Octal SMBus and I2C registered interface
 nxp,pca9557		8-bit I2C-bus and SMBus I/O port with reset
 nxp,pcf8563		Real-time clock/calendar
 nxp,pcf85063		Tiny Real-Time Clock
+oki,ml86v7667		OKI ML86V7667 video decoder
 ovti,ov5642		OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
 pericom,pt7c4338	Real-time Clock Module
 plx,pex8648		48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
Signature · 1 line
2.1.4
author
#15 lore raw

PATCH 13/16 ARM: shmobile: bockw: add devices hooked up to i2c0 to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Cameras, RTC, and ak4643 sound codec.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Acked-by Laurent Pinchart <[email protected]>
Acked-by Wolfram Sang <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +25 -0
index 0011975..646383a 100644
@@ -65,6 +65,31 @@
 	clock-frequency = <33333333>;
 };
 
+&i2c0 {
+	status = "okay";
+
+	ak4643: sound-codec at 12 {
+		compatible = "asahi-kasei,ak4643";
+		#sound-dai-cells = <0>;
+		reg = <0x12>;
+	};
+
+	camera at 41 {
+		compatible = "oki,ml86v7667";
+		reg = <0x41>;
+	};
+
+	camera at 43 {
+		compatible = "oki,ml86v7667";
+		reg = <0x43>;
+	};
+
+	rx8581: rtc at 51 {
+		compatible = "epson,rx8581";
+		reg = <0x51>;
+	};
+};
+
 &mmcif {
 	pinctrl-0 = <&mmc_pins>;
 	pinctrl-names = "default";
Signature · 1 line
2.1.4
author
#16 lore raw

PATCH 14/16 ARM: shmobile: r8a7778: add sound to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Adds an entry for an R-Car Gen. 1 sound controller.

Signed-off-by Ulrich Hecht <[email protected]>
[horms: Removed undocumented "renesas,rcar_sound" compat string]
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778.dtsi | 55 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
arch/arm/boot/dts/r8a7778.dtsi +55 -0
index 5d486b9..868f973 100644
@@ -227,6 +227,61 @@
 		status = "disabled";
 	};
 
+	rcar_sound: sound at ffd90000 {
+		#sound-dai-cells = <1>;
+		compatible = "renesas,rcar_sound-r8a7778", "renesas,rcar_sound-gen1";
+		reg =	<0xffd90000 0x1000>,	/* SRU */
+			<0xffd91000 0x1240>,	/* SSI */
+			<0xfffe0000 0x24>;	/* ADG */
+		clocks = <&mstp3_clks R8A7778_CLK_SSI8>,
+			<&mstp3_clks R8A7778_CLK_SSI7>,
+			<&mstp3_clks R8A7778_CLK_SSI6>,
+			<&mstp3_clks R8A7778_CLK_SSI5>,
+			<&mstp3_clks R8A7778_CLK_SSI4>,
+			<&mstp0_clks R8A7778_CLK_SSI3>,
+			<&mstp0_clks R8A7778_CLK_SSI2>,
+			<&mstp0_clks R8A7778_CLK_SSI1>,
+			<&mstp0_clks R8A7778_CLK_SSI0>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC8>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC7>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC6>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC5>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC4>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC3>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC2>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC1>,
+			<&mstp5_clks R8A7778_CLK_SRU_SRC0>,
+			<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
+			<&cpg_clocks R8A7778_CLK_S1>;
+		clock-names = "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4",
+			"ssi.3", "ssi.2", "ssi.1", "ssi.0",
+			"src.8", "src.7", "src.6", "src.5", "src.4",
+			"src.3", "src.2", "src.1", "src.0",
+			"clk_a", "clk_b", "clk_c", "clk_i";
+
+		status = "disabled";
+
+		rcar_sound,src {
+			src3: src at 3 { };
+			src4: src at 4 { };
+			src5: src at 5 { };
+			src6: src at 6 { };
+			src7: src at 7 { };
+			src8: src at 8 { };
+			src9: src at 9 { };
+		};
+
+		rcar_sound,ssi {
+			ssi3: ssi at 3 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi4: ssi at 4 { interrupts = <0 0x85 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi5: ssi at 5 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi6: ssi at 6 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi7: ssi at 7 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi8: ssi at 8 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+			ssi9: ssi at 9 { interrupts = <0 0x86 IRQ_TYPE_LEVEL_HIGH>; };
+		};
+	};
+
 	scif0: serial at ffe40000 {
 		compatible = "renesas,scif-r8a7778", "renesas,scif";
 		reg = <0xffe40000 0x100>;
Signature · 1 line
2.1.4
author
#17 lore raw

PATCH 15/16 ARM: shmobile: bockw: add sound to DT

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Adds sound card using the ak4643 codec.

Signed-off-by Ulrich Hecht <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
arch/arm/boot/dts/r8a7778-bockw.dts +17 -0
index 646383a..787fa6f 100644
@@ -45,6 +45,23 @@
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	sound {
+		compatible = "simple-audio-card";
+
+		simple-audio-card,format = "left_j";
+		simple-audio-card,bitclock-master = <&sndcodec>;
+		simple-audio-card,frame-master = <&sndcodec>;
+
+		sndcpu: simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+		};
+
+		sndcodec: simple-audio-card,codec {
+			sound-dai = <&ak4643>;
+			system-clock-frequency = <11289600>;
+		};
+	};
 };
 
 &bsc {
Signature · 1 line
2.1.4
author
#18 lore raw

PATCH 16/16 ARM: shmobile: r8a7778: enable multiplatform target

In reply to Simon Horman

From: Ulrich Hecht <[email protected]>

Adds config option and enables DTB building.

Signed-off-by Ulrich Hecht <[email protected]>
Acked-by Geert Uytterhoeven <[email protected]>
Signed-off-by Simon Horman <[email protected]>
---
 arch/arm/boot/dts/Makefile     | 1 +
 arch/arm/mach-shmobile/Kconfig | 4 ++++
 2 files changed, 5 insertions(+)
arch/arm/boot/dts/Makefile +1 -0
index a1c776b..c467731 100644
@@ -478,6 +478,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
 	r7s72100-genmai.dtb \
 	r8a73a4-ape6evm.dtb \
 	r8a7740-armadillo800eva.dtb \
+	r8a7778-bockw.dtb \
 	r8a7779-marzen.dtb \
 	r8a7790-lager.dtb \
 	r8a7791-henninger.dtb \
arch/arm/mach-shmobile/Kconfig +4 -0
index 2f36c85..2fb072e 100644
@@ -62,6 +62,10 @@ config ARCH_R8A7740
 	select ARCH_RMOBILE
 	select RENESAS_INTC_IRQPIN
 
+config ARCH_R8A7778
+	bool "R-Car M1A (R8A77781)"
+	select ARCH_RCAR_GEN1
+
 config ARCH_R8A7779
 	bool "R-Car H1 (R8A77790)"
 	select ARCH_RCAR_GEN1
Signature · 1 line
2.1.4
maintainer
#19 lore raw
In reply to Simon Horman
Quoted 4 lines · On Thursday 05 March 2015 10:58:14 Simon Horman wrote:

Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

* Add CCF and them multiplatform support to r8a7778 SoC and its bockw board.

I don't see Mike Turquette on Cc for the CCF driver here, or in the Reviewed-by/Acked-by list for the relevant patches.

Has he given his ok for the patches to be merged through arm-soc?

Arnd

#20 lore raw

Hi Arnd,

Quoted 10 lines · Arnd Bergmann
Quoted 4 lines · On Thursday 05 March 2015 10:58:14 Simon Horman wrote:

Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

* Add CCF and them multiplatform support to r8a7778 SoC and its bockw board.

I don't see Mike Turquette on Cc for the CCF driver here, or in the Reviewed-by/Acked-by list for the relevant patches.

Has he given his ok for the patches to be merged through arm-soc?

I think you overlooked Mike's ack:
https://git.kernel.org/cgit/linux/kernel/git/horms/renesas.git/commit/?id=6232c51cb370919b116e0aea38d12aa33aae2fa9

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

maintainer
#21 lore raw
Quoted 8 lines · On Wednesday 11 March 2015 16:01:47 Geert Uytterhoeven wrote:
Quoted 6 lines · Arnd Bergmann
Quoted 4 lines · On Thursday 05 March 2015 10:58:14 Simon Horman wrote:

Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

* Add CCF and them multiplatform support to r8a7778 SoC and its bockw board.

Quoted 7 lines
Quoted 4 lines

I don't see Mike Turquette on Cc for the CCF driver here, or in the Reviewed-by/Acked-by list for the relevant patches.

Has he given his ok for the patches to be merged through arm-soc?

I think you overlooked Mike's ack:
https://git.kernel.org/cgit/linux/kernel/git/horms/renesas.git/commit/?id=6232c51cb370919b116e0aea38d12aa33aae2fa9

I clearly did, yes.

Sorry for my mistake, pulled into next/multiplatform now.

Arnd

#22 lore raw
Quoted 12 lines · Arnd Bergmann
Quoted 11 lines · On Wednesday 11 March 2015 16:01:47 Geert Uytterhoeven wrote:
Quoted 9 lines · Arnd Bergmann
Quoted 4 lines · On Thursday 05 March 2015 10:58:14 Simon Horman wrote:

Renesas ARM Based SoC r8a7778 CCF and Multiplatform Updates for v4.1

* Add CCF and them multiplatform support to r8a7778 SoC and its bockw board.

I don't see Mike Turquette on Cc for the CCF driver here, or in the Reviewed-by/Acked-by list for the relevant patches.

Quoted 8 lines
Quoted 4 lines
Quoted 1 line

Has he given his ok for the patches to be merged through arm-soc?

I think you overlooked Mike's ack:
https://git.kernel.org/cgit/linux/kernel/git/horms/renesas.git/commit/?id=6232c51cb370919b116e0aea38d12aa33aae2fa9

I clearly did, yes.

Sorry for my mistake, pulled into next/multiplatform now.

Thanks!

One step closer to multiplatform support everywhere :)