Skip to contentSkip to conversation

ARM: shmobile: Correct SYSCIER values

PATCH New Simon Horman 3 participants 6 messages Mar 12, 2015

Subsystems (4)
lore
Share & tools
lore
#0 lore raw

cover ARM: shmobile: Correct SYSCIER values

Hi,

this short series corrects the SYSCIER value used on the r9a7790 and r8a7791 SoCs.

I am not aware of any run-time effect of these changes.

This series is based on renesas-devel-20150312-v4.0-rc3

Simon Horman (2):
ARM: shmobile: r8a7790: Correct SYSCIER value
ARM: shmobile: r8a7791: Correct SYSCIER value

 arch/arm/mach-shmobile/pm-r8a7790.c | 2 +-
 arch/arm/mach-shmobile/pm-r8a7791.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/2 ARM: shmobile: r8a7790: Correct SYSCIER value

Set the SYSCIER as per the values indicated in the documentation. The value previously used appears to been copied from the r8a7779 implementation but on closer inspection is not correct for the r8a7790.

Fixes a48f165509c1 ("ARM: shmobile: r8a7790 SYSC setup code")
---
 arch/arm/mach-shmobile/pm-r8a7790.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-shmobile/pm-r8a7790.c +1 -1
index 80e8d95..23b61f1 100644
@@ -38,7 +38,7 @@ static void __init r8a7790_sysc_init(void)
 	void __iomem *base = rcar_sysc_init(0xe6180000);
 
 	/* enable all interrupt sources, but do not use interrupt handler */
-	iowrite32(0x0131000e, base + SYSCIER);
+	iowrite32(0x013111ef, base + SYSCIER);
 	iowrite32(0, base + SYSCIMR);
 }
 
Signature · 1 line
2.1.4
#2 lore raw

PATCH 2/2 ARM: shmobile: r8a7791: Correct SYSCIER value

In reply to Simon Horman

Set the SYSCIER as per the values indicated in the documentation. The value previously used appears to been copied from the r8a7779 implementation but on closer inspection is not correct for the r8a7791.

Fixes 5f6108bb9643 ("ARM: shmobile: r8a7791 SYSC setup code")
---
 arch/arm/mach-shmobile/pm-r8a7791.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/mach-shmobile/pm-r8a7791.c +1 -1
index 25f107b..f7cfb3b 100644
@@ -33,7 +33,7 @@ static void __init r8a7791_sysc_init(void)
 	void __iomem *base = rcar_sysc_init(0xe6180000);
 
 	/* enable all interrupt sources, but do not use interrupt handler */
-	iowrite32(0x0131000e, base + SYSCIER);
+	iowrite32(0x00111003, base + SYSCIER);
 	iowrite32(0, base + SYSCIMR);
 }
 
Signature · 1 line
2.1.4
#3 lore raw

cover ARM: shmobile: Correct SYSCIER values

In reply to Simon Horman

Hi Simon,

Quoted 2 lines · Simon Horman

this short series corrects the SYSCIER value used on the r9a7790 and r8a7791 SoCs.

Thanks!

Quoted 1 line

I am not aware of any run-time effect of these changes.

They only matter when powering up/down SYSC PM Domains, which is not yet implemented for R-Car Gen2.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#4 lore raw

cover ARM: shmobile: Correct SYSCIER values

Quoted 7 lines · Geert Uytterhoeven

Hi Simon,

Quoted 2 lines · Simon Horman

this short series corrects the SYSCIER value used on the r9a7790 and r8a7791 SoCs.

Quoted 8 lines

Thanks!

Quoted 1 line

I am not aware of any run-time effect of these changes.

They only matter when powering up/down SYSC PM Domains, which is not yet implemented for R-Car Gen2.

Thanks, good to know.

FWIW the values in these patches are the ones that you supplied in another email thread. However, I did verify them against (my reading of) the documentation.

#5 lore raw

cover ARM: shmobile: Correct SYSCIER values

Hi Simon,

Quoted 3 lines · Simon Horman

FWIW the values in these patches are the ones that you supplied in another email thread. However, I did verify them against (my reading of) the documentation.

We could introduce symbols for them. I don't think it's worth doing that at this point, as ideally these values should come from DT.

If you disagree, feel free to use what I was carrying in my local tree to get a better understanding (needs some consolidation):

/* SYSC Interrupt Status/Status Clear/Enable/Mask Register */ /* R-Car H1 */

#define SYSCI_IMP               BIT(24) /* IMP-X3 */
#define SYSCI_VDP               BIT(21) /* VDP1 */
#define SYSCI_SGX               BIT(20) /* SGX543 MP2 */
#define SYSCI_SH4A              BIT(16) /* SH-4A (Not documented on H1) */
#define SYSCI_ARM3              BIT(3)  /* ARM3 */
#define SYSCI_ARM2              BIT(2)  /* ARM2 */
#define SYSCI_ARM1              BIT(1)  /* ARM1 */

/* R-Car H2 */

#define SYSCI_IMP               BIT(24) /* IMP-X4 */
#define SYSCI_CA7_SCU           BIT(21) /* CA7-SCU */
#define SYSCI_RGX               BIT(20) /* RGX */
#define SYSCI_SH4A              BIT(16) /* SH-4A */
#define SYSCI_CA15_SCU          BIT(12) /* CA15-SCU */
#define SYSCI_CA7_CPU(i)        BIT(5 + (i))    /* CA7-CPUi */
#define SYSCI_CA15_CPU(i)       BIT(i)  /* CA15-CPUi */

/* R-Car M2-W/M2-N */

#define SYSCI_SGX               BIT(20) /* SGX */
#define SYSCI_SH4A              BIT(16) /* SH-4A */
#define SYSCI_CA15_SCU          BIT(12) /* CA15-SCU */
#define SYSCI_CA15_CPU(i)       BIT(i)  /* CA15-CPUi */

/* R-Car V2H */

#define SYSCI_IMP               BIT(24) /* IMP-X4 */
#define SYSCI_SGX               BIT(20) /* SGX */
#define SYSCI_CA15_SCU          BIT(12) /* CA15-SCU */
#define SYSCI_CA15_CPU(i)       BIT(i)  /* CA15-CPUi */

/* R-Car E2 */

#define SYSCI_CA7_SCU           BIT(21) /* CA7-SCU */
#define SYSCI_SGX               BIT(20) /* SGX */
#define SYSCI_SH4A              BIT(16) /* SH-4A */
#define SYSCI_CA7_CPU(i)        BIT(5 + (i))    /* CA7-CPUi */

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds