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ARM: shmobile: Add INTC-SYS clock to device tree

PATCH New Geert Uytterhoeven 4 participants 11 messages Mar 18, 2015 – Mar 26, 2015

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#0 lore raw

cover ARM: shmobile: Add INTC-SYS clock to device tree

	Hi,

This RFC patch series adds the INTC-SYS clock to the device tree on SoCs that have such a clock (r8a73a4 and r8a779x). This clock is the module clock for the GIC, and thus must not be disabled, as that would cause a lock-up.

Currently, the GIC driver cannot enable the module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

I'm not sure about the parent clock of INTC-SYS, as this doesn't seem to be documented in the SoC's user manuals. However, on r8a7740 it is documented to be the ZSA (AXI) clock, so I used the ZS clock. The actual clock and rate don't matter much, as the parent clock can't be disabled.

As usual when involving clocks, the DTS changes depend stricly on the driver change. Else the clock will be disabled as assumed unused, breaking the boot.

The DTS changes depend on the series "[PATCH 0/7] ARM: shmobile: Add IRQC clock to device tree" I've just sent.

This was tested on r8a73a4/ape6evm and r8a7791/koelsch.

Thanks for your comments!

Geert Uytterhoeven (5):
[RFC] clk: shmobile: mstp: Never disable INTC-SYS [RFC] ARM: shmobile: r8a73a4: Add INTC-SYS clock to device tree [RFC] ARM: shmobile: r8a7790: Add INTC-SYS clock to device tree [RFC] ARM: shmobile: r8a7791: Add INTC-SYS clock to device tree [RFC] ARM: shmobile: r8a7794: Add INTC-SYS clock to device tree

 arch/arm/boot/dts/r8a73a4.dtsi            | 11 +++++++----
 arch/arm/boot/dts/r8a7790.dtsi            |  7 ++++---
 arch/arm/boot/dts/r8a7791.dtsi            |  7 ++++---
 arch/arm/boot/dts/r8a7794.dtsi            |  7 ++++---
 drivers/clk/shmobile/clk-mstp.c           |  6 ++++++
 include/dt-bindings/clock/r8a73a4-clock.h |  1 +
 include/dt-bindings/clock/r8a7790-clock.h |  1 +
 include/dt-bindings/clock/r8a7791-clock.h |  1 +
 include/dt-bindings/clock/r8a7794-clock.h |  1 +
 9 files changed, 29 insertions(+), 13 deletions(-)
Signature · 12 lines
1.9.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds
#1 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

INTC-SYS is the module clock for the GIC. Accessing the GIC while it is disabled causes:

    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000

Currently, the GIC driver cannot enable its module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

---
 drivers/clk/shmobile/clk-mstp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/shmobile/clk-mstp.c +6 -0
index 2d2fe773ac8168f9..742af84735a07450 100644
@@ -62,6 +62,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
 	unsigned int i;
 	u32 value;
 
+	/* INTC-SYS is the module clock of the GIC, and must not be disabled */
+	if (!enable && !strcmp(__clk_get_name(hw->clk), "intc-sys")) {
+		pr_debug("MSTP %pC skipping disable\n", hw->clk);
+		return 0;
+	}
+
 	spin_lock_irqsave(&group->lock, flags);
 
 	value = clk_readl(group->smstpcr);
Signature · 1 line
1.9.1
#2 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

Quoting Geert Uytterhoeven (2015-03-18 12:16:00)

Quoted 30 lines

INTC-SYS is the module clock for the GIC. Accessing the GIC while it is disabled causes:

    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000

Currently, the GIC driver cannot enable its module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

---
 drivers/clk/shmobile/clk-mstp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/shmobile/clk-mstp.c +0 -0
index 2d2fe773ac8168f9..742af84735a07450 100644

drivers/clk/shmobile/clk-mstp.c static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) · line 69

Quoted 8 lines
drivers/clk/shmobile/clk-mstp.c +5 -0
@@ -62,6 +62,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
        unsigned int i;
        u32 value;
 
+       /* INTC-SYS is the module clock of the GIC, and must not be disabled */
+       if (!enable && !strcmp(__clk_get_name(hw->clk), "intc-sys")) {
+               pr_debug("MSTP %pC skipping disable\n", hw->clk);
+               return 0;
+       }

Hello Geert,

This is a bit ugly for three reasons:

1) we hit this code for every MSTP clock {en,dis}able call
2) __clk_get_name is kind of gross
3) the enable_count will not be correct. It will be zero but the clock will actually be enabled

Have you considered Lee's series to express these always-on clocks in DT? See,

https://lkml.org/lkml/2015/2/24/495

Regards,
Mike

Quoted 7 lines
drivers/clk/shmobile/clk-mstp.c +1 -0
+
        spin_lock_irqsave(&group->lock, flags);
 
        value = clk_readl(group->smstpcr);
Signature · 1 line
1.9.1
#3 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

Hi Mike,

Quoted 42 lines · Michael Turquette

Quoting Geert Uytterhoeven (2015-03-18 12:16:00)

Quoted 30 lines

INTC-SYS is the module clock for the GIC. Accessing the GIC while it is disabled causes:

    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000

Currently, the GIC driver cannot enable its module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

---
 drivers/clk/shmobile/clk-mstp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/shmobile/clk-mstp.c +0 -0
index 2d2fe773ac8168f9..742af84735a07450 100644

drivers/clk/shmobile/clk-mstp.c static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) · line 69

Quoted 8 lines
drivers/clk/shmobile/clk-mstp.c +5 -0
@@ -62,6 +62,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
        unsigned int i;
        u32 value;
 
+       /* INTC-SYS is the module clock of the GIC, and must not be disabled */
+       if (!enable && !strcmp(__clk_get_name(hw->clk), "intc-sys")) {
+               pr_debug("MSTP %pC skipping disable\n", hw->clk);
+               return 0;
+       }

Hello Geert,

Quoted 4 lines

This is a bit ugly for three reasons:

1) we hit this code for every MSTP clock {en,dis}able call
2) __clk_get_name is kind of gross

Sure, this is ugly. That's why this was an RFC.
I was mainly trying to trigger a reply from the GIC maintainers ;-)

Quoted 2 lines

3) the enable_count will not be correct. It will be zero but the clock will actually be enabled

That's indeed something I didn't take into account. Will change to just enabling the clock from the clock driver.

Quoted 4 lines

Have you considered Lee's series to express these always-on clocks in DT? See,

https://lkml.org/lkml/2015/2/24/495

That solution doesn't apply here, as we do have a correct description of the hardware
in DT (after the other patches in the series, like e.g. (courtesy for Lee) http://permalink.gmane.org/gmane.linux.power-management.general/58123).

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#4 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

Quoted 46 lines · Geert Uytterhoeven

Hi Mike,

Quoted 42 lines · Michael Turquette

Quoting Geert Uytterhoeven (2015-03-18 12:16:00)

Quoted 30 lines

INTC-SYS is the module clock for the GIC. Accessing the GIC while it is disabled causes:

    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000

Currently, the GIC driver cannot enable its module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

---
 drivers/clk/shmobile/clk-mstp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/shmobile/clk-mstp.c +0 -0
index 2d2fe773ac8168f9..742af84735a07450 100644

drivers/clk/shmobile/clk-mstp.c static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) · line 69

Quoted 8 lines
drivers/clk/shmobile/clk-mstp.c +5 -0
@@ -62,6 +62,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
        unsigned int i;
        u32 value;
 
+       /* INTC-SYS is the module clock of the GIC, and must not be disabled */
+       if (!enable && !strcmp(__clk_get_name(hw->clk), "intc-sys")) {
+               pr_debug("MSTP %pC skipping disable\n", hw->clk);
+               return 0;
+       }

Hello Geert,

Quoted 7 lines
Quoted 4 lines

This is a bit ugly for three reasons:

1) we hit this code for every MSTP clock {en,dis}able call
2) __clk_get_name is kind of gross

Sure, this is ugly. That's why this was an RFC.
I was mainly trying to trigger a reply from the GIC maintainers ;-)

Given that I'm the only GIC-related person on the cc list, I suppose this is puts me on the spot.

This doesn't touch the GIC code at all, so I don't feel completely adverse to it. My only gripe is with the undocumented clock property in the binding, and that leads to two questions:

- the GIC architecture doesn't mention a clock at all, so that's a Renesas special. Do we want to have a vendor-specific property for this? Or does it belong elsewhere?
- alternatively, do we want the core GIC code to deal with this? In which case, how do we express the policy?

Thanks,

	M.
Quoted 29 lines
Quoted 2 lines

3) the enable_count will not be correct. It will be zero but the clock will actually be enabled

That's indeed something I didn't take into account. Will change to just enabling the clock from the clock driver.

Quoted 4 lines

Have you considered Lee's series to express these always-on clocks in DT? See,

https://lkml.org/lkml/2015/2/24/495

That solution doesn't apply here, as we do have a correct description of the hardware
in DT (after the other patches in the series, like e.g. (courtesy for Lee) http://permalink.gmane.org/gmane.linux.power-management.general/58123).

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Signature · 1 line
Jazz is not dead. It just smells funny...
#5 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

Hi Marc,

Quoted 53 lines · Marc Zyngier
Quoted 44 lines · Geert Uytterhoeven
Quoted 42 lines · Michael Turquette

Quoting Geert Uytterhoeven (2015-03-18 12:16:00)

Quoted 30 lines

INTC-SYS is the module clock for the GIC. Accessing the GIC while it is disabled causes:

    Unhandled fault: asynchronous external abort (0x1211) at 0x00000000

Currently, the GIC driver cannot enable its module clock for several reasons:
- It does not use a platform device, so Runtime PM is not an option,
- gic_of_init() runs before any clocks are registered, so it cannot explicitly enable the clock,
- gic_of_init() cannot return -EPROBE_DEFER, as IRQCHIP_DECLARE() doesn't support deferred probing.

Hence we have to keep on relying on the boot loader for enabling the module clock.

To prevent the module clock from being disabled when the CCF core thinks it is unused, and thus causing a system lock-up, add a quirk to the MSTP clock driver to make sure the module clock is never disabled.

---
 drivers/clk/shmobile/clk-mstp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/shmobile/clk-mstp.c +0 -0
index 2d2fe773ac8168f9..742af84735a07450 100644

drivers/clk/shmobile/clk-mstp.c static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) · line 69

Quoted 8 lines
drivers/clk/shmobile/clk-mstp.c +5 -0
@@ -62,6 +62,12 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
        unsigned int i;
        u32 value;
 
+       /* INTC-SYS is the module clock of the GIC, and must not be disabled */
+       if (!enable && !strcmp(__clk_get_name(hw->clk), "intc-sys")) {
+               pr_debug("MSTP %pC skipping disable\n", hw->clk);
+               return 0;
+       }

Hello Geert,

Quoted 7 lines
Quoted 4 lines

This is a bit ugly for three reasons:

1) we hit this code for every MSTP clock {en,dis}able call
2) __clk_get_name is kind of gross

Sure, this is ugly. That's why this was an RFC.
I was mainly trying to trigger a reply from the GIC maintainers ;-)

Quoted 6 lines

Given that I'm the only GIC-related person on the cc list, I suppose this is puts me on the spot.

adverse to it. My only gripe is with the undocumented clock property in the binding, and that leads to two questions:
This doesn't touch the GIC code at all, so I don't feel completely

The reason no GIC code is touched (for now), is that it's non-trivial to fix the GIC driver to handle this.

Quoted 5 lines

adverse to it. My only gripe is with the undocumented clock property in the binding, and that leads to two questions:
- the GIC architecture doesn't mention a clock at all, so that's a Renesas special. Do we want to have a vendor-specific property for this? Or does it belong elsewhere?

Apart from being implemented using synchronous logic and thus using a clock signal internally, the GIC and its driver don't care about this clock.

When an existing IP module that doesn't care about clocks becomes reused on a new SoC, and it now ends up being part of a "PM Domain" (e.g. a Power Domain or Clock Domain, or both), this "PM Domain" is a feature of the platform, not of the IP module itself (cfr. "(Existing) Device Driver" in [1]; GIC falls in the same category as the Thermal Module example). Hence I don't think it's necessary to mention this in the ARM GIC binding.

Quoted 2 lines

- alternatively, do we want the core GIC code to deal with this? In which case, how do we express the policy?

The proper way to handle this automatically is to add Runtime PM support to the driver. However, this requires using a platform device.

I would like to add the clock and GIC dependency on the clock in the DTS now, for reasons of DTS stability. But that means I need a temporary workaround to avoid the clock from being disabled, until the GIC driver handles this.

I don't expect a fix for the GIC code to just show up magically. I just wanted you to be aware of the problem. GIC is not the only problematic module here, there are others, cfr. the last slide of [2].

Thanks!

References:
Presentations at ELC2015:
[1] "Last one out, turn off the lights", by Geert Uytterhoeven
(http://events.linuxfoundation.org/sites/events/files/slides/Last_One_Out_Turn_Off_The_Lights_Handouts.pdf)
[2] "Introduction to Kernel Power Managemen", by Kevin Hilman (still
to appear at http://events.linuxfoundation.org/events/embedded-linux-conference/program/slides)

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#6 lore raw

PATCH 1/5 clk: shmobile: mstp: Never disable INTC-SYS

Hi Geert,

On 25/03/15 21:19, Geert Uytterhoeven wrote:

[...]

Quoted 6 lines
Quoted 3 lines

adverse to it. My only gripe is with the undocumented clock property in the binding, and that leads to two questions:
This doesn't touch the GIC code at all, so I don't feel completely

The reason no GIC code is touched (for now), is that it's non-trivial to fix the GIC driver to handle this.

Indeed. The interrupt controller is basically the first device to be activated in the life of the system, and I can see a nasty chicken and egg problem creeping up if you're trying to do clock management in a generic way at that level.

Quoted 22 lines
Quoted 5 lines

adverse to it. My only gripe is with the undocumented clock property in the binding, and that leads to two questions:
- the GIC architecture doesn't mention a clock at all, so that's a Renesas special. Do we want to have a vendor-specific property for this? Or does it belong elsewhere?

Apart from being implemented using synchronous logic and thus using a clock signal internally, the GIC and its driver don't care about this clock.

When an existing IP module that doesn't care about clocks becomes reused on a new SoC, and it now ends up being part of a "PM Domain" (e.g. a Power Domain or Clock Domain, or both), this "PM Domain" is a feature of the platform, not of the IP module itself (cfr. "(Existing) Device Driver" in [1]; GIC falls in the same category as the Thermal Module example). Hence I don't think it's necessary to mention this in the ARM GIC binding.

Quoted 2 lines

- alternatively, do we want the core GIC code to deal with this? In which case, how do we express the policy?

The proper way to handle this automatically is to add Runtime PM support to the driver. However, this requires using a platform device.

Quoted 7 lines

I would like to add the clock and GIC dependency on the clock in the DTS now, for reasons of DTS stability. But that means I need a temporary workaround to avoid the clock from being disabled, until the GIC driver handles this.

I don't expect a fix for the GIC code to just show up magically. I just wanted you to be aware of the problem. GIC is not the only problematic module here, there are others, cfr. the last slide of [2].

As long as there is an agreement from the DT people on the presence of that extra property in the GIC node, I'm happy with that. I'd like it to be documented though.

Thanks,

	M.
Signature · 1 line
Jazz is not dead. It just smells funny...
#7 lore raw

PATCH 2/5 ARM: shmobile: r8a73a4: Add INTC-SYS clock to device tree

In reply to Geert Uytterhoeven

Link the ARM GIC to the INTC-SYS module clock, so it can be power managed using that clock in the future.

Note that currently the GIC driver doesn't support module clocks nor Runtime PM.

---
 arch/arm/boot/dts/r8a73a4.dtsi            | 11 +++++++----
 include/dt-bindings/clock/r8a73a4-clock.h |  1 +
 2 files changed, 8 insertions(+), 4 deletions(-)
arch/arm/boot/dts/r8a73a4.dtsi +7 -4
index 7ee22a41c6c97488..76618a911b9a4e7a 100644
@@ -443,6 +443,7 @@
 			<0 0xf1004000 0 0x2000>,
 			<0 0xf1006000 0 0x2000>;
 		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
 	};
 
 	bsc: bus at fec10000 {
@@ -726,16 +727,18 @@
 		mstp4_clks: mstp4_clks at e6150140 {
 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
-			clocks = <&main_div2_clk>, <&main_div2_clk>,
+			clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
+				 <&main_div2_clk>,
 				 <&cpg_clocks R8A73A4_CLK_HP>,
 				 <&cpg_clocks R8A73A4_CLK_HP>;
 			#clock-cells = <1>;
 			clock-indices = <
-				R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
-				R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
+				R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS
+				R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4
+				R8A73A4_CLK_IIC3
 			>;
 			clock-output-names =
-				"irqc", "iic5", "iic4", "iic3";
+				"irqc", "intc-sys", "iic5", "iic4", "iic3";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a73a4-clock.h +1 -0
index dd11ecdf837e8e65..4b36681572570c15 100644
@@ -54,6 +54,7 @@
 #define R8A73A4_CLK_IIC3	11
 #define R8A73A4_CLK_IIC4	10
 #define R8A73A4_CLK_IIC5	9
+#define R8A73A4_CLK_INTC_SYS	8
 #define R8A73A4_CLK_IRQC	7
 
 /* MSTP5 */
Signature · 1 line
1.9.1
#8 lore raw

PATCH 3/5 ARM: shmobile: r8a7790: Add INTC-SYS clock to device tree

In reply to Geert Uytterhoeven

Link the ARM GIC to the INTC-SYS module clock, so it can be power managed using that clock in the future.

Note that currently the GIC driver doesn't support module clocks nor Runtime PM.

---
 arch/arm/boot/dts/r8a7790.dtsi            | 7 ++++---
 include/dt-bindings/clock/r8a7790-clock.h | 1 +
 2 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7790.dtsi +4 -3
index a81cfda0872fc30a..d4210f5b692a42b5 100644
@@ -122,6 +122,7 @@
 			<0 0xf1004000 0 0x2000>,
 			<0 0xf1006000 0 0x2000>;
 		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+		clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
 	};
 
 	gpio0: gpio at e6050000 {
@@ -1162,10 +1163,10 @@
 		mstp4_clks: mstp4_clks at e6150140 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
-			clocks = <&cp_clk>;
+			clocks = <&cp_clk>, <&zs_clk>;
 			#clock-cells = <1>;
-			clock-indices = <R8A7790_CLK_IRQC>;
-			clock-output-names = "irqc";
+			clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
+			clock-output-names = "irqc", "intc-sys";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7790-clock.h +1 -0
index ff7ca3584e169589..49419ee93aed825e 100644
@@ -81,6 +81,7 @@
 
 /* MSTP4 */
 #define R8A7790_CLK_IRQC		7
+#define R8A7790_CLK_INTC_SYS		8
 
 /* MSTP5 */
 #define R8A7790_CLK_AUDIO_DMAC1		1
Signature · 1 line
1.9.1
#9 lore raw

PATCH 4/5 ARM: shmobile: r8a7791: Add INTC-SYS clock to device tree

In reply to Geert Uytterhoeven

Link the ARM GIC to the INTC-SYS module clock, so it can be power managed using that clock in the future.

Note that currently the GIC driver doesn't support module clocks nor Runtime PM.

---
 arch/arm/boot/dts/r8a7791.dtsi            | 7 ++++---
 include/dt-bindings/clock/r8a7791-clock.h | 1 +
 2 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7791.dtsi +4 -3
index 20ab7668088493b9..9191acce98a6eeb2 100644
@@ -79,6 +79,7 @@
 			<0 0xf1004000 0 0x2000>,
 			<0 0xf1006000 0 0x2000>;
 		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+		clocks = <&mstp4_clks R8A7791_CLK_INTC_SYS>;
 	};
 
 	gpio0: gpio at e6050000 {
@@ -1164,10 +1165,10 @@
 		mstp4_clks: mstp4_clks at e6150140 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
-			clocks = <&cp_clk>;
+			clocks = <&cp_clk>, <&zs_clk>;
 			#clock-cells = <1>;
-			clock-indices = <R8A7791_CLK_IRQC>;
-			clock-output-names = "irqc";
+			clock-indices = <R8A7791_CLK_IRQC R8A7791_CLK_INTC_SYS>;
+			clock-output-names = "irqc", "intc-sys";
 		};
 		mstp5_clks: mstp5_clks at e6150144 {
 			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7791-clock.h +1 -0
index 402268384b99093c..102b47a797116dce 100644
@@ -72,6 +72,7 @@
 
 /* MSTP4 */
 #define R8A7791_CLK_IRQC		7
+#define R8A7791_CLK_INTC_SYS		8
 
 /* MSTP5 */
 #define R8A7791_CLK_AUDIO_DMAC1		1
Signature · 1 line
1.9.1
#10 lore raw

PATCH 5/5 ARM: shmobile: r8a7794: Add INTC-SYS clock to device tree

In reply to Geert Uytterhoeven

Link the ARM GIC to the INTC-SYS module clock, so it can be power managed using that clock in the future.

Note that currently the GIC driver doesn't support module clocks nor Runtime PM.

---
 arch/arm/boot/dts/r8a7794.dtsi            | 7 ++++---
 include/dt-bindings/clock/r8a7794-clock.h | 1 +
 2 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7794.dtsi +4 -3
index 01cf54f70501e8c2..5667d284a3f0af92 100644
@@ -48,6 +48,7 @@
 			<0 0xf1004000 0 0x2000>,
 			<0 0xf1006000 0 0x2000>;
 		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+		clocks = <&mstp4_clks R8A7794_CLK_INTC_SYS>;
 	};
 
 	cmt0: timer at ffca0000 {
@@ -629,10 +630,10 @@
 		mstp4_clks: mstp4_clks at e6150140 {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
-			clocks = <&cp_clk>;
+			clocks = <&cp_clk>, <&zs_clk>;
 			#clock-cells = <1>;
-			clock-indices = <R8A7794_CLK_IRQC>;
-			clock-output-names = "irqc";
+			clock-indices = <R8A7794_CLK_IRQC R8A7794_CLK_INTC_SYS>;
+			clock-output-names = "irqc", "intc-sys";
 		};
 		mstp7_clks: mstp7_clks at e615014c {
 			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
include/dt-bindings/clock/r8a7794-clock.h +1 -0
index 09da38a58776b403..3ea8cea7d3e79d87 100644
@@ -62,6 +62,7 @@
 
 /* MSTP4 */
 #define R8A7794_CLK_IRQC		7
+#define R8A7794_CLK_INTC_SYS		8
 
 /* MSTP5 */
 #define R8A7794_CLK_THERMAL		22
Signature · 1 line
1.9.1