spi: Add Designware SPI controller Kconfig entry
PATCH v2 1/2 spi: Add Designware SPI controller Kconfig entry
Add DWC SPI controller Kconfig entry.
--- drivers/spi/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)
V2: Improve the help text.
drivers/spi/Kconfig +8 -0
@@ -10,3 +10,11 @@ config DM_SPI as 'parent data' to every slave on each bus. Slaves typically use driver-private data instead of extending the spi_slave structure. + +config DESIGNWARE_SPI + bool "Designware SPI driver" + depends on DM_SPI + help + Enable the Designware SPI driver. This driver can be used to + access the SPI NOR flash on platforms embedding this Designware + IP core.
Signature · 1 line
2.1.3
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Add Cadence QSPI controller Kconfig entry.
--- drivers/spi/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)
V2: Improve the help text.
drivers/spi/Kconfig +8 -0
@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core. + +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Cadence IP core.
Signature · 1 line
2.1.3
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 34 lines · Marek Vasut
Add Cadence QSPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>--- drivers/spi/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)V2: Improve the help text.
drivers/spi/Kconfig +8
-1@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core. + +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Cadence IP core. --
Quoted 2 lines
2.1.3
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
Thanks.
Quoted 10 lines
Quoted 10 lines
drivers/spi/Kconfig +0
-0@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core.
Quoted 12 lines
Quoted 10 lines
drivers/spi/Kconfig +8
-1+ +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Cadence IP core. --2.1.3
Acked-by Simon Glass <[email protected]>
Jagan seems to be busy with his marriage, so ... how do we handle these two patches ? Do you want them in for this MW or the next one (either way is fine by me) ? Also, I can push them through the socfpga tree, even though they should probably go through -spi tree.
Best regards,
Marek Vasut
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Hi Marek,
Quoted 27 lines · Marek Vasut
On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
Thanks.
Quoted 10 lines
Quoted 10 lines
drivers/spi/Kconfig +0
-0@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core.Quoted 12 lines
Quoted 10 lines
drivers/spi/Kconfig +8
-1+ +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Cadence IP core. --2.1.3
Acked-by Simon Glass <[email protected]>
Quoted 4 lines
Jagan seems to be busy with his marriage, so ... how do we handle these two patches ? Do you want them in for this MW or the next one (either way is fine by me) ? Also, I can push them through the socfpga tree, even though they should probably go through -spi tree.
How about you pick them up?
Regards,
Simon
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 1 line · Simon Glass
Hi Marek,
Hi!
Quoted 28 lines · Marek Vasut
Quoted 27 lines · Simon Glass
Thanks.
Quoted 22 lines
Quoted 16 lines
drivers/spi/Kconfig +6
-0@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core. + +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver canQuoted 4 lines
be + used to access the SPI NOR flash on platforms embedding
this + Cadence IP core.
--
2.1.3Acked-by Simon Glass <[email protected]>
Quoted 6 lines
Quoted 4 lines
Jagan seems to be busy with his marriage, so ... how do we handle these two patches ? Do you want them in for this MW or the next one (either way is fine by me) ? Also, I can push them through the socfpga tree, even though they should probably go through -spi tree.
How about you pick them up?
Uh sorry, I completely lost this email. I just replied to Jagan, so let's see how the discussion there goes.
Best regards,
Marek Vasut
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 38 lines · Marek Vasut
Quoted 1 line · Simon Glass
Hi Marek,
Hi!
Quoted 33 lines · Marek Vasut
Quoted 31 lines · Simon Glass
Thanks.
Quoted 10 lines
Quoted 10 lines
drivers/spi/Kconfig +0
-0@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core.Quoted 12 lines
Quoted 10 lines
drivers/spi/Kconfig +6
-0+ +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This driver canbe + used to access the SPI NOR flash on platforms embedding
this + Cadence IP core.
--
2.1.3Acked-by Simon Glass <[email protected]>Jagan seems to be busy with his marriage, so ... how do we handle these two patches ? Do you want them in for this MW or the next one (either way is fine by me) ? Also, I can push them through the socfpga tree, even though they should probably go through -spi tree.
Quoted 4 lines
Quoted 1 line
How about you pick them up?
Uh sorry, I completely lost this email. I just replied to Jagan, so let's see how the discussion there goes.
I'm sending -spi PR now, if you want I shall take otherwise you just take care.
thanks!
Signature · 1 line
Jagan.
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 39 lines · Jagan Teki
Quoted 38 lines · Marek Vasut
Quoted 1 line · Simon Glass
Hi Marek,
Hi!
Quoted 33 lines · Marek Vasut
Quoted 31 lines · Simon Glass
Thanks.
Quoted 10 lines
Quoted 10 lines
drivers/spi/Kconfig +0
-0@@ -18,3 +18,11 @@ config DESIGNWARE_SPI Enable the Designware SPI driver. This driver can be used to access the SPI NOR flash on platforms embedding this Designware IP core.Quoted 12 lines
Quoted 10 lines
drivers/spi/Kconfig +6
-0+ +config CADENCE_QSPI + bool "Cadence QSPI driver" + depends on DM_SPI + help + Enable the Cadence Quad-SPI (QSPI) driver. This drivercan be + used to access the SPI NOR flash on platforms
embedding this + Cadence IP core.
--
2.1.3Acked-by Simon Glass <[email protected]>Jagan seems to be busy with his marriage, so ... how do we handle these two patches ? Do you want them in for this MW or the next one (either way is fine by me) ? Also, I can push them through the socfpga tree, even though they should probably go through -spi tree.
Quoted 7 lines
Quoted 4 lines
Quoted 1 line
How about you pick them up?
Uh sorry, I completely lost this email. I just replied to Jagan, so let's see how the discussion there goes.
I'm sending -spi PR now, if you want I shall take otherwise you just take care.
Fine, I'll send these two for 2015.07 .
Best regards,
Marek Vasut
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
In reply to Marek VasutQuoted 11 lines · Marek Vasut
Add Cadence QSPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>
Thanks,
Stefan
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 15 lines · Stefan Roese
Quoted 12 lines · Marek Vasut
Add Cadence QSPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>
Quoted 1 line
Acked-by Stefan Roese <[email protected]>
Shall I pick these two on my tree (-spi)?
thanks!
Signature · 1 line
Jagan.
PATCH v2 2/2 spi: Add Cadence QSPI controller Kconfig entry
Quoted 14 lines · Jagan Teki
Quoted 13 lines · Stefan Roese
Quoted 11 lines · Marek Vasut
Add Cadence QSPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>
Quoted 3 lines
Quoted 1 line
Acked-by Stefan Roese <[email protected]>Shall I pick these two on my tree (-spi)?
Either that or I can send PR via SoCFPGA tree. Either way is OK. The patches are now sitting in u-boot-socfpga/topic/spi-kconfig so I can just send that out ...
Best regards,
Marek Vasut
PATCH v2 1/2 spi: Add Designware SPI controller Kconfig entry
In reply to Marek VasutQuoted 34 lines · Marek Vasut
Add DWC SPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>--- drivers/spi/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+)V2: Improve the help text.
drivers/spi/Kconfig +8
-1@@ -10,3 +10,11 @@ config DM_SPI as 'parent data' to every slave on each bus. Slaves typically use driver-private data instead of extending the spi_slave structure. + +config DESIGNWARE_SPI + bool "Designware SPI driver" + depends on DM_SPI + help + Enable the Designware SPI driver. This driver can be used to + access the SPI NOR flash on platforms embedding this Designware + IP core. --
Quoted 2 lines
2.1.3
PATCH v2 1/2 spi: Add Designware SPI controller Kconfig entry
In reply to Marek VasutQuoted 11 lines · Marek Vasut
Add DWC SPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>Cc Pavel Machek <[email protected]>Cc Simon Glass <[email protected]>Cc Stefan Roese <[email protected]>Cc Tom Rini <[email protected]>Cc Vince Bridgers <[email protected]>
Thanks,
Stefan
PATCH v2 1/2 spi: Add Designware SPI controller Kconfig entry
In reply to Marek VasutQuoted 6 lines · Marek Vasut
Add DWC SPI controller
Kconfigentry.Signed-off-by Marek Vasut <[email protected]>Cc Chin Liang See <[email protected]>Cc Dinh Nguyen <[email protected]>Cc Jagannadha Sutradharudu Teki <[email protected]>
(for both patches).
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html