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ARM: sunxi: SRAM mapping support

PATCH Superseded Hans de Goede 2 participants 8 messages Mar 26, 2015 – Apr 4, 2015

Subsystems (3)
Network drivers Device tree bindings Arm/Allwinner sunXi SoC support

v2 of 3 Superseded Latest is v3 →

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Hans de Goede

author
#0 lore raw

v2 cover ARM: sunxi: SRAM mapping support

Hi All,

Here is v2 of my cleaned up version of Maxime's sunxi SRAM controller driver.

Changes since v1:
- Make the SUNXI_SRAM Kconfig option hidden, enabled by default if ARCH_SUNXI
- Fix some typos in the comments in the dts file, both in the example in the devicetree-binding documentation, as well as in the actual dts files
- Drop the bogus change to drivers/net/ethernet/stmicro/stmmac/Kconfig

Since this is a prereq for my musb work, if there are no objections then I would like to see this go upstream soon.

Since it only touches sunxi files (and one Makefile), it is probably best if this all goes upstream through Maxime.

Regards,

Hans

author
#1 lore raw

PATCH v2 1/5 drivers: soc: sunxi: Introduce SoC driver to map SRAMs

From: Maxime Ripard <[email protected]>

The Allwinner SoCs have a handful of SRAM that can be either mapped to be accessible by devices or the CPU.

That mapping is controlled by an SRAM controller, and that mapping might not be set by the bootloader, for example if the device wasn't used at all, or if we're using solutions like the U-Boot's Falcon Boot.

We could also imagine changing this at runtime for example to change the mapping of these SRAMs to use them for suspend/resume or runtime memory rate change, if that ever happens.

These use cases require some API in the kernel to control that mapping, exported through a drivers/soc driver.

This driver also implement a debugfs file that shows the SRAM found in the system, the current mapping and the SRAM that have been claimed by some drivers in the kernel.

Signed-off-by Maxime Ripard <[email protected]>

[hdegoede at redhat.com: Changed compat string to sun4i-a10-sram-controller, as
the sram controller is identical on sun4i, sun5i & sun7i, added devicetree binding documentation, fixed some checkpatch warnings]

Signed-off-by Hans de Goede <[email protected]>
---
 .../devicetree/bindings/soc/sunxi/sram.txt         |  64 ++++++
 drivers/soc/Kconfig                                |   1 +
 drivers/soc/Makefile                               |   1 +
 drivers/soc/sunxi/Kconfig                          |  11 +
 drivers/soc/sunxi/Makefile                         |   1 +
 drivers/soc/sunxi/sunxi_sram.c                     | 235 +++++++++++++++++++++
 include/linux/soc/sunxi/sunxi_sram.h               |  24 +++
 7 files changed, 337 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/sunxi/sram.txt
 create mode 100644 drivers/soc/sunxi/Kconfig
 create mode 100644 drivers/soc/sunxi/Makefile
 create mode 100644 drivers/soc/sunxi/sunxi_sram.c
 create mode 100644 include/linux/soc/sunxi/sunxi_sram.h
Documentation/devicetree/bindings/soc/sunxi/sram.txt new file +64 -0
new file mode 100644
index 0000000..bd3e53d
@@ -0,0 +1,64 @@
+Allwinnner sun4i / sun5i / sun7i SoC SRAM controllers
+-----------------------------------------------------
+
+Required properties:
+- compatible : "allwinner,sun4i-a10-sram-controller"
+- reg : sram controller register offset + length
+
+SRAM nodes
+----------
+
+Besides a node for the SRAM controller the devicetree must also contain a
+node for each SRAM block controlled by the controller.
+
+Required sram node properties:
+- compatible : "allwinner,sun4i-a10-sram"
+- allwinner,sram-name : should be one of
+  * "A1"
+  * "A2"
+  * "A3-A4"
+  * "D"
+
+Example
+-------
+
+/*
+ * Note we use the address where the mmio registers start, not where
+ * the SRAM blocks start, this cannot be changed because that would be
+ * a devicetree ABI change.
+ */
+soc at 01c00000 {
+	compatible = "simple-bus";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+
+	sram at 00000000 {
+		compatible = "allwinner,sun4i-a10-sram";
+		reg = <0x00000000 0x4000>;
+		allwinner,sram-name = "A1";
+	};
+
+	sram at 00004000 {
+		compatible = "allwinner,sun4i-a10-sram";
+		reg = <0x00004000 0x4000>;
+		allwinner,sram-name = "A2";
+	};
+
+	sram at 00008000 {
+		compatible = "allwinner,sun4i-a10-sram";
+		reg = <0x00008000 0x4000>;
+		allwinner,sram-name = "A3-A4";
+	};
+
+	sram at 00010000 {
+		compatible = "allwinner,sun4i-a10-sram";
+		reg = <0x00010000 0x1000>;
+		allwinner,sram-name = "D";
+	};
+
+	sram-controller at 01c00000 {
+		compatible = "allwinner,sun4i-a10-sram-controller";
+		reg = <0x01c00000 0x30>;
+	};
+};
drivers/soc/Kconfig +1 -0
index 76d6bd4..5d0f55d 100644
@@ -1,6 +1,7 @@
 menu "SOC (System On Chip) specific Drivers"
 
 source "drivers/soc/qcom/Kconfig"
+source "drivers/soc/sunxi/Kconfig"
 source "drivers/soc/ti/Kconfig"
 source "drivers/soc/versatile/Kconfig"
drivers/soc/Makefile +1 -0
index 063113d..170bba3 100644
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
+obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
 obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
 obj-$(CONFIG_SOC_TI)		+= ti/
 obj-$(CONFIG_PLAT_VERSATILE)	+= versatile/
drivers/soc/sunxi/Kconfig new file +11 -0
new file mode 100644
index 0000000..e6de9fe
@@ -0,0 +1,11 @@
+#
+# Allwinner sunXi SoC drivers
+#
+config SUNXI_SRAM
+	boolean
+	depends on ARCH_SUNXI
+	default y
+	help
+	  Say y here to enable the SRAM controller support. This
+	  device is responsible on mapping the SRAM in the sunXi SoCs
+	  whether to the CPU/DMA, or to the devices.
drivers/soc/sunxi/Makefile new file +1 -0
new file mode 100644
index 0000000..4cf9dbd
@@ -0,0 +1 @@
+obj-$(CONFIG_SUNXI_SRAM) +=	sunxi_sram.o
drivers/soc/sunxi/sunxi_sram.c new file +235 -0

235 lines not on this page · raw message

include/linux/soc/sunxi/sunxi_sram.h new file +24 -0
new file mode 100644
index 0000000..351c31a
@@ -0,0 +1,24 @@
+/*
+ * Allwinner SoCs SRAM Controller Driver
+ *
+ * Copyright (C) 2015 Maxime Ripard
+ *
+ * Author: Maxime Ripard <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef _SUNXI_SRAM_H_
+#define _SUNXI_SRAM_H_
+
+enum sunxi_sram_type {
+	SUNXI_SRAM_USB_OTG,
+	SUNXI_SRAM_EMAC,
+};
+
+int sunxi_sram_claim(enum sunxi_sram_type type, const char *function);
+int sunxi_sram_release(enum sunxi_sram_type type);
+
+#endif /* _SUNXI_SRAM_H_ */
Signature · 1 line
2.3.3
author
#2 lore raw

PATCH v2 2/5 ARM: dts: sun4i: Add A10 SRAM and SRAM controller

In reply to Hans de Goede

The A10 has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller.

Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
arch/arm/boot/dts/sun4i-a10.dtsi +34 -0
index 59fc7f7..595b77c 100644
@@ -451,12 +451,46 @@
 		};
 	};
 
+	/*
+	 * Note we use the address where the mmio registers start, not where
+	 * the SRAM blocks start, this cannot be changed because that would be
+	 * a devicetree ABI change.
+	 */
 	soc at 01c00000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
+		sram at 00000000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00000000 0x4000>;
+			allwinner,sram-name = "A1";
+		};
+
+		sram at 00004000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00004000 0x4000>;
+			allwinner,sram-name = "A2";
+		};
+
+		sram at 00008000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00008000 0x4000>;
+			allwinner,sram-name = "A3-A4";
+		};
+
+		sram at 00010000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00010000 0x1000>;
+			allwinner,sram-name = "D";
+		};
+
+		sram-controller at 01c00000 {
+			compatible = "allwinner,sun4i-a10-sram-controller";
+			reg = <0x01c00000 0x30>;
+		};
+
 		dma: dma-controller at 01c02000 {
 			compatible = "allwinner,sun4i-a10-dma";
 			reg = <0x01c02000 0x1000>;
Signature · 1 line
2.3.3
author
#3 lore raw

PATCH v2 3/5 ARM: dts: sun5i: Add A13 and A10s SRAM and SRAM controller

In reply to Hans de Goede

The A13 / A10s has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller.

Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible.

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun5i.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
arch/arm/boot/dts/sun5i.dtsi +34 -0
index c797d88..8c04f24 100644
@@ -298,12 +298,46 @@
 		};
 	};
 
+	/*
+	 * Note we use the address where the mmio registers start, not where
+	 * the SRAM blocks start, this cannot be changed because that would be
+	 * a devicetree ABI change.
+	 */
 	soc at 01c00000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
+		sram at 00000000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00000000 0x4000>;
+			allwinner,sram-name = "A1";
+		};
+
+		sram at 00004000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00004000 0x4000>;
+			allwinner,sram-name = "A2";
+		};
+
+		sram at 00008000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00008000 0x4000>;
+			allwinner,sram-name = "A3-A4";
+		};
+
+		sram at 00010000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00010000 0x1000>;
+			allwinner,sram-name = "D";
+		};
+
+		sram-controller at 01c00000 {
+			compatible = "allwinner,sun4i-a10-sram-controller";
+			reg = <0x01c00000 0x30>;
+		};
+
 		dma: dma-controller at 01c02000 {
 			compatible = "allwinner,sun4i-a10-dma";
 			reg = <0x01c02000 0x1000>;
Signature · 1 line
2.3.3
author
#4 lore raw

PATCH v2 4/5 ARM: dts: sun7i: Add A20 SRAM and SRAM controller

In reply to Hans de Goede

From: Maxime Ripard <[email protected]>

The A20 has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller.

Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible.

Signed-off-by Maxime Ripard <[email protected]>

[hdegoede at redhat.com: Do not change soc node name, change compatible to
sun4i-a10-sram-controller to match the driver change]

Signed-off-by Hans de Goede <[email protected]>
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
arch/arm/boot/dts/sun7i-a20.dtsi +34 -0
index 465a19f..e6f4a33 100644
@@ -529,12 +529,46 @@
 		};
 	};
 
+	/*
+	 * Note we use the address where the mmio registers start, not where
+	 * the SRAM blocks start, this cannot be changed because that would be
+	 * a devicetree ABI change.
+	 */
 	soc at 01c00000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
+		sram at 00000000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00000000 0x4000>;
+			allwinner,sram-name = "A1";
+		};
+
+		sram at 00004000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00004000 0x4000>;
+			allwinner,sram-name = "A2";
+		};
+
+		sram at 00008000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00008000 0x4000>;
+			allwinner,sram-name = "A3-A4";
+		};
+
+		sram at 00010000 {
+			compatible = "allwinner,sun4i-a10-sram";
+			reg = <0x00010000 0x1000>;
+			allwinner,sram-name = "D";
+		};
+
+		sram-controller at 01c00000 {
+			compatible = "allwinner,sun4i-a10-sram-controller";
+			reg = <0x01c00000 0x30>;
+		};
+
 		nmi_intc: interrupt-controller at 01c00030 {
 			compatible = "allwinner,sun7i-a20-sc-nmi";
 			interrupt-controller;
Signature · 1 line
2.3.3
author
#5 lore raw

PATCH v2 5/5 net: allwinner: emac: Claim our SRAM

In reply to Hans de Goede

From: Maxime Ripard <[email protected]>

The SRAM the EMAC is using might not have been mapped accordingly by the bootloader, preventing the EMAC to work properly.

Ask for that SRAM to be mapped at probe time to make sure that this never happens.

Signed-off-by Maxime Ripard <[email protected]>
[hdegoede at redhat.com: Make sure SUNXI_SRAM gets enabled in Kconfig]
Signed-off-by Hans de Goede <[email protected]>
---
 drivers/net/ethernet/allwinner/sun4i-emac.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)
drivers/net/ethernet/allwinner/sun4i-emac.c +11 -2
index f3470d9..9d0136b 100644
@@ -29,6 +29,8 @@
 #include <linux/platform_device.h>
 #include <linux/phy.h>
 
+#include <linux/soc/sunxi/sunxi_sram.h>
+
 #include "sun4i-emac.h"
 
 #define DRV_NAME		"sun4i-emac"

@@ -857,11 +859,15 @@ static int emac_probe(struct platform_device *pdev)
 
 	clk_prepare_enable(db->clk);
 
+	ret = sunxi_sram_claim(SUNXI_SRAM_EMAC, "emac");
+	if (ret)
+		dev_warn(&pdev->dev, "Couldn't map SRAM to device\n");
+
 	db->phy_node = of_parse_phandle(np, "phy", 0);
 	if (!db->phy_node) {
 		dev_err(&pdev->dev, "no associated PHY\n");
 		ret = -ENODEV;
-		goto out;
+		goto out_release_sram;
 	}
 
 	/* Read MAC-address from DT */

@@ -893,7 +899,7 @@ static int emac_probe(struct platform_device *pdev)
 	if (ret) {
 		dev_err(&pdev->dev, "Registering netdev failed!\n");
 		ret = -ENODEV;
-		goto out;
+		goto out_release_sram;
 	}
 
 	dev_info(&pdev->dev, "%s: at %p, IRQ %d MAC: %pM\n",

@@ -901,6 +907,8 @@ static int emac_probe(struct platform_device *pdev)
 
 	return 0;
 
+out_release_sram:
+	sunxi_sram_release(SUNXI_SRAM_EMAC);
 out:
 	dev_err(db->dev, "not found (%d).\n", ret);
 

@@ -914,6 +922,7 @@ static int emac_remove(struct platform_device *pdev)
 	struct net_device *ndev = platform_get_drvdata(pdev);
 
 	unregister_netdev(ndev);
+	sunxi_sram_release(SUNXI_SRAM_EMAC);
 	free_netdev(ndev);
 
 	dev_dbg(&pdev->dev, "released and freed device\n");
Signature · 1 line
2.3.3
#6 lore raw

v2 cover ARM: sunxi: SRAM mapping support

In reply to Hans de Goede

Hi,

Quoted 10 lines · Hans de Goede

Hi All,

Here is v2 of my cleaned up version of Maxime's sunxi SRAM controller driver.

Changes since v1:
- Make the SUNXI_SRAM Kconfig option hidden, enabled by default if ARCH_SUNXI
- Fix some typos in the comments in the dts file, both in the example in the devicetree-binding documentation, as well as in the actual dts files
- Drop the bogus change to drivers/net/ethernet/stmicro/stmmac/Kconfig

Quoted 5 lines

Since this is a prereq for my musb work, if there are no objections then I would like to see this go upstream soon.

Since it only touches sunxi files (and one Makefile), it is probably best if this all goes upstream through Maxime.

I'm (obviously) fine with all the changes. Arnd, can I merge it through my tree and send a pull request, or do you want to handle the drivers/soc patches yourself?

Thanks,
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#7 lore raw

v2 cover ARM: sunxi: SRAM mapping support

In reply to Hans de Goede
Quoted 10 lines · Hans de Goede

Hi All,

Here is v2 of my cleaned up version of Maxime's sunxi SRAM controller driver.

Changes since v1:
- Make the SUNXI_SRAM Kconfig option hidden, enabled by default if ARCH_SUNXI
- Fix some typos in the comments in the dts file, both in the example in the devicetree-binding documentation, as well as in the actual dts files
- Drop the bogus change to drivers/net/ethernet/stmicro/stmmac/Kconfig

Quoted 5 lines

Since this is a prereq for my musb work, if there are no objections then I would like to see this go upstream soon.

Since it only touches sunxi files (and one Makefile), it is probably best if this all goes upstream through Maxime.

Merged patches 1-4. Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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