ARM: dts: apq8064 dt patches.

PATCH New Srinivas Kandagatla 5 participants 51 messages Apr 9, 2015 – Apr 27, 2015

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Srinivas Kandagatla

author

2015-04-09 08:21 UTC #0 lore raw

cover ARM: dts: apq8064 dt patches.

Hi Kumar,

Now that the rpm redesign dependency is resolved, If its not too late could you queue these dt patches for v4.1 or v4.1-rc1.

I tested these patches on APQ8064 based IFC6410 board with SATA/USB/HDMI.

I also rebased these patche on top of your qcom/dt branch.

Thanks,
srini

Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600

Pramod Gurav (1):
ARM: dts: qcom: Add DT alias for serial port

Rob Clark (1):
ARM: dts: apq8064: Add MDP support

Srinivas Kandagatla (6):
ARM: dts: apq8064: add RPM regulators support
ARM: dts: apq8064: Add usb host support.
ARM: dts: apq8064: Add USB OTG support
ARM: dts: apq8064: Add SATA controller support.
ARM: dts: Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: apq8064 add i2c3 node for panel.

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts |  30 ++
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  |  69 +++-
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 528 +++++++++++++++++++++++++++-
 3 files changed, 618 insertions(+), 9 deletions(-)

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:22 UTC #1 lore raw

PATCH 1/10 ARM: dts: apq8064: add RPM regulators support

This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support. Also adds all the regulators in the rpm.

Most content of this patch was originally posted by Stephen Boyd on the list.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 272 ++++++++++++++++++++++++++++++++++++
 1 file changed, 272 insertions(+)

arch/arm/boot/dts/qcom-apq8064.dtsi +272 -0

index 6c15112..d9166eb 100644
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>

@@ -276,6 +277,277 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <GIC_SPI 19 IRQ_TYPE_NONE>,
+					  <GIC_SPI 21 IRQ_TYPE_NONE>,
+					  <GIC_SPI 22 IRQ_TYPE_NONE>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			regulators {
+				compatible = "qcom,rpm-pm8921-regulators";
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s4>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+				vdd_ncp-supply = <&pm8921_l6>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
+				pm8921_s2: s2 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <1600000>;
+					bias-pull-down;
+				};
+
+				pm8921_s3: s3 {
+					regulator-min-microvolt = <500000>;
+					regulator-max-microvolt = <1150000>;
+					qcom,switch-mode-frequency = <4800000>;
+					bias-pull-down;
+				};
+
+				pm8921_s4: s4 {
+					regulator-always-on;
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					qcom,switch-mode-frequency = <1600000>;
+					bias-pull-down;
+					qcom,force-mode =
+						<QCOM_RPM_FORCE_MODE_AUTO>;
+				};
+
+				pm8921_s7: s7 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_s8: s8 {
+					regulator-min-microvolt = <2200000>;
+					regulator-max-microvolt = <2200000>;
+					qcom,switch-mode-frequency = <1600000>;
+				};
+
+				/* PMOS LDO */
+				pm8921_l1: l1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1100000>;
+					regulator-max-microvolt = <1100000>;
+					bias-pull-down;
+				};
+
+				pm8921_l2: l2 {
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					bias-pull-down;
+				};
+
+				pm8921_l3: l3 {
+					regulator-min-microvolt = <3075000>;
+					regulator-max-microvolt = <3075000>;
+					bias-pull-down;
+				};
+
+				pm8921_l4: l4 {
+					regulator-always-on;
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l5: l5 {
+					regulator-min-microvolt = <2950000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l6: l6 {
+					regulator-min-microvolt = <2950000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l7: l7 {
+					regulator-min-microvolt = <1850000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l8: l8 {
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l9: l9 {
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3000000>;
+					bias-pull-down;
+				};
+
+				pm8921_l10: l10 {
+					regulator-min-microvolt = <2900000>;
+					regulator-max-microvolt = <2900000>;
+					bias-pull-down;
+				};
+
+				pm8921_l11: l11 {
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3000000>;
+					bias-pull-down;
+				};
+
+				pm8921_l12: l12 {
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					bias-pull-down;
+				};
+
+				pm8921_l13: l13 {
+					regulator-min-microvolt = <2220000>;
+					regulator-max-microvolt = <2220000>;
+				};
+
+				pm8921_l14: l14 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l15: l15 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l16: l16 {
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l17: l17 {
+					regulator-min-microvolt = <2000000>;
+					regulator-max-microvolt = <2000000>;
+					bias-pull-down;
+				};
+
+				pm8921_l18: l18 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l21: l21 {
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+					bias-pull-down;
+				};
+
+				pm8921_l22: l22 {
+					regulator-min-microvolt = <2600000>;
+					regulator-max-microvolt = <2600000>;
+					bias-pull-down;
+				};
+
+				pm8921_l23: l23 {
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l24: l24 {
+					regulator-min-microvolt = <750000>;
+					regulator-max-microvolt = <1150000>;
+					bias-pull-down;
+				};
+
+				pm8921_l25: l25 {
+					regulator-always-on;
+					regulator-min-microvolt = <1250000>;
+					regulator-max-microvolt = <1250000>;
+					bias-pull-down;
+				};
+
+				pm8921_l27: l27 {
+					regulator-min-microvolt = <1100000>;
+					regulator-max-microvolt = <1100000>;
+				};
+
+				pm8921_l28: l28 {
+					regulator-min-microvolt = <1050000>;
+					regulator-max-microvolt = <1050000>;
+					bias-pull-down;
+				};
+
+				pm8921_l29: l29 {
+					regulator-min-microvolt = <2000000>;
+					regulator-max-microvolt = <2000000>;
+					bias-pull-down;
+				};
+
+				/* Low Voltage Switch */
+				pm8921_lvs1: lvs1 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs2: lvs2 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs3: lvs3 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs4: lvs4 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs5: lvs5 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs6: lvs6 {
+					bias-pull-down;
+				};
+
+				pm8921_lvs7: lvs7 {
+					bias-pull-down;
+				};
+
+				pm8921_ncp: ncp {
+					regulator-min-microvolt = <2000000>;
+					regulator-max-microvolt = <2000000>;
+					qcom,switch-mode-frequency = <1600000>;
+				};
+
+				pm8921_hdmi_switch: hdmi-switch {
+					bias-pull-down;
+				};
+			};
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Bjorn Andersson

2015-04-09 20:16 UTC #2 lore raw

PATCH 1/10 ARM: dts: apq8064: add RPM regulators support

Quoted 29 lines · Srinivas Kandagatla

This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support. Also adds all the regulators in the rpm.
Most content of this patch was originally posted by Stephen Boyd on the list.
Signed-off-by Srinivas Kandagatla <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 272 ++++++++++++++++++++++++++++++++++++
 1 file changed, 272 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +4 -0
index 6c15112..d9166eb 100644
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -276,6 +277,277 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;

arch/arm/boot/dts/qcom-apq8064.dtsi line 292

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0

+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <GIC_SPI 19 IRQ_TYPE_NONE>,
+					  <GIC_SPI 21 IRQ_TYPE_NONE>,
+					  <GIC_SPI 22 IRQ_TYPE_NONE>;

All three interrupts should be IRQ_TYPE_EDGE_RISING, currently the driver overrides this with IRQF_TRIGGER_RISING but it should just obey the dt.

arch/arm/boot/dts/qcom-apq8064.dtsi line 305

Quoted 13 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +13 -0

+			interrupt-names	= "ack", "err", "wakeup";
+
+			regulators {
+				compatible = "qcom,rpm-pm8921-regulators";
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s4>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+				vdd_ncp-supply = <&pm8921_l6>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;

These are actually possible to change when designing a device, but it's not unlikely that everyone have these values so they are reasonable to have here.

But for several of the regulators we're running our 8064 devices with different configuration, especially voltage, so I don't think they should be specified here.

Having the phandles listed here are sane though, so that we can address them from the platform files.

arch/arm/boot/dts/qcom-apq8064.dtsi line 315

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0

+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+

[..]

Regards,
Bjorn

Srinivas Kandagatla

author

2015-04-09 21:18 UTC #3 lore raw

PATCH 1/10 ARM: dts: apq8064: add RPM regulators support

Thanks Bjorn for comments

Quoted 37 lines · Bjorn Andersson

Quoted 35 lines · Srinivas Kandagatla
This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support. Also adds all the regulators in the rpm.
Most content of this patch was originally posted by Stephen Boyd on the list.
Signed-off-by Srinivas Kandagatla <[email protected]>
---
  arch/arm/boot/dts/qcom-apq8064.dtsi | 272 ++++++++++++++++++++++++++++++++++++
  1 file changed, 272 insertions(+)
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
index 6c15112..d9166eb 100644
@@ -3,6 +3,7 @@
  #include "skeleton.dtsi"
  #include <dt-bindings/clock/qcom,gcc-msm8960.h>
  #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
  #include <dt-bindings/soc/qcom,gsbi.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -276,6 +277,277 @@
  			#reset-cells = <1>;
  		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;

Quoted 8 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 292
Quoted 4 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +4 -0
+
+			interrupts	= <GIC_SPI 19 IRQ_TYPE_NONE>,
+					  <GIC_SPI 21 IRQ_TYPE_NONE>,
+					  <GIC_SPI 22 IRQ_TYPE_NONE>;
All three interrupts should be IRQ_TYPE_EDGE_RISING, currently the driver overrides this with IRQF_TRIGGER_RISING but it should just obey the dt.

Yes, I will change the type to IRQF_TRIGGER_RISING in next version.

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +9 -0

+			interrupt-names	= "ack", "err", "wakeup";
+
+			regulators {
+				compatible = "qcom,rpm-pm8921-regulators";
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s4>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+				vdd_ncp-supply = <&pm8921_l6>;

Quoted 8 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 305
Quoted 4 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +4 -0
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
These are actually possible to change when designing a device, but it's not unlikely that everyone have these values so they are reasonable to have here.

Ok.

Quoted 5 lines

But for several of the regulators we're running our 8064 devices with different configuration, especially voltage, so I don't think they should be specified here.

Yep it makes sense, I will move the voltage ranges to the board specific dts files.

Quoted 2 lines

Having the phandles listed here are sane though, so that we can address them from the platform files.

Quoted 15 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 315
Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
[..]
Regards,
Bjorn

Srinivas Kandagatla

author

2015-04-09 08:22 UTC #4 lore raw

PATCH 2/10 ARM: dts: apq8064: Add usb host support.

In reply to Srinivas Kandagatla

This patch adds device tree nodes to support two usb hosts on APQ8064 SOC.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 23 +++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +23 -0

index e641001..0b562f0 100644
@@ -49,6 +49,29 @@
 			};
 		};
 
+
+		usb3_phy: phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

arch/arm/boot/dts/qcom-apq8064.dtsi +47 -0

59 lines not on this page · raw message

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #5 lore raw

PATCH 3/10 ARM: dts: apq8064: Add USB OTG support

In reply to Srinivas Kandagatla

This patch adds USB OTG support on USB1 of APQ8064 SOC. Tested on IFC6410 with ethernet gadget.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 16 +++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +16 -0

index 0b562f0..17a0946 100644
@@ -49,6 +49,13 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
 
 		usb3_phy: phy at 12520000 {
 			status		= "okay";

@@ -64,6 +71,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget at 12500000 {
+			status = "okay";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "okay";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

arch/arm/boot/dts/qcom-apq8064.dtsi +32 -0

index 2d7703d..cca9162 100644
@@ -549,6 +549,21 @@
 			};
 		};
 
+		usb1_phy: phy at 12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy: phy at 12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;

@@ -579,6 +594,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1: gadget at 12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb at 12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb at 12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #6 lore raw

PATCH 4/10 ARM: dts: apq8064: Add SATA controller support.

In reply to Srinivas Kandagatla

This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  9 ++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +9 -0

index 17a0946..d39a5bb 100644
@@ -49,6 +49,15 @@
 			};
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy at 12500000 {
 			status		= "okay";

arch/arm/boot/dts/qcom-apq8064.dtsi +35 -0

index cca9162..ea0145f 100644
@@ -627,6 +627,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata at 29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+						<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #7 lore raw

PATCH 5/10 ARM: dts: apq8064: Add MDP support

In reply to Srinivas Kandagatla

From: Rob Clark <[email protected]>

This patch adds MDP node to APQ8064 dt.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 105 ++++++++++++++++++++++++++++++++++++
 1 file changed, 105 insertions(+)

arch/arm/boot/dts/qcom-apq8064.dtsi +105 -0

index ea0145f..70e417f 100644
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>

@@ -108,6 +109,20 @@
 				};
 			};
 
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux1 {
+					pins = "gpio69", "gpio70", "gpio71";
+					function = "hdmi";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+				mux2 {
+					pins = "gpio72";
+					function = "hdmi";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 			ps_hold: ps_hold {
 				mux {
 					pins = "gpio78";

@@ -251,6 +266,18 @@
 			};
 		};
 
+		ext_3p3v: regulator-fixed at 1 {
+			compatible = "regulator-fixed";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-name = "ext_3p3v";
+			regulator-type = "voltage";
+			startup-delay-us = <0>;
+			gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			regulator-boot-on;
+		};
+
 		qcom,ssbi at 500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;

@@ -770,5 +797,83 @@
 			compatible = "qcom,tcsr-apq8064", "syscon";
 			reg = <0x1a400000 0x100>;
 		};
+
+		hdmi: qcom,hdmi-tx at 4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg-names = "core_physical";
+			reg = <0x04a00000 0x1000>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clock-names =
+			    "core_clk",
+			    "master_iface_clk",
+			    "slave_iface_clk";
+			clocks =
+			    <&mmcc HDMI_APP_CLK>,
+			    <&mmcc HDMI_M_AHB_CLK>,
+			    <&mmcc HDMI_S_AHB_CLK>;
+			qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+						GPIO_ACTIVE_HIGH>;
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+		};
+
+		gpu: qcom,adreno-3xx at 4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;
+			qcom,chipid = <0x03020002>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel at 0 {
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel at 1 {
+					qcom,gpu-freq = <27000000>;
+				};
+			};
+		};
+
+		mdp: qcom,mdp at 5100000 {
+			compatible = "qcom,mdp";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+			connectors = <&hdmi>;
+			gpus = <&gpu>;
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "lut_clk",
+			    "src_clk",
+			    "hdmi_clk",
+			    "mdp_clk",
+			    "mdp_axi_clk";
+			clocks =
+			    <&mmcc MDP_CLK>,
+			    <&mmcc MDP_AHB_CLK>,
+			    <&mmcc MDP_LUT_CLK>,
+			    <&mmcc TV_SRC>,
+			    <&mmcc HDMI_TV_CLK>,
+			    <&mmcc MDP_TV_CLK>,
+			    <&mmcc MDP_AXI_CLK>;
+//			vdd-supply = <&footswitch_mdp>;
+		};
 	};
 };

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #8 lore raw

PATCH 6/10 ARM: dts: apq8064: Add usb host support to CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +16 -0

index 5d75666..220ff19 100644
@@ -40,6 +40,22 @@
 			};
 		};
 
+		usb3_phy:phy at 12520000 {
+			status = "ok";
+		};
+
+		usb4_phy:phy at 12530000 {
+			status = "ok";
+		};
+
+		usb3: usb at 12520000 {
+			status = "ok";
+		};
+
+		usb4: usb at 12530000 {
+			status = "ok";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #9 lore raw

PATCH 7/10 ARM: dts: apq8064: Add USB OTG support for CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds USB OTG support on USB1 for Compulab QS-600 Board.

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +14 -0

index 220ff19..06307b9 100644
@@ -40,6 +40,11 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy:phy at 12500000 {
+			status = "ok";
+		};
+
 		usb3_phy:phy at 12520000 {
 			status = "ok";
 		};

@@ -48,6 +53,15 @@
 			status = "ok";
 		};
 
+		gadget1:gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "ok";
+		};
+
 		usb3: usb at 12520000 {
 			status = "ok";
 		};

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #10 lore raw

PATCH 8/10 ARM: dts: qcom: Add DT alias for serial port

In reply to Srinivas Kandagatla

From: Pramod Gurav <[email protected]>

Define an alias for serial port present on ifc6410 which is used as console.

Signed-off-by Pramod Gurav <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 3 +--
 2 files changed, 5 insertions(+), 2 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +4 -0

index d39a5bb..b76a92b 100644
@@ -5,6 +5,10 @@
 	model = "Qualcomm APQ8064/IFC6410";
 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
 
+	aliases {
+		serial0 = &serial0;
+	};
+
 	soc {
 		pinctrl at 800000 {
 			i2c1_pins: i2c1 {

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -2

index 70e417f..f4b8c3a 100644
@@ -252,10 +252,9 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
-
 			syscon-tcsr = <&tcsr>;
 
-			serial at 16640000 {
+			serial0: serial at 16640000 {
 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 				reg = <0x16640000 0x1000>,
 				      <0x16600000 0x1000>;

Signature · 1 line

1.9.1

Bjorn Andersson

2015-04-09 20:25 UTC #11 lore raw

PATCH 8/10 ARM: dts: qcom: Add DT alias for serial port

Quoted 31 lines · Srinivas Kandagatla

From: Pramod Gurav <[email protected]>
Define an alias for serial port present on ifc6410 which is used as console.
Signed-off-by Pramod Gurav <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 3 +--
 2 files changed, 5 insertions(+), 2 deletions(-)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +4 -0
index d39a5bb..b76a92b 100644
@@ -5,6 +5,10 @@
 	model = "Qualcomm APQ8064/IFC6410";
 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
 
+	aliases {
+		serial0 = &serial0;
+	};
+
 	soc {
 		pinctrl at 800000 {
 			i2c1_pins: i2c1 {
arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0
index 70e417f..f4b8c3a 100644

arch/arm/boot/dts/qcom-apq8064.dtsi line 257

Quoted 8 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -2

@@ -252,10 +252,9 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
-
 			syscon-tcsr = <&tcsr>;
 
-			serial at 16640000 {
+			serial0: serial at 16640000 {

On my 8064 devices gsbi7 uart is used for felica, gsbi5 is the debug uart. So I don't think it's right to call this serial0 here.

Quoted 6 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0

 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 				reg = <0x16640000 0x1000>,
 				      <0x16600000 0x1000>;

Signature · 1 line

1.9.1

Regards,
Bjorn

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #12 lore raw

PATCH 9/10 ARM: dts: Move i2c1 pinctrl to apq8064.dtsi

In reply to Srinivas Kandagatla

I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would avoid redefining this in every board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 7 +++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +0 -7

index b76a92b..9bd9dfe 100644
@@ -11,13 +11,6 @@
 
 	soc {
 		pinctrl at 800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-
 			card_detect: card_detect {
 				mux {
 					pins = "gpio26";

arch/arm/boot/dts/qcom-apq8064.dtsi +7 -0

index f4b8c3a..2fa979f 100644
@@ -129,6 +129,13 @@
 					function = "ps_hold";
 				};
 			};
+
+			i2c1_pins: i2c1 {
+				mux {
+					pins = "gpio20", "gpio21";
+					function = "gsbi1";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-09 08:23 UTC #13 lore raw

PATCH 10/10 ARM: dts: apq8064 add i2c3 node for panel.

In reply to Srinivas Kandagatla

This patch adds i2c3 node which is used for panel control on IFC6410.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 27 +++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +10 -0

index 9bd9dfe..3edd1ce 100644
@@ -20,6 +20,16 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "okay";
+			qcom,mode = <GSBI_PROT_I2C>;
+			i2c3: i2c at 16280000 {
+				status = "okay";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

arch/arm/boot/dts/qcom-apq8064.dtsi +27 -0

index 2fa979f..b1f574d 100644
@@ -136,6 +136,13 @@
 					function = "gsbi1";
 				};
 			};
+
+			i2c3_pins: i2c3 {
+				mux {
+					pins = "gpio8", "gpio9";
+					function = "gsbi3";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

@@ -249,6 +256,26 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "disabled";
+			compatible = "qcom,gsbi-v1.0.0";
+			reg = <0x16200000 0x100>;
+			clocks = <&gcc GSBI3_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			i2c3: i2c at 16280000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16280000 0x1000>;
+				interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+				clocks = <&gcc GSBI3_QUP_CLK>,
+					 <&gcc GSBI3_H_CLK>;
+				clock-names = "core", "iface";
+			};
+		};
+
 		gsbi7: gsbi at 16600000 {
 			status = "disabled";
 			compatible = "qcom,gsbi-v1.0.0";

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:33 UTC #14 lore raw

v2 cover ARM: dts: apq8064 dt patches

In reply to Srinivas Kandagatla

Thanks all for reviewing v1 patches.

Hi Kumar,

Now that the rpm redesign dependency is resolved, If its not too late could you queue these dt patches for v4.1-rc1 or v4.1-rc2.

I tested these patches on APQ8064 based IFC6410 and CMQS600 board with SATA/USB/HDMI. I also rebased these patches on top of your qcom/dt branch.

Thanks,
srini

Changes since v1
* Made regulators board specific, as suggested by Bjorn.
* Used correct IRQF flags for rpm, spotted by Bjorn.
* Fixed serial lable to be more appropriate, spotted by Bjorn.

Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600

Pramod Gurav (1):
ARM: dts: apq8064-ifc6410: Add DT alias for serial port

Rob Clark (1):
ARM: dts: apq8064: Add MDP support

Srinivas Kandagatla (8):
ARM: dts: apq8064: add RPM regulators support
ARM: dts: apq8064-ifc6410: Add basic regulators
ARM: dts: apq8064: Add usb host support.
ARM: dts: apq8064: Add USB OTG support
ARM: dts: apq8064: Add SATA controller support.
ARM: dts: apq8064-cm-qs600: Add basic regulators.
ARM: dts: apq8064: Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: apq8064: add i2c3 node for panel.

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 100 ++++++++++
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  | 136 +++++++++++++-
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 280 +++++++++++++++++++++++++++-
 3 files changed, 507 insertions(+), 9 deletions(-)

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:33 UTC #15 lore raw

PATCH v2 1/12 ARM: dts: apq8064: add RPM regulators support

This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

arch/arm/boot/dts/qcom-apq8064.dtsi +24 -0

index 6c15112..19629c9 100644
@@ -276,6 +276,30 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+					  <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+					  <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			regulators {
+				compatible = "qcom,rpm-pm8921-regulators";
+
+				pm8921_hdmi_switch: hdmi-switch {
+					bias-pull-down;
+				};
+			};
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #16 lore raw

PATCH v2 2/12 ARM: dts: apq8064-ifc6410: Add basic regulators

In reply to Srinivas Kandagatla

This patch adds support to basic regulators wiredup on IFC6410 board.

All these regulators are tested as part of USB, SATA and HDMI.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 67 ++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +67 -0

index e641001..ca2d7ba 100644
@@ -23,6 +23,73 @@
 			};
 		};
 
+		rpm at 108000 {
+			regulators {
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s1>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l26-supply = <&pm8921_s7>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
+
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
+				pm8921_s3: s3 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1400000>;
+					qcom,switch-mode-frequency = <4800000>;
+				};
+
+				pm8921_s4: s4 {
+					regulator-min-microvolt	= <1800000>;
+					regulator-max-microvolt	= <1800000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_s7: s7 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_l3: l3 {
+					regulator-min-microvolt = <3050000>;
+					regulator-max-microvolt = <3300000>;
+					bias-pull-down;
+				};
+
+				pm8921_l4: l4 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l6: l6 {
+					regulator-min-microvolt = <2950000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l23: l23 {
+					regulator-min-microvolt = <1700000>;
+					regulator-max-microvolt = <1900000>;
+					bias-pull-down;
+				};
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #17 lore raw

PATCH v2 3/12 ARM: dts: apq8064: Add usb host support.

In reply to Srinivas Kandagatla

This patch adds device tree nodes to support two usb hosts on APQ8064 SOC.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +22 -0

index ca2d7ba..8fe60fc 100644
@@ -116,6 +116,28 @@
 			};
 		};
 
+		usb3_phy: phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

arch/arm/boot/dts/qcom-apq8064.dtsi +47 -0

59 lines not on this page · raw message

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #18 lore raw

PATCH v2 4/12 ARM: dts: apq8064: Add USB OTG support

In reply to Srinivas Kandagatla

This patch adds USB OTG support on USB1 of APQ8064 SOC. Tested on IFC6410 with ethernet gadget.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 17 ++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +17 -0

index 8fe60fc..122bf34 100644
@@ -116,6 +116,14 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy: phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;

@@ -130,6 +138,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget at 12500000 {
+			status = "okay";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "okay";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

arch/arm/boot/dts/qcom-apq8064.dtsi +32 -0

index 99d8e07..5aac9a5 100644
@@ -301,6 +301,21 @@
 			};
 		};
 
+		usb1_phy: phy at 12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy: phy at 12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;

@@ -331,6 +346,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1: gadget at 12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb at 12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb at 12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #19 lore raw

PATCH v2 5/12 ARM: dts: apq8064: Add SATA controller support.

In reply to Srinivas Kandagatla

This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  9 ++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +9 -0

index 122bf34..c9c9c5e 100644
@@ -116,6 +116,15 @@
 			};
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy at 12500000 {
 			status		= "okay";

arch/arm/boot/dts/qcom-apq8064.dtsi +35 -0

index 5aac9a5..56cc65e 100644
@@ -379,6 +379,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata at 29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+						<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Stephen Boyd

2015-04-10 17:24 UTC #20 lore raw

Re: [PATCH v2 05/12] ARM: dts: apq8064: Add SATA controller support.

Quoted 14 lines · Srinivas Kandagatla

This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board.
Signed-off-by Srinivas Kandagatla <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  9 ++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +0 -0
index 122bf34..c9c9c5e 100644

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts line 119

Quoted 4 lines

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +1 -0
@@ -116,6 +116,15 @@
 			};
 		};
 
+		sata_phy0: sata-phy at 1b400000{

Space before '{' please.

Quoted 16 lines

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +8 -0

+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy at 12500000 {
 			status		= "okay";

arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0

index 5aac9a5..56cc65e 100644

arch/arm/boot/dts/qcom-apq8064.dtsi line 382

Quoted 4 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -0

@@ -379,6 +379,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy at 1b400000{

Space before '{' please. Also I wonder if it should just be called phy at 1b400000 because phy is more standard than sata-phy.

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Srinivas Kandagatla

author

2015-04-10 18:33 UTC #21 lore raw

Re: [PATCH v2 05/12] ARM: dts: apq8064: Add SATA controller support.

Quoted 18 lines · Stephen Boyd

Quoted 17 lines · Srinivas Kandagatla
This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board.
Signed-off-by Srinivas Kandagatla <[email protected]>
---
  arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  9 ++++++++
  arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
  2 files changed, 44 insertions(+)
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +0 -0
index 122bf34..c9c9c5e 100644
@@ -116,6 +116,15 @@
  			};
  		};
 

Quoted 3 lines

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts line 119
Quoted 1 line
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +1 -0
+		sata_phy0: sata-phy at 1b400000{
Space before '{' please.

Yeo, Will fix it in next version.

Quoted 20 lines

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +8 -0

+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
  		/* OTG */
  		usb1_phy: phy at 12500000 {
  			status		= "okay";

arch/arm/boot/dts/qcom-apq8064.dtsi +0 -0

index 5aac9a5..56cc65e 100644
@@ -379,6 +379,41 @@
  			usb-phy		= <&usb4_phy>;
  		};

Quoted 4 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 382
Quoted 1 line
arch/arm/boot/dts/qcom-apq8064.dtsi +1 -0
+		sata_phy0: sata-phy at 1b400000{
Space before '{' please. Also I wonder if it should just be called phy at 1b400000 because phy is more standard than sata-phy.

Make sense, I will fix it in next version.

Quoted 1 line

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #22 lore raw

PATCH v2 6/12 ARM: dts: apq8064: Add MDP support

In reply to Srinivas Kandagatla

From: Rob Clark <[email protected]>

This patch adds MDP node to APQ8064 dt.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: Fixed the hdmi switch regulator name]

Signed-off-by Rob Clark <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 104 ++++++++++++++++++++++++++++++++++++
 1 file changed, 104 insertions(+)

arch/arm/boot/dts/qcom-apq8064.dtsi +104 -0

index 56cc65e..c88470c 100644
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>

@@ -107,6 +108,20 @@
 				};
 			};
 
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux1 {
+					pins = "gpio69", "gpio70", "gpio71";
+					function = "hdmi";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+				mux2 {
+					pins = "gpio72";
+					function = "hdmi";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 			ps_hold: ps_hold {
 				mux {
 					pins = "gpio78";

@@ -250,6 +265,18 @@
 			};
 		};
 
+		ext_3p3v: regulator-fixed at 1 {
+			compatible = "regulator-fixed";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-name = "ext_3p3v";
+			regulator-type = "voltage";
+			startup-delay-us = <0>;
+			gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			regulator-boot-on;
+		};
+
 		qcom,ssbi at 500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;

@@ -522,5 +549,82 @@
 			compatible = "qcom,tcsr-apq8064", "syscon";
 			reg = <0x1a400000 0x100>;
 		};
+
+		hdmi: qcom,hdmi-tx at 4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg-names = "core_physical";
+			reg = <0x04a00000 0x1000>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clock-names =
+			    "core_clk",
+			    "master_iface_clk",
+			    "slave_iface_clk";
+			clocks =
+			    <&mmcc HDMI_APP_CLK>,
+			    <&mmcc HDMI_M_AHB_CLK>,
+			    <&mmcc HDMI_S_AHB_CLK>;
+			qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+						GPIO_ACTIVE_HIGH>;
+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+		};
+
+		gpu: qcom,adreno-3xx at 4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;
+			qcom,chipid = <0x03020002>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel at 0 {
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel at 1 {
+					qcom,gpu-freq = <27000000>;
+				};
+			};
+		};
+
+		mdp: qcom,mdp at 5100000 {
+			compatible = "qcom,mdp";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 IRQ_TYPE_NONE>;
+			connectors = <&hdmi>;
+			gpus = <&gpu>;
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "lut_clk",
+			    "src_clk",
+			    "hdmi_clk",
+			    "mdp_clk",
+			    "mdp_axi_clk";
+			clocks =
+			    <&mmcc MDP_CLK>,
+			    <&mmcc MDP_AHB_CLK>,
+			    <&mmcc MDP_LUT_CLK>,
+			    <&mmcc TV_SRC>,
+			    <&mmcc HDMI_TV_CLK>,
+			    <&mmcc MDP_TV_CLK>,
+			    <&mmcc MDP_AXI_CLK>;
+		};
 	};
 };

Signature · 1 line

1.9.1

Stephen Boyd

2015-04-10 17:04 UTC #23 lore raw

Re: [PATCH v2 06/12] ARM: dts: apq8064: Add MDP support

Quoted 5 lines · Srinivas Kandagatla

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -0

@@ -250,6 +265,18 @@
 			};
 		};
 
+		ext_3p3v: regulator-fixed at 1 {

arch/arm/boot/dts/qcom-apq8064.dtsi line 278

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0

+			compatible = "regulator-fixed";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-name = "ext_3p3v";
+			regulator-type = "voltage";
+			startup-delay-us = <0>;
+			gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			regulator-boot-on;
+		};

This shouldn't be inside the SoC node because it doesn't have a reg property. It should be in a 'regulators' node that's in the root of the tree:

	regulators {
		compatible = "simple-bus";

		ext_3p3v: fixedregulator at 0 {
			compatible = "regulator-fixed";
			...
		};
	};

Quoted 18 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +11 -0

+
 		qcom,ssbi at 500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;

@@ -522,5 +549,82 @@
 			compatible = "qcom,tcsr-apq8064", "syscon";
 			reg = <0x1a400000 0x100>;
 		};
+
+		hdmi: qcom,hdmi-tx at 4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg-names = "core_physical";
+			reg = <0x04a00000 0x1000>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clock-names =
+			    "core_clk",
+			    "master_iface_clk",
+			    "slave_iface_clk";

arch/arm/boot/dts/qcom-apq8064.dtsi line 571

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0

+			clocks =
+			    <&mmcc HDMI_APP_CLK>,
+			    <&mmcc HDMI_M_AHB_CLK>,
+			    <&mmcc HDMI_S_AHB_CLK>;
+			qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+						GPIO_ACTIVE_HIGH>;

This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios, hdmi-tx-ddc-data-gpios, etc.

Quoted 22 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +22 -0

+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+		};
+
+		gpu: qcom,adreno-3xx at 4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;

arch/arm/boot/dts/qcom-apq8064.dtsi line 603

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0

+			qcom,chipid = <0x03020002>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel at 0 {
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel at 1 {
+					qcom,gpu-freq = <27000000>;
+				};
+			};

This should be an OPP.

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Srinivas Kandagatla

author

2015-04-10 19:39 UTC #24 lore raw

Re: [PATCH v2 06/12] ARM: dts: apq8064: Add MDP support

Quoted 5 lines · Stephen Boyd

Quoted 4 lines · Srinivas Kandagatla
(quoted diff) +0 -0
@@ -250,6 +265,18 @@
  			};
  		};
 

Quoted 15 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 278
Quoted 11 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +11 -0
+		ext_3p3v: regulator-fixed at 1 {
+			compatible = "regulator-fixed";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-name = "ext_3p3v";
+			regulator-type = "voltage";
+			startup-delay-us = <0>;
+			gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			regulator-boot-on;
+		};
This shouldn't be inside the SoC node because it doesn't have a reg property. It should be in a 'regulators' node that's in the root of the tree:

Is this new DT requirement/style? I have not noticed such a dt style in the past. I might have missed it. Any advantage of doing this way?

Quoted 10 lines

	regulators {
		compatible = "simple-bus";

		ext_3p3v: fixedregulator at 0 {
			compatible = "regulator-fixed";
			...
		};
	};

I will move this to the suggested style in next version.

Quoted 24 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +16 -0

+
  		qcom,ssbi at 500000 {
  			compatible = "qcom,ssbi";
  			reg = <0x00500000 0x1000>;

@@ -522,5 +549,82 @@
  			compatible = "qcom,tcsr-apq8064", "syscon";
  			reg = <0x1a400000 0x100>;
  		};
+
+		hdmi: qcom,hdmi-tx at 4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg-names = "core_physical";
+			reg = <0x04a00000 0x1000>;
+			interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+			clock-names =
+			    "core_clk",
+			    "master_iface_clk",
+			    "slave_iface_clk";
+			clocks =
+			    <&mmcc HDMI_APP_CLK>,
+			    <&mmcc HDMI_M_AHB_CLK>,
+			    <&mmcc HDMI_S_AHB_CLK>;
+			qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70

Quoted 9 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 571
Quoted 5 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +5 -0
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+						GPIO_ACTIVE_HIGH>;
This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios, hdmi-tx-ddc-data-gpios, etc.

Thanks for the inputs,

That's true, These are existing bindings, so I can't change it as part of this patch, However I will make another patch to fix this in both drivers and DT for good reasons. Just noticed that bindings are not consistent with the examples and the driver, which I guess is another issue.

Quoted 26 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +26 -0

+			core-vdda-supply = <&pm8921_hdmi_switch>;
+			hdmi-mux-supply = <&ext_3p3v>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+		};
+
+		gpu: qcom,adreno-3xx at 4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 IRQ_TYPE_NONE>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;
+			qcom,chipid = <0x03020002>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel at 0 {

Quoted 8 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 603
Quoted 6 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +6 -0
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel at 1 {
+					qcom,gpu-freq = <27000000>;
+				};
+			};
This should be an OPP.

Yes, that looks reasonable approch, But as I said before the driver and the bindings are still using this style, so I cant change this as part of this patch. I will create another patch to for better bindings with driver fixes too.

Quoted 1 line

Stephen Boyd

2015-04-10 20:21 UTC #25 lore raw

Re: [PATCH v2 06/12] ARM: dts: apq8064: Add MDP support

Quoted 24 lines · Srinivas Kandagatla

Quoted 5 lines · Stephen Boyd
Quoted 4 lines · Srinivas Kandagatla
(quoted diff) +0 -0
@@ -250,6 +265,18 @@
              };
          };
 
Quoted 15 lines
arch/arm/boot/dts/qcom-apq8064.dtsi line 278
Quoted 11 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +11 -0
+        ext_3p3v: regulator-fixed at 1 {
+            compatible = "regulator-fixed";
+            regulator-min-microvolt = <3300000>;
+            regulator-max-microvolt = <3300000>;
+            regulator-name = "ext_3p3v";
+            regulator-type = "voltage";
+            startup-delay-us = <0>;
+            gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+            enable-active-high;
+            regulator-boot-on;
+        };
This shouldn't be inside the SoC node because it doesn't have a reg property. It should be in a 'regulators' node that's in the root of the tree:

Quoted 2 lines

Is this new DT requirement/style? I have not noticed such a dt style in the past. I might have missed it. Any advantage of doing this way?

It's a style. I'm not sure if it's new, but I feel like I've seen mention of it before more than a year ago (see arch/arm/boot/dts/tegra30-beaver.dts for an example). The advantage of doing it this way is we can see all the gpio/fixed regulators in one place and they're physically placed on a separate bus from the SoC bus. Typically nodes have reg properties too, so making up fake reg properties for the regulator nodes when they're on the SoC bus would be wrong and confusing. If they're under some regulators container node we can number them from 0 to N and use that for the reg property.

Quoted 11 lines

Quoted 10 lines

    regulators {
        compatible = "simple-bus";

        ext_3p3v: fixedregulator at 0 {
            compatible = "regulator-fixed";
            ...
        };
    };

I will move this to the suggested style in next version.

Thanks.

Quoted 33 lines

Quoted 24 lines

arch/arm/boot/dts/qcom-apq8064.dtsi +16 -0

+
          qcom,ssbi at 500000 {
              compatible = "qcom,ssbi";
              reg = <0x00500000 0x1000>;

@@ -522,5 +549,82 @@
              compatible = "qcom,tcsr-apq8064", "syscon";
              reg = <0x1a400000 0x100>;
          };
+
+        hdmi: qcom,hdmi-tx at 4a00000 {
+            compatible = "qcom,hdmi-tx-8960";
+            reg-names = "core_physical";
+            reg = <0x04a00000 0x1000>;
+            interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+            clock-names =
+                "core_clk",
+                "master_iface_clk",
+                "slave_iface_clk";
+            clocks =
+                <&mmcc HDMI_APP_CLK>,
+                <&mmcc HDMI_M_AHB_CLK>,
+                <&mmcc HDMI_S_AHB_CLK>;
+            qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70

Quoted 9 lines

arch/arm/boot/dts/qcom-apq8064.dtsi line 571
Quoted 5 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +5 -0
+                        GPIO_ACTIVE_HIGH>;
+            qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+                        GPIO_ACTIVE_HIGH>;
+            qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+                        GPIO_ACTIVE_HIGH>;
This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios, hdmi-tx-ddc-data-gpios, etc.

Quoted 7 lines

Thanks for the inputs,
That's true, These are existing bindings, so I can't change it as part of this patch, However I will make another patch to fix this in both drivers and DT for good reasons. Just noticed that bindings are not consistent with the examples and the driver, which I guess is another issue.

Yes, the driver/binding should be fixed and then this patch can be corrected and applied. There are no implementations of the DT for this device upstream in the dts directory so there's no breakage or backwards incompatibility problem by fixing the driver/binding.

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Srinivas Kandagatla

author

2015-04-10 20:30 UTC #26 lore raw

Re: [PATCH v2 06/12] ARM: dts: apq8064: Add MDP support

Quoted 28 lines · Stephen Boyd

Quoted 24 lines · Srinivas Kandagatla
Quoted 5 lines · Stephen Boyd
Quoted 4 lines · Srinivas Kandagatla
(quoted diff) +0 -0
@@ -250,6 +265,18 @@
               };
           };
 
Quoted 15 lines
arch/arm/boot/dts/qcom-apq8064.dtsi line 278
Quoted 11 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +11 -0
+        ext_3p3v: regulator-fixed at 1 {
+            compatible = "regulator-fixed";
+            regulator-min-microvolt = <3300000>;
+            regulator-max-microvolt = <3300000>;
+            regulator-name = "ext_3p3v";
+            regulator-type = "voltage";
+            startup-delay-us = <0>;
+            gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+            enable-active-high;
+            regulator-boot-on;
+        };
This shouldn't be inside the SoC node because it doesn't have a reg property. It should be in a 'regulators' node that's in the root of the tree:
Quoted 2 lines
Is this new DT requirement/style? I have not noticed such a dt style in the past. I might have missed it. Any advantage of doing this way?

Quoted 10 lines

It's a style. I'm not sure if it's new, but I feel like I've seen mention of it before more than a year ago (see arch/arm/boot/dts/tegra30-beaver.dts for an example). The advantage of doing it this way is we can see all the gpio/fixed regulators in one place and they're physically placed on a separate bus from the SoC bus. Typically nodes have reg properties too, so making up fake reg properties for the regulator nodes when they're on the SoC bus would be wrong and confusing. If they're under some regulators container node we can number them from 0 to N and use that for the reg property.

Thanks for explaining.

Quoted 33 lines

Quoted 25 lines
Quoted 22 lines
Quoted 11 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+
+        hdmi: qcom,hdmi-tx at 4a00000 {
+            compatible = "qcom,hdmi-tx-8960";
+            reg-names = "core_physical";
+            reg = <0x04a00000 0x1000>;
+            interrupts = <GIC_SPI 79 IRQ_TYPE_NONE>;
+            clock-names =
+                "core_clk",
+                "master_iface_clk",
+                "slave_iface_clk";
arch/arm/boot/dts/qcom-apq8064.dtsi line 571
Quoted 10 lines
arch/arm/boot/dts/qcom-apq8064.dtsi +10 -0
+            clocks =
+                <&mmcc HDMI_APP_CLK>,
+                <&mmcc HDMI_M_AHB_CLK>,
+                <&mmcc HDMI_S_AHB_CLK>;
+            qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+                        GPIO_ACTIVE_HIGH>;
+            qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+                        GPIO_ACTIVE_HIGH>;
+            qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+                        GPIO_ACTIVE_HIGH>;
Quoted 3 lines
This should be done via the *-gpios method. i.e. hdmi-tx-ddc-clk-gpios, hdmi-tx-ddc-data-gpios, etc.
Quoted 7 lines
Thanks for the inputs,
That's true, These are existing bindings, so I can't change it as part of this patch, However I will make another patch to fix this in both drivers and DT for good reasons. Just noticed that bindings are not consistent with the examples and the driver, which I guess is another issue.

Quoted 5 lines

Yes, the driver/binding should be fixed and then this patch can be corrected and applied. There are no implementations of the DT for this device upstream in the dts directory so there's no breakage or backwards incompatibility problem by fixing the driver/binding.

Yep, In that case, I should pull this patch out of this series just to avoid any delays and create a new patchset for fixing bindings + driver
+ DT.

Rob Clark

2015-04-10 21:01 UTC #27 lore raw

Re: [PATCH v2 06/12] ARM: dts: apq8064: Add MDP support

In reply to Stephen Boyd

Quoted 10 lines · Stephen Boyd

Quoted 5 lines
That's true, These are existing bindings, so I can't change it as part of this patch, However I will make another patch to fix this in both drivers and DT for good reasons. Just noticed that bindings are not consistent with the examples and the driver, which I guess is another issue.
Yes, the driver/binding should be fixed and then this patch can be corrected and applied. There are no implementations of the DT for this device upstream in the dts directory so there's no breakage or backwards incompatibility problem by fixing the driver/binding.

jfyi, some of the current bindings are the way they are to simplify compatibility w/ downstream kernels which I unfortunately still have to deal with.. ofc, the sooner I don't have to deal w/ downstream kernels, the easier it gets to clean up ;-)

ofc, since the number of devices that can run upstream kernel but don't have upstream dts files is approximately zero, this would be a case were it would be useful to be able to mark certain bindings as non-abi and refactor them later.

BR,
-R

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #28 lore raw

PATCH v2 7/12 ARM: dts: apq8064-cm-qs600: Add basic regulators.

In reply to Srinivas Kandagatla

This patch adds basic regulator support for USB and HDMI.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 61 +++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +61 -0

index 5d75666..142885d 100644
@@ -14,6 +14,67 @@
 			};
 		};
 
+		rpm at 108000 {
+			regulators {
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s1>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l26-supply = <&pm8921_s7>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
+
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
+				pm8921_s3: s3 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1400000>;
+					qcom,switch-mode-frequency = <4800000>;
+				};
+
+				pm8921_s4: s4 {
+					regulator-min-microvolt	= <1800000>;
+					regulator-max-microvolt	= <1800000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_s7: s7 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_l3: l3 {
+					regulator-min-microvolt = <3050000>;
+					regulator-max-microvolt = <3300000>;
+					bias-pull-down;
+				};
+
+				pm8921_l4: l4 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l23: l23 {
+					regulator-min-microvolt = <1700000>;
+					regulator-max-microvolt = <1900000>;
+					bias-pull-down;
+				};
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #29 lore raw

PATCH v2 8/12 ARM: dts: apq8064: Add usb host support to CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: fixed up regulators and status properties]

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +22 -0

index 142885d..fc69931 100644
@@ -101,6 +101,28 @@
 			};
 		};
 
+		usb3_phy:phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy:phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:34 UTC #30 lore raw

PATCH v2 9/12 ARM: dts: apq8064: Add USB OTG support for CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds USB OTG support on USB1 for Compulab QS-600 Board.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: fixed up regulators and status properties]

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +17 -0

index fc69931..d353694 100644
@@ -101,6 +101,14 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy:phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy:phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;

@@ -115,6 +123,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1:gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "ok";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

Signature · 1 line

1.9.1

Stephen Boyd

2015-04-10 17:26 UTC #31 lore raw

Re: [PATCH v2 09/12] ARM: dts: apq8064: Add USB OTG support for CM QS-600

Quoted 16 lines · Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by Nicolas Dechesne <[email protected]>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +0 -0
index fc69931..d353694 100644

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts line 105

Quoted 5 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +2 -0

@@ -101,6 +101,14 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy:phy at 12500000 {

Space after that ':' please.

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +6 -0

+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy:phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts line 131

Quoted 9 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +6 -0

@@ -115,6 +123,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1:gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {

This one is good.

Quoted 6 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +3 -0

+			status = "ok";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Srinivas Kandagatla

author

2015-04-10 18:32 UTC #32 lore raw

Re: [PATCH v2 09/12] ARM: dts: apq8064: Add USB OTG support for CM QS-600

Quoted 20 lines · Stephen Boyd

Quoted 19 lines · Srinivas Kandagatla
From: Nicolas Dechesne <[email protected]>
This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
Signed-off-by Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: fixed up regulators and status properties]
Signed-off-by Nicolas Dechesne <[email protected]>
---
  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
  1 file changed, 17 insertions(+)
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +0 -0
index fc69931..d353694 100644
@@ -101,6 +101,14 @@
  			};
  		};
 

Quoted 5 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts line 105
Quoted 2 lines
arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +2 -0
+		/* OTG */
+		usb1_phy:phy at 12500000 {
Space after that ':' please.

Yep, I will fix it in next version.

Quoted 30 lines

Quoted 10 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +6 -0

+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
  		usb3_phy:phy at 12520000 {
  			status		= "okay";
  			vddcx-supply	= <&pm8921_s3>;

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts line 131

Quoted 9 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +6 -0

@@ -115,6 +123,15 @@
  			v1p8-supply	= <&pm8921_l23>;
  		};
 
+		gadget1:gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {

This one is good.

Quoted 6 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +3 -0

+			status = "ok";
+		};
+
  		usb3: usb at 12520000 {
  			status = "okay";
  		};

Srinivas Kandagatla

author

2015-04-10 12:35 UTC #33 lore raw

PATCH v2 10/12 ARM: dts: apq8064-ifc6410: Add DT alias for serial port

In reply to Srinivas Kandagatla

From: Pramod Gurav <[email protected]>

Define an alias for serial port present on ifc6410 which is used as console.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: renamed the serial0 label appropriately]

Signed-off-by Pramod Gurav <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 3 +--
 2 files changed, 5 insertions(+), 2 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +4 -0

index c9c9c5e..f319721 100644
@@ -5,6 +5,10 @@
 	model = "Qualcomm APQ8064/IFC6410";
 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
 
+	aliases {
+		serial0 = &gsbi7_serial;
+	};
+
 	soc {
 		pinctrl at 800000 {
 			i2c1_pins: i2c1 {

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -2

index c88470c..d7f70d7 100644
@@ -251,10 +251,9 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
-
 			syscon-tcsr = <&tcsr>;
 
-			serial at 16640000 {
+			gsbi7_serial: serial at 16640000 {
 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 				reg = <0x16640000 0x1000>,
 				      <0x16600000 0x1000>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:35 UTC #34 lore raw

PATCH v2 11/12 ARM: dts: apq8064: Move i2c1 pinctrl to apq8064.dtsi

In reply to Srinivas Kandagatla

I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would avoid redefining this in every board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 7 +++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +0 -7

index f319721..8f955d8 100644
@@ -11,13 +11,6 @@
 
 	soc {
 		pinctrl at 800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-
 			card_detect: card_detect {
 				mux {
 					pins = "gpio26";

arch/arm/boot/dts/qcom-apq8064.dtsi +7 -0

index d7f70d7..c87f92a 100644
@@ -128,6 +128,13 @@
 					function = "ps_hold";
 				};
 			};
+
+			i2c1_pins: i2c1 {
+				mux {
+					pins = "gpio20", "gpio21";
+					function = "gsbi1";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 12:35 UTC #35 lore raw

PATCH v2 12/12 ARM: dts: apq8064: add i2c3 node for panel.

In reply to Srinivas Kandagatla

This patch adds i2c3 node which is used for panel control on IFC6410.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 27 +++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +10 -0

index 8f955d8..45855c5 100644
@@ -87,6 +87,16 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "okay";
+			qcom,mode = <GSBI_PROT_I2C>;
+			i2c3: i2c at 16280000 {
+				status = "okay";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

arch/arm/boot/dts/qcom-apq8064.dtsi +27 -0

index c87f92a..00f725e 100644
@@ -135,6 +135,13 @@
 					function = "gsbi1";
 				};
 			};
+
+			i2c3_pins: i2c3 {
+				mux {
+					pins = "gpio8", "gpio9";
+					function = "gsbi3";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

@@ -248,6 +255,26 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "disabled";
+			compatible = "qcom,gsbi-v1.0.0";
+			reg = <0x16200000 0x100>;
+			clocks = <&gcc GSBI3_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			i2c3: i2c at 16280000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16280000 0x1000>;
+				interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+				clocks = <&gcc GSBI3_QUP_CLK>,
+					 <&gcc GSBI3_H_CLK>;
+				clock-names = "core", "iface";
+			};
+		};
+
 		gsbi7: gsbi at 16600000 {
 			status = "disabled";
 			compatible = "qcom,gsbi-v1.0.0";

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:41 UTC #36 lore raw

v3 cover ARM: dts: apq8064 dt patches

In reply to Srinivas Kandagatla

Thanks all for reviewing v2 patches.

Hi Kumar,

Now that the rpm redesign dependency is resolved, If its not too late could you queue these dt patches for v4.1-rc1 or v4.1-rc2.

I tested these patches on APQ8064 based IFC6410 and CMQS600 board with SATA/USB. I also rebased these patches on top of your qcom/dt branch.

Thanks,
srini

Changes since v2
* Some cosmetic fixes spotted by Stephen Boyd.
* Rename sata_phy to phy suggested by Stephen Boyd
* Dropped MDP patch to track it in different patchset.

Changes since v1
* Made regulators board specific, as suggested by Bjorn.
* Used correct IRQF flags for rpm, spotted by Bjorn.
* Fixed serial lable to be more appropriate, spotted by Bjorn.

Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600

Pramod Gurav (1):
ARM: dts: apq8064-ifc6410: Add DT alias for serial port

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 100 ++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  | 136 +++++++++++++++++++--
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 175 +++++++++++++++++++++++++++-
 3 files changed, 402 insertions(+), 9 deletions(-)

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:42 UTC #37 lore raw

PATCH v3 1/11 ARM: dts: apq8064: add RPM regulators support

This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

arch/arm/boot/dts/qcom-apq8064.dtsi +24 -0

index 6c15112..19629c9 100644
@@ -276,6 +276,30 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
+					  <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
+					  <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			regulators {
+				compatible = "qcom,rpm-pm8921-regulators";
+
+				pm8921_hdmi_switch: hdmi-switch {
+					bias-pull-down;
+				};
+			};
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Bjorn Andersson

Reviewed-by on v3 1/11

2015-04-10 21:04 UTC #38 lore raw

Re: [PATCH v3 01/11] ARM: dts: apq8064: add RPM regulators support

Quoted 4 lines · Srinivas Kandagatla

This patch adds rpm node to apq8064 dt as rpm would be used by other devices for regulator support.
Signed-off-by Srinivas Kandagatla <[email protected]>

Reviewed-by Bjorn Andersson <[email protected]>

Regards,
Bjorn

Srinivas Kandagatla

author

2015-04-10 20:43 UTC #39 lore raw

PATCH v3 2/11 ARM: dts: apq8064-ifc6410: Add basic regulators

In reply to Srinivas Kandagatla

This patch adds support to basic regulators wiredup on IFC6410 board.

All these regulators are tested as part of USB, SATA and HDMI.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 67 ++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +67 -0

index e641001..ca2d7ba 100644
@@ -23,6 +23,73 @@
 			};
 		};
 
+		rpm at 108000 {
+			regulators {
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s1>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l26-supply = <&pm8921_s7>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
+
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
+				pm8921_s3: s3 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1400000>;
+					qcom,switch-mode-frequency = <4800000>;
+				};
+
+				pm8921_s4: s4 {
+					regulator-min-microvolt	= <1800000>;
+					regulator-max-microvolt	= <1800000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_s7: s7 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_l3: l3 {
+					regulator-min-microvolt = <3050000>;
+					regulator-max-microvolt = <3300000>;
+					bias-pull-down;
+				};
+
+				pm8921_l4: l4 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l6: l6 {
+					regulator-min-microvolt = <2950000>;
+					regulator-max-microvolt = <2950000>;
+					bias-pull-down;
+				};
+
+				pm8921_l23: l23 {
+					regulator-min-microvolt = <1700000>;
+					regulator-max-microvolt = <1900000>;
+					bias-pull-down;
+				};
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:43 UTC #40 lore raw

PATCH v3 3/11 ARM: dts: apq8064: Add usb host support.

In reply to Srinivas Kandagatla

This patch adds device tree nodes to support two usb hosts on APQ8064 SOC.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +22 -0

index ca2d7ba..8fe60fc 100644
@@ -116,6 +116,28 @@
 			};
 		};
 
+		usb3_phy: phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

arch/arm/boot/dts/qcom-apq8064.dtsi +47 -0

59 lines not on this page · raw message

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:43 UTC #41 lore raw

PATCH v3 4/11 ARM: dts: apq8064: Add USB OTG support

In reply to Srinivas Kandagatla

This patch adds USB OTG support on USB1 of APQ8064 SOC. Tested on IFC6410 with ethernet gadget.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 17 ++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +17 -0

index 8fe60fc..122bf34 100644
@@ -116,6 +116,14 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy: phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;

@@ -130,6 +138,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget at 12500000 {
+			status = "okay";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "okay";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

arch/arm/boot/dts/qcom-apq8064.dtsi +32 -0

index 99d8e07..5aac9a5 100644
@@ -301,6 +301,21 @@
 			};
 		};
 
+		usb1_phy: phy at 12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy: phy at 12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;

@@ -331,6 +346,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1: gadget at 12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb at 12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <GIC_SPI 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb at 12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:43 UTC #42 lore raw

PATCH v3 5/11 ARM: dts: apq8064: Add SATA controller support.

In reply to Srinivas Kandagatla

This patch adds AHCI based SATA controller support to APQ8064. Tested on IFC6410 board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts |  9 ++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +9 -0

index 122bf34..3d96cb8 100644
@@ -116,6 +116,15 @@
 			};
 		};
 
+		sata_phy0: phy at 1b400000 {
+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy at 12500000 {
 			status		= "okay";

arch/arm/boot/dts/qcom-apq8064.dtsi +35 -0

index 5aac9a5..1f900c7 100644
@@ -379,6 +379,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: phy at 1b400000 {
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata at 29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <GIC_SPI 209 IRQ_TYPE_NONE>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+						<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #43 lore raw

PATCH v3 6/11 ARM: dts: apq8064-cm-qs600: Add basic regulators.

In reply to Srinivas Kandagatla

This patch adds basic regulator support for USB and HDMI.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 61 +++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +61 -0

index 5d75666..142885d 100644
@@ -14,6 +14,67 @@
 			};
 		};
 
+		rpm at 108000 {
+			regulators {
+				vin_lvs1_3_6-supply = <&pm8921_s4>;
+				vin_lvs2-supply = <&pm8921_s1>;
+				vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+				vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+				vdd_l24-supply = <&pm8921_s1>;
+				vdd_l25-supply = <&pm8921_s1>;
+				vdd_l26-supply = <&pm8921_s7>;
+				vdd_l27-supply = <&pm8921_s7>;
+				vdd_l28-supply = <&pm8921_s7>;
+
+
+				/* Buck SMPS */
+				pm8921_s1: s1 {
+					regulator-always-on;
+					regulator-min-microvolt = <1225000>;
+					regulator-max-microvolt = <1225000>;
+					qcom,switch-mode-frequency = <3200000>;
+					bias-pull-down;
+				};
+
+				pm8921_s3: s3 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1400000>;
+					qcom,switch-mode-frequency = <4800000>;
+				};
+
+				pm8921_s4: s4 {
+					regulator-min-microvolt	= <1800000>;
+					regulator-max-microvolt	= <1800000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_s7: s7 {
+					regulator-min-microvolt = <1300000>;
+					regulator-max-microvolt = <1300000>;
+					qcom,switch-mode-frequency = <3200000>;
+				};
+
+				pm8921_l3: l3 {
+					regulator-min-microvolt = <3050000>;
+					regulator-max-microvolt = <3300000>;
+					bias-pull-down;
+				};
+
+				pm8921_l4: l4 {
+					regulator-min-microvolt = <1000000>;
+					regulator-max-microvolt = <1800000>;
+					bias-pull-down;
+				};
+
+				pm8921_l23: l23 {
+					regulator-min-microvolt = <1700000>;
+					regulator-max-microvolt = <1900000>;
+					bias-pull-down;
+				};
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #44 lore raw

PATCH v3 7/11 ARM: dts: apq8064: Add usb host support to CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: fixed up regulators and status properties]

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +22 -0

index 142885d..4eedfe4 100644
@@ -101,6 +101,28 @@
 			};
 		};
 
+		usb3_phy: phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #45 lore raw

PATCH v3 8/11 ARM: dts: apq8064: Add USB OTG support for CM QS-600

In reply to Srinivas Kandagatla

From: Nicolas Dechesne <[email protected]>

This patch adds USB OTG support on USB1 for Compulab QS-600 Board.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: fixed up regulators and status properties]

Signed-off-by Nicolas Dechesne <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +17 -0

index 4eedfe4..71512b3 100644
@@ -101,6 +101,14 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy: phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;

@@ -115,6 +123,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "ok";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #46 lore raw

PATCH v3 9/11 ARM: dts: apq8064-ifc6410: Add DT alias for serial port

In reply to Srinivas Kandagatla

From: Pramod Gurav <[email protected]>

Define an alias for serial port present on ifc6410 which is used as console.

Signed-off-by Srinivas Kandagatla <[email protected]>

[Srinivas Kandagatla: renamed the serial0 label appropriately]

Signed-off-by Pramod Gurav <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 3 +--
 2 files changed, 5 insertions(+), 2 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +4 -0

index 3d96cb8..528cb31 100644
@@ -5,6 +5,10 @@
 	model = "Qualcomm APQ8064/IFC6410";
 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
 
+	aliases {
+		serial0 = &gsbi7_serial;
+	};
+
 	soc {
 		pinctrl at 800000 {
 			i2c1_pins: i2c1 {

arch/arm/boot/dts/qcom-apq8064.dtsi +1 -2

index 1f900c7..93de48a 100644
@@ -236,10 +236,9 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
-
 			syscon-tcsr = <&tcsr>;
 
-			serial at 16640000 {
+			gsbi7_serial: serial at 16640000 {
 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 				reg = <0x16640000 0x1000>,
 				      <0x16600000 0x1000>;

Signature · 1 line

1.9.1

Bjorn Andersson

Reviewed-by on v3 9/11

2015-04-10 21:07 UTC #47 lore raw

Re: [PATCH v3 09/11] ARM: dts: apq8064-ifc6410: Add DT alias for serial port

Quoted 9 lines · Srinivas Kandagatla

From: Pramod Gurav <[email protected]>
Define an alias for serial port present on ifc6410 which is used as console.
Signed-off-by Srinivas Kandagatla <[email protected]>
[Srinivas Kandagatla: renamed the serial0 label appropriately]
Signed-off-by Pramod Gurav <[email protected]>
---

The order of the sobs should be reversed, your name should be last as you're the last one touching the patch.

Reviewed-by Bjorn Andersson <[email protected]>

Regards,
Bjorn

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #48 lore raw

PATCH v3 10/11 ARM: dts: apq8064: Move i2c1 pinctrl to apq8064.dtsi

In reply to Srinivas Kandagatla

I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would avoid redefining this in every board.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 7 +++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +0 -7

index 528cb31..f97339a 100644
@@ -11,13 +11,6 @@
 
 	soc {
 		pinctrl at 800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-
 			card_detect: card_detect {
 				mux {
 					pins = "gpio26";

arch/arm/boot/dts/qcom-apq8064.dtsi +7 -0

index 93de48a..345ea08 100644
@@ -113,6 +113,13 @@
 					function = "ps_hold";
 				};
 			};
+
+			i2c1_pins: i2c1 {
+				mux {
+					pins = "gpio20", "gpio21";
+					function = "gsbi1";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

Signature · 1 line

1.9.1

Srinivas Kandagatla

author

2015-04-10 20:44 UTC #49 lore raw

PATCH v3 11/11 ARM: dts: apq8064: add i2c3 node for panel.

In reply to Srinivas Kandagatla

This patch adds i2c3 node which is used for panel control on IFC6410.

Signed-off-by Srinivas Kandagatla <[email protected]>

---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 27 +++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +10 -0

index f97339a..a7c939b 100644
@@ -87,6 +87,16 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "okay";
+			qcom,mode = <GSBI_PROT_I2C>;
+			i2c3: i2c at 16280000 {
+				status = "okay";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;

arch/arm/boot/dts/qcom-apq8064.dtsi +27 -0

index 345ea08..df2061e 100644
@@ -120,6 +120,13 @@
 					function = "gsbi1";
 				};
 			};
+
+			i2c3_pins: i2c3 {
+				mux {
+					pins = "gpio8", "gpio9";
+					function = "gsbi3";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {

@@ -233,6 +240,26 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "disabled";
+			compatible = "qcom,gsbi-v1.0.0";
+			reg = <0x16200000 0x100>;
+			clocks = <&gcc GSBI3_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			i2c3: i2c at 16280000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16280000 0x1000>;
+				interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
+				clocks = <&gcc GSBI3_QUP_CLK>,
+					 <&gcc GSBI3_H_CLK>;
+				clock-names = "core", "iface";
+			};
+		};
+
 		gsbi7: gsbi at 16600000 {
 			status = "disabled";
 			compatible = "qcom,gsbi-v1.0.0";

Signature · 1 line

1.9.1

Kumar Gala

Applied

2015-04-27 21:18 UTC #50 lore raw

cover ARM: dts: apq8064 dt patches.

In reply to Srinivas Kandagatla

Quoted 34 lines · Srinivas Kandagatla

Hi Kumar,
Now that the rpm redesign dependency is resolved, If its not too late could you queue these dt patches for v4.1 or v4.1-rc1.
I tested these patches on APQ8064 based IFC6410 board with SATA/USB/HDMI.
I also rebased these patche on top of your qcom/dt branch.
Thanks,
srini
Nicolas Dechesne (2):
ARM: dts: apq8064: Add usb host support to CM QS-600
ARM: dts: apq8064: Add USB OTG support for CM QS-600
Pramod Gurav (1):
ARM: dts: qcom: Add DT alias for serial port
Rob Clark (1):
ARM: dts: apq8064: Add MDP support
Srinivas Kandagatla (6):
ARM: dts: apq8064: add RPM regulators support
ARM: dts: apq8064: Add usb host support.
ARM: dts: apq8064: Add USB OTG support
ARM: dts: apq8064: Add SATA controller support.
ARM: dts: Move i2c1 pinctrl to apq8064.dtsi
ARM: dts: apq8064 add i2c3 node for panel.

Quoted 4 lines

arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts |  30 ++
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  |  69 +++-
arch/arm/boot/dts/qcom-apq8064.dtsi         | 528 +++++++++++++++++++++++++++-
3 files changed, 618 insertions(+), 9 deletions(-)

applied

- k

Signature · 3 lines

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