Add support for Colibri Vybrid Modules
Subsystems (4)
v3 cover Add support for Colibri Vybrid Modules
Hello,
This is the third version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART. Compile tested for vf610twr_defconfig and vf610twr_nand_defconfig as well.
First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. Both host and client modes are working and DFU has also been tested with client. Currently, we restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till now.
The patchset is based and tested on the latest master branch as of this writing.
Discussion on the version 2 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168727.html
Discussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.html
Changes since v2:
- Rework the USB driver to use register + offset method in light of discussion which Fabio Estevam pointed out instead of the regular struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2
- Reorder the patchset, putting the USB support in the end and add an additional patch for adding USB support to Colibri modules. By chance if more discussions happen on the USB support, this allows picking up of atleast the first patches on which no issues have been reported so far.
- The register definitions have been moved under arch/arm/include/asm/ imx-common in the regs-usbphy.h file. This was agreed on after discussion with Marek and some input from Peter Chen. Since it is not clear if SoC's other than Freescale's use the Sigmatel Phy's which seem to be use in iMX/VF/MXS, put the USH PHY register definitions in imx-common rather than include/usb in a chipidea specific file.
- Remove setting of a PLL divisor select which was added for USB but is actually not required considering default value. It also seems to break USB after my latest rebase. The file in question concerning the change is colibri_vf.c. PLL divisor selects the PLL Multiplication factor which by default is 0, setting Fout = Fref * 20 giving 480MHz. The earlier patch set this to 1 giving Fout = Fref * 22 where Fref = 24MHz.
- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method
- Some cleanups and fixes in the sixth patch for the colibri_vf.h file which takes care of environment variables in uboot
- Purge some useless defines in the fifth and sixth patch which were related to USB.
- Sanchayan.
Sanchayan Maity (5):
ARM: vf610: Move DDR3 initialization to imx-common
ARM: vf610: Add SoC and CPU type detection
ARM: vf610: Initial integration for Colibri VF50/VF61
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
colibri_vf: Enable USB support for Colibri Vybrid
Stefan Agner (2):
ARM: vf610: Enable external 32KHz oscillator
ARM: vf610: Enable caches
arch/arm/Kconfig | 5 + arch/arm/cpu/armv7/vf610/generic.c | 45 ++- arch/arm/imx-common/Makefile | 3 + arch/arm/imx-common/ddrmc-vf610.c | 278 +++++++++++++++++++ arch/arm/include/asm/arch-vf610/crm_regs.h | 11 + arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 72 +++++ arch/arm/include/asm/arch-vf610/imx-regs.h | 36 ++- arch/arm/include/asm/imx-common/regs-usbphy.h | 26 ++ board/freescale/vf610twr/vf610twr.c | 295 +++++--------------- board/toradex/colibri_vf/Kconfig | 18 ++ board/toradex/colibri_vf/MAINTAINERS | 6 + board/toradex/colibri_vf/Makefile | 7 + board/toradex/colibri_vf/colibri_vf.c | 382 ++++++++++++++++++++++++++ board/toradex/colibri_vf/imximage.cfg | 17 ++ configs/colibri_vf_defconfig | 3 + drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-vf.c | 164 +++++++++++ include/configs/colibri_vf.h | 271 ++++++++++++++++++ 18 files changed, 1405 insertions(+), 235 deletions(-) create mode 100644 arch/arm/imx-common/ddrmc-vf610.c create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h create mode 100644 arch/arm/include/asm/imx-common/regs-usbphy.h create mode 100644 board/toradex/colibri_vf/Kconfig create mode 100644 board/toradex/colibri_vf/MAINTAINERS create mode 100644 board/toradex/colibri_vf/Makefile create mode 100644 board/toradex/colibri_vf/colibri_vf.c create mode 100644 board/toradex/colibri_vf/imximage.cfg create mode 100644 configs/colibri_vf_defconfig create mode 100644 drivers/usb/host/ehci-vf.c create mode 100644 include/configs/colibri_vf.h
Signature · 1 line
2.3.5
PATCH v3 1/7 ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently ROW_DIFF and COL_DIFF can be chosen from the board file. The JEDEC timings are specified using a common ddr3_jedec_timings structure.
--- arch/arm/imx-common/Makefile | 3 + arch/arm/imx-common/ddrmc-vf610.c | 278 +++++++++++++++++++++++++ arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 72 +++++++ arch/arm/include/asm/arch-vf610/imx-regs.h | 4 +- board/freescale/vf610twr/vf610twr.c | 282 +++++--------------------- 5 files changed, 408 insertions(+), 231 deletions(-) create mode 100644 arch/arm/imx-common/ddrmc-vf610.c create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h
arch/arm/imx-common/Makefile +3 -0
@@ -22,6 +22,9 @@ ifeq ($(SOC),$(filter $(SOC),mx6)) obj-$(CONFIG_CMD_SATA) += sata.o obj-$(CONFIG_IMX_VIDEO_SKIP) += video.o endif +ifeq ($(SOC),$(filter $(SOC),vf610)) +obj-y += ddrmc-vf610.o +endif obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
arch/arm/imx-common/ddrmc-vf610.c new file +278 -0
278 lines not on this page · raw message
arch/arm/include/asm/arch-vf610/ddrmc-vf610.h new file +72 -0
72 lines not on this page · raw message
arch/arm/include/asm/arch-vf610/imx-regs.h +2 -2
@@ -196,8 +196,8 @@#define DDRMC_CR96_WLMRD (v) (((v) & 0x3f) << 8)#define DDRMC_CR96_WLDQSEN (v) ((v) & 0x3f)#define DDRMC_CR97_WRLVL_EN (1 << 24) -#define DDRMC_CR98_WRLVL_DL_0 (0) -#define DDRMC_CR99_WRLVL_DL_1 (0) +#define DDRMC_CR98_WRLVL_DL_0 (v) ((v) & 0xffff) +#define DDRMC_CR99_WRLVL_DL_1 (v) ((v) & 0xffff)#define DDRMC_CR102_RDLVL_GT_REGEN (1 << 16)#define DDRMC_CR102_RDLVL_REG_EN (1 << 8)#define DDRMC_CR105_RDLVL_DL_0 (v) (((v) & 0xff) << 8)
board/freescale/vf610twr/vf610twr.c +53 -229
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Signature · 1 line
2.3.5
PATCH v3 1/7 ARM: vf610: Move DDR3 initialization to imx-common
Quoted 7 lines · Sanchayan Maity
In order to avoid code duplication, move the DDR3 initialization to the common place under imx-common. Currently
ROW_DIFFandCOL_DIFFcan be chosen from the board file. The JEDEC timings are specified using a commonddr3_jedec_timingsstructure.Signed-off-by Stefan Agner <[email protected]>Signed-off-by Sanchayan Maity <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 2/7 ARM: vf610: Enable external 32KHz oscillator
In reply to Sanchayan MaityFrom: Stefan Agner <[email protected]>
Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC.
--- arch/arm/include/asm/arch-vf610/crm_regs.h | 1 + arch/arm/include/asm/arch-vf610/imx-regs.h | 11 ++++++++++- board/freescale/vf610twr/vf610twr.c | 13 ++++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-)
arch/arm/include/asm/arch-vf610/crm_regs.h +1 -0
@@ -199,6 +199,7 @@ struct anadig_reg {#define CCM_CCGR2_PORTD_CTRL_MASK (0x3 << 24)#define CCM_CCGR2_PORTE_CTRL_MASK (0x3 << 26)#define CCM_CCGR3_ANADIG_CTRL_MASK 0x3 +#define CCM_CCGR3_SCSC_CTRL_MASK (0x3 << 4)#define CCM_CCGR4_WKUP_CTRL_MASK (0x3 << 20)#define CCM_CCGR4_CCM_CTRL_MASK (0x3 << 22)#define CCM_CCGR4_GPC_CTRL_MASK (0x3 << 24)
arch/arm/include/asm/arch-vf610/imx-regs.h +10 -1
@@ -65,7 +65,7 @@#define QSPI0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00044000)#define IOMUXC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00048000)#define ANADIG_BASE_ADDR (AIPS0_BASE_ADDR + 0x00050000) -#define SCSCM_BASE_ADDR (AIPS0_BASE_ADDR + 0x00052000) +#define SCSC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00052000)#define ASRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00060000)#define SPDIF_BASE_ADDR (AIPS0_BASE_ADDR + 0x00061000)#define ESAI_BASE_ADDR (AIPS0_BASE_ADDR + 0x00062000)
@@ -264,6 +264,9 @@#define SRC_SRSR_WDOG_A5 (0x1 << 3)#define SRC_SRSR_POR_RST (0x1 << 0) +/* Slow Clock Source Controller Module (SCSC) */ +#define SCSC_SOSC_CTR_SOSC_EN 0x1 +#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))#include <asm/types.h>
@@ -448,6 +451,12 @@ struct mscm_ir {u16 rsvd3[848 ]; }; +/* SCSC */ +struct scsc_reg { +u32 sirc_ctr; +u32 sosc_ctr; +}; +#endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_IMX_REGS_H__ */
board/freescale/vf610twr/vf610twr.c +12 -1
@@ -227,7 +227,7 @@ static void clock_init(void)CCM_CCGR2_PORTD_CTRL_MASK |CCM_CCGR2_PORTE_CTRL_MASK | CCM_CCGR2_QSPI0_CTRL_MASK);clrsetbits_le32 (&ccm->ccgr3,CCM_REG_CTRL_MASK , -CCM_CCGR3_ANADIG_CTRL_MASK ); +CCM_CCGR3_ANADIG_CTRL_MASK |CCM_CCGR3_SCSC_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr4,CCM_REG_CTRL_MASK ,CCM_CCGR4_WKUP_CTRL_MASK |CCM_CCGR4_CCM_CTRL_MASK |CCM_CCGR4_GPC_CTRL_MASK |CCM_CCGR4_I2C0_CTRL_MASK );
@@ -308,9 +308,20 @@ int board_early_init_f(void)int board_init (void ) { +struct scsc_reg *scsc = (struct scsc_reg *)SCSC_BASE_ADDR ; +/* address of boot parameters */ gd->bd->bi_boot_params =PHYS_SDRAM +0x100 ; +/* +* Enable external 32K Oscillator +* +* The internal clock experiences significant drift +* so we must use the external oscillator in order +* to maintain correct time in the hwclock +*/ +setbits_le32 (&scsc->sosc_ctr,SCSC_SOSC_CTR_SOSC_EN ); +return 0 ; }
Signature · 1 line
2.3.5
PATCH v3 2/7 ARM: vf610: Enable external 32KHz oscillator
Quoted 6 lines · Sanchayan Maity
From: Stefan Agner <[email protected]>
Enable the SCSC (Slow Clock Source Controller) and select the external 32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by Sanchayan Maity <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 3/7 ARM: vf610: Add SoC and CPU type detection
In reply to Sanchayan MaityVybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache.
--- arch/arm/cpu/armv7/vf610/generic.c | 29 +++++++++++++++++++++++++++-- arch/arm/include/asm/arch-vf610/imx-regs.h | 12 ++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/vf610/generic.c +27 -2
@@ -18,6 +18,8 @@DECLARE_GLOBAL_DATA_PTR ;#endif +static char soc_type[] ="xx0" ; +#ifdef CONFIG_MXC_OCOTP void enable_ocotp_clk (unsigned char enable) {
@@ -284,14 +286,37 @@ static char *get_reset_cause(void)int print_cpuinfo (void ) { -printf ("CPU: Freescale Vybrid VF610 at %d MHz\n" , -mxc_get_clock (MXC_ARM_CLK ) /1000000 ); +printf ("CPU: Freescale Vybrid VF%s at %d MHz\n" , + soc_type,mxc_get_clock (MXC_ARM_CLK ) /1000000 );printf ("Reset cause: %s\n" ,get_reset_cause ());return 0 ; }#endif +int arch_cpu_init (void ) +{ +struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR ; + + soc_type[0 ] = mscm->cpxcount ?'6' :'5' ;/*Dual Core => VF6x0 */ + soc_type[1 ] = mscm->cpxcfg1 ?'1' :'0' ;/* L2 Cache => VFx10 */ + +return 0 ; +} + +#ifdef CONFIG_ARCH_MISC_INIT +int arch_misc_init (void ) +{ +char soc[6 ]; + +strcat (soc,"vf" ); +strcat (soc, soc_type); +setenv ("soc" , soc); + +return 0 ; +} +#endif +int cpu_eth_init (bd_t *bis) {int rc = -ENODEV ;
arch/arm/include/asm/arch-vf610/imx-regs.h +12 -0
@@ -457,6 +457,18 @@ struct scsc_reg {u32 sosc_ctr; }; +/* MSCM */ +struct mscm { +u32 cpxtype; +u32 cpxnum; +u32 cpxmaster; +u32 cpxcount; +u32 cpxcfg0; +u32 cpxcfg1; +u32 cpxcfg2; +u32 cpxcfg3; +}; +#endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_IMX_REGS_H__ */
Signature · 1 line
2.3.5
PATCH v3 3/7 ARM: vf610: Add SoC and CPU type detection
Quoted 8 lines · Sanchayan Maity
Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache.
Signed-off-by Stefan Agner <[email protected]>Signed-off-by Sanchayan Maity <[email protected]>
Applied to u-boot/master, thanks!
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PATCH v3 4/7 ARM: vf610: Enable caches
In reply to Sanchayan MaityFrom: Stefan Agner <[email protected]>
Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from.
--- arch/arm/cpu/armv7/vf610/generic.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm/cpu/armv7/vf610/generic.c +16 -0
@@ -342,3 +342,19 @@ int get_clocks(void)#endif return 0 ; } + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches (void ) +{ +#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH ) +enum dcache_option option =DCACHE_WRITETHROUGH ; +#else +enum dcache_option option =DCACHE_WRITEBACK ; +#endif +dcache_enable (); +icache_enable (); + +/* Enable caching on OCRAM */ +mmu_set_region_dcache_behaviour (IRAM_BASE_ADDR ,IRAM_SIZE , option); +} +#endif
Signature · 1 line
2.3.5
PATCH v3 4/7 ARM: vf610: Enable caches
Quoted 7 lines · Sanchayan Maity
From: Stefan Agner <[email protected]>
Enables caches which provides a rather huge speedup of the boot loader. Also mark the on-chip RAM as cachable since this is the area U-Boot runs from.
Signed-off-by Sanchayan Maity <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 5/7 ARM: vf610: Initial integration for Colibri VF50/VF61
In reply to Sanchayan MaityThis adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
--- arch/arm/Kconfig | 5 + arch/arm/include/asm/arch-vf610/imx-regs.h | 5 + board/toradex/colibri_vf/Kconfig | 18 ++ board/toradex/colibri_vf/MAINTAINERS | 6 + board/toradex/colibri_vf/Makefile | 7 + board/toradex/colibri_vf/colibri_vf.c | 361 +++++++++++++++++++++++++++++ board/toradex/colibri_vf/imximage.cfg | 17 ++ configs/colibri_vf_defconfig | 3 + include/configs/colibri_vf.h | 234 +++++++++++++++++++ 9 files changed, 656 insertions(+) create mode 100644 board/toradex/colibri_vf/Kconfig create mode 100644 board/toradex/colibri_vf/MAINTAINERS create mode 100644 board/toradex/colibri_vf/Makefile create mode 100644 board/toradex/colibri_vf/colibri_vf.c create mode 100644 board/toradex/colibri_vf/imximage.cfg create mode 100644 configs/colibri_vf_defconfig create mode 100644 include/configs/colibri_vf.h
arch/arm/Kconfig +5 -0
@@ -617,6 +617,10 @@ config TARGET_VF610TWR bool "Support vf610twr" select CPU_V7 +config TARGET_COLIBRI_VF + bool "Support Colibri VF50/61" + select CPU_V7 + config ZYNQ bool "Xilinx Zynq Platform" select CPU_V7
@@ -875,6 +879,7 @@ source "board/ti/ti814x/Kconfig" source "board/ti/ti816x/Kconfig" source "board/timll/devkit3250/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" +source "board/toradex/colibri_vf/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/trizepsiv/Kconfig" source "board/ttcontrol/vision2/Kconfig"
arch/arm/include/asm/arch-vf610/imx-regs.h +5 -0
@@ -263,6 +263,11 @@#define SRC_SRSR_WDOG_M4 (0x1 << 4)#define SRC_SRSR_WDOG_A5 (0x1 << 3)#define SRC_SRSR_POR_RST (0x1 << 0) +#define SRC_SBMR2_BMOD_MASK (0x3 << 24) +#define SRC_SBMR2_BMOD_SHIFT 24 +#define SRC_SBMR2_BMOD_FUSES 0x0 +#define SRC_SBMR2_BMOD_SERIAL 0x1 +#define SRC_SBMR2_BMOD_RCON 0x2/* Slow Clock Source Controller Module (SCSC) */ #define SCSC_SOSC_CTR_SOSC_EN 0x1
board/toradex/colibri_vf/Kconfig new file +18 -0
@@ -0,0 +1,18 @@ +if TARGET_COLIBRI_VF + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "colibri_vf" + +config SYS_VENDOR + default "toradex" + +config SYS_SOC + default "vf610" + +config SYS_CONFIG_NAME + default "colibri_vf" + +endif
board/toradex/colibri_vf/MAINTAINERS new file +6 -0
@@ -0,0 +1,6 @@ +Colibri VFxx +M: Stefan Agner <[email protected]> +S: Maintained +F: board/toradex/colibri_vf/ +F: include/configs/colibri_vf.h +F: configs/colibri_vf_defconfig
board/toradex/colibri_vf/Makefile new file +7 -0
@@ -0,0 +1,7 @@ +# +# Copyright 2013 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := colibri_vf.o
board/toradex/colibri_vf/colibri_vf.c new file +361 -0
361 lines not on this page · raw message
board/toradex/colibri_vf/imximage.cfg new file +17 -0
@@ -0,0 +1,17 @@ +/* + * Copyright 2014 Toradex, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +#include <asm/imx-common/imximage.cfg> + +/* image version */ +IMAGE_VERSION 2 + +/* Boot Offset 0x400, valid for both SD and NAND boot */ +BOOT_OFFSET FLASH_OFFSET_STANDARD
configs/colibri_vf_defconfig new file +3 -0
@@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND" +CONFIG_ARM=y +CONFIG_TARGET_COLIBRI_VF=y
include/configs/colibri_vf.h new file +234 -0
234 lines not on this page · raw message
Signature · 1 line
2.3.5
PATCH v3 5/7 ARM: vf610: Initial integration for Colibri VF50/VF61
Quoted 13 lines · Sanchayan Maity
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (ColibriUART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
-UART_AandUART_CI/O muxing
- Boot from NAND by default
Quoted 3 lines
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by Sanchayan Maity <[email protected]>
Thanks for the patchset, Sanchayan!
--
Stefan
PATCH v3 5/7 ARM: vf610: Initial integration for Colibri VF50/VF61
In reply to Sanchayan MaityQuoted 13 lines · Sanchayan Maity
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (ColibriUART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
-UART_AandUART_CI/O muxing
- Boot from NAND by default
Quoted 4 lines
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by Sanchayan Maity <[email protected]>Acked-by Stefan Agner <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 6/7 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
In reply to Sanchayan MaityThis driver adds support for the USB peripheral on Freescale Vybrid SoC's.
--- arch/arm/include/asm/arch-vf610/crm_regs.h | 10 ++ arch/arm/include/asm/arch-vf610/imx-regs.h | 4 + arch/arm/include/asm/imx-common/regs-usbphy.h | 26 ++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-vf.c | 164 ++++++++++++++++++++++++++ 5 files changed, 205 insertions(+) create mode 100644 arch/arm/include/asm/imx-common/regs-usbphy.h create mode 100644 drivers/usb/host/ehci-vf.c
arch/arm/include/asm/arch-vf610/crm_regs.h +10 -0
@@ -189,6 +189,7 @@ struct anadig_reg {#define CCM_REG_CTRL_MASK 0xffffffff#define CCM_CCGR0_UART0_CTRL_MASK (0x3 << 14)#define CCM_CCGR0_UART1_CTRL_MASK (0x3 << 16) +#define CCM_CCGR1_USBC0_CTRL_MASK (0x3 << 8)#define CCM_CCGR1_PIT_CTRL_MASK (0x3 << 14)#define CCM_CCGR1_WDOGA5_CTRL_MASK (0x3 << 28)#define CCM_CCGR2_QSPI0_CTRL_MASK (0x3 << 8)
@@ -207,14 +208,23 @@ struct anadig_reg {#define CCM_CCGR6_OCOTP_CTRL_MASK (0x3 << 10)#define CCM_CCGR6_DDRMC_CTRL_MASK (0x3 << 28)#define CCM_CCGR7_SDHC1_CTRL_MASK (0x3 << 4) +#define CCM_CCGR7_USBC1_CTRL_MASK (0x3 << 8)#define CCM_CCGR9_FEC0_CTRL_MASK 0x3#define CCM_CCGR9_FEC1_CTRL_MASK (0x3 << 2)#define CCM_CCGR10_NFC_CTRL_MASK 0x3 +#define ANADIG_PLL7_CTRL_BYPASS (1 << 16) +#define ANADIG_PLL7_CTRL_ENABLE (1 << 13) +#define ANADIG_PLL7_CTRL_POWERDOWN (1 << 12) +#define ANADIG_PLL7_CTRL_DIV_SELECT (1 << 1)#define ANADIG_PLL5_CTRL_BYPASS (1 << 16)#define ANADIG_PLL5_CTRL_ENABLE (1 << 13)#define ANADIG_PLL5_CTRL_POWERDOWN (1 << 12)#define ANADIG_PLL5_CTRL_DIV_SELECT 1 +#define ANADIG_PLL3_CTRL_BYPASS (1 << 16) +#define ANADIG_PLL3_CTRL_ENABLE (1 << 13) +#define ANADIG_PLL3_CTRL_POWERDOWN (1 << 12) +#define ANADIG_PLL3_CTRL_DIV_SELECT (1 << 1)#define ANADIG_PLL2_CTRL_ENABLE (1 << 13)#define ANADIG_PLL2_CTRL_POWERDOWN (1 << 12)#define ANADIG_PLL2_CTRL_DIV_SELECT 1
arch/arm/include/asm/arch-vf610/imx-regs.h +4 -0
@@ -52,6 +52,7 @@#define SAI2_BASE_ADDR (AIPS0_BASE_ADDR + 0x00031000)#define SAI3_BASE_ADDR (AIPS0_BASE_ADDR + 0x00032000)#define CRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00033000) +#define USBC0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00034000)#define PDB_BASE_ADDR (AIPS0_BASE_ADDR + 0x00036000)#define PIT_BASE_ADDR (AIPS0_BASE_ADDR + 0x00037000)#define FTM0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00038000)
@@ -65,6 +66,8 @@#define QSPI0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00044000)#define IOMUXC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00048000)#define ANADIG_BASE_ADDR (AIPS0_BASE_ADDR + 0x00050000) +#define USB_PHY0_BASE_ADDR (AIPS0_BASE_ADDR + 0x00050800) +#define USB_PHY1_BASE_ADDR (AIPS0_BASE_ADDR + 0x00050C00)#define SCSC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00052000)#define ASRC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00060000)#define SPDIF_BASE_ADDR (AIPS0_BASE_ADDR + 0x00061000)
@@ -84,6 +87,7 @@#define DDR_BASE_ADDR (AIPS1_BASE_ADDR + 0x0002E000)#define ESDHC0_BASE_ADDR (AIPS1_BASE_ADDR + 0x00031000)#define ESDHC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00032000) +#define USBC1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00034000)#define ENET_BASE_ADDR (AIPS1_BASE_ADDR + 0x00050000)#define ENET1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00051000)#define NFC_BASE_ADDR (AIPS1_BASE_ADDR + 0x00060000)
arch/arm/include/asm/imx-common/regs-usbphy.h new file +26 -0
@@ -0,0 +1,26 @@ +/* +* Freescale USB PHY Register Definitions +* +* SPDX-License-Identifier: GPL-2.0+ +* +*/ + +#ifndef __REGS_USBPHY_H__ +#define __REGS_USBPHY_H__ + +#define USBPHY_CTRL 0x00000030 +#define USBPHY_CTRL_SET 0x00000034 +#define USBPHY_CTRL_CLR 0x00000038 +#define USBPHY_CTRL_TOG 0x0000003C +#define USBPHY_PWD 0x00000000 +#define USBPHY_TX 0x00000010 +#define USBPHY_RX 0x00000020 +#define USBPHY_DEBUG 0x00000050 + +#define USBPHY_CTRL_ENUTMILEVEL2 (1 << 14) +#define USBPHY_CTRL_ENUTMILEVEL3 (1 << 15) +#define USBPHY_CTRL_OTG_ID (1 << 27) +#define USBPHY_CTRL_CLKGATE (1 << 30) +#define USBPHY_CTRL_SFTRST (1 << 31) + +#endif /* __REGS_USBPHY_H__ */
drivers/usb/host/Makefile +1 -0
@@ -39,6 +39,7 @@ obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o obj-$(CONFIG_USB_EHCI_UNIPHIER) += ehci-uniphier.o obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o +obj-$(CONFIG_USB_EHCI_VF) += ehci-vf.o obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
drivers/usb/host/ehci-vf.c new file +164 -0
164 lines not on this page · raw message
Signature · 1 line
2.3.5
PATCH v3 6/7 usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
Quoted 4 lines · Sanchayan Maity
This driver adds support for the USB peripheral on Freescale Vybrid SoC's.
Signed-off-by Sanchayan Maity <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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PATCH v3 7/7 colibri_vf: Enable USB support for Colibri Vybrid
In reply to Sanchayan MaityEnable USB support on Toradex Colibri Vybrid Modules.
--- board/toradex/colibri_vf/colibri_vf.c | 25 +++++++++++++++++++++-- include/configs/colibri_vf.h | 37 +++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 2 deletions(-)
board/toradex/colibri_vf/colibri_vf.c +23 -2
@@ -197,7 +197,8 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr0,CCM_REG_CTRL_MASK ,CCM_CCGR0_UART0_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr1,CCM_REG_CTRL_MASK , -CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK ); +CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK | +CCM_CCGR1_USBC0_CTRL_MASK ); clrsetbits_le32(&ccm->ccgr2, CCM_REG_CTRL_MASK, CCM_CCGR2_IOMUXC_CTRL_MASK | CCM_CCGR2_PORTA_CTRL_MASK | CCM_CCGR2_PORTB_CTRL_MASK | CCM_CCGR2_PORTC_CTRL_MASK |
@@ -210,15 +211,19 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr6,CCM_REG_CTRL_MASK ,CCM_CCGR6_OCOTP_CTRL_MASK |CCM_CCGR6_DDRMC_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr7,CCM_REG_CTRL_MASK , -CCM_CCGR7_SDHC1_CTRL_MASK ); +CCM_CCGR7_SDHC1_CTRL_MASK |CCM_CCGR7_USBC1_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr9,CCM_REG_CTRL_MASK ,CCM_CCGR9_FEC0_CTRL_MASK |CCM_CCGR9_FEC1_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr10,CCM_REG_CTRL_MASK ,CCM_CCGR10_NFC_CTRL_MASK ); +clrsetbits_le32 (&anadig->pll7_ctrl,ANADIG_PLL7_CTRL_BYPASS | +ANADIG_PLL7_CTRL_POWERDOWN ,ANADIG_PLL7_CTRL_ENABLE );clrsetbits_le32 (&anadig->pll5_ctrl,ANADIG_PLL5_CTRL_BYPASS |ANADIG_PLL5_CTRL_POWERDOWN ,ANADIG_PLL5_CTRL_ENABLE |ANADIG_PLL5_CTRL_DIV_SELECT ); +clrsetbits_le32 (&anadig->pll3_ctrl,ANADIG_PLL3_CTRL_BYPASS | +ANADIG_PLL3_CTRL_POWERDOWN ,ANADIG_PLL3_CTRL_ENABLE );if (is_colibri_vf61 ()) { clrsetbits_le32(&anadig->pll2_ctrl, ANADIG_PLL5_CTRL_BYPASS |
@@ -359,3 +364,19 @@ int checkboard(void)return 0 ; } + +int g_dnl_bind_fixup (struct usb_device_descriptor *dev,const char *name) +{ +unsigned short usb_pid; + +put_unaligned (CONFIG_TRDX_VID , &dev->idVendor); + +if (is_colibri_vf61 ()) + usb_pid =CONFIG_TRDX_PID_COLIBRI_VF61IT ; +else + usb_pid =CONFIG_TRDX_PID_COLIBRI_VF50IT ; + +put_unaligned (usb_pid, &dev->idProduct); + +return 0 ; +}
include/configs/colibri_vf.h +37 -0
@@ -146,6 +146,8 @@#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" +#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" +#define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x82000000\0" \ "fdt_addr_r=0x84000000\0" \
@@ -165,6 +167,7 @@"source ${loadaddr}\0" \"setupdate=run setsdupdate || run setusbupdate\0" \"mtdparts=" MTDPARTS_DEFAULT "\0" \ +"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \SD_BOOTCMD \NFS_BOOTCMD \UBI_BOOTCMD
@@ -231,4 +234,38 @@#define CONFIG_SYS_CACHELINE_SIZE 32 +/* USB Host Support */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_VF +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET + +/* USB Client Support */ +#define CONFIG_USB_GADGET +#define CONFIG_CI_UDC +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_TRDX_VID 0x1B67 +#define CONFIG_TRDX_PID_COLIBRI_VF50 0x0016 +#define CONFIG_TRDX_PID_COLIBRI_VF61 0x0017 +#define CONFIG_TRDX_PID_COLIBRI_VF61IT 0x0018 +#define CONFIG_TRDX_PID_COLIBRI_VF50IT 0x0019 +#define CONFIG_G_DNL_MANUFACTURER "Toradex" +#define CONFIG_G_DNL_VENDOR_NUM CONFIG_TRDX_VID +#define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_VF50 + +/* USB DFU */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_CMD_DFU +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_NAND +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) + +/* USB Storage */ +#define CONFIG_USB_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE +#endif /* __CONFIG_H */
Signature · 1 line
2.3.5
PATCH v3 7/7 colibri_vf: Enable USB support for Colibri Vybrid
Quoted 14 lines · Sanchayan Maity
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by Sanchayan Maity <[email protected]>--- board/toradex/colibri_vf/colibri_vf.c | 25 +++++++++++++++++++++-- include/configs/colibri_vf.h | 37+++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 2 deletions(-)
(quoted diff) +0
-0
b/board/toradex/colibri_vf/colibri_vf.cindex e7bc6c1..054e6f9 100644
board/toradex/colibri_vf/colibri_vf.c static void clock_init(void) · line 201
Quoted 6 lines
board/toradex/colibri_vf/colibri_vf.c +2
-1@@ -197,7 +197,8 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr0,CCM_REG_CTRL_MASK ,CCM_CCGR0_UART0_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr1,CCM_REG_CTRL_MASK , -CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK ); +CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK | +CCM_CCGR1_USBC0_CTRL_MASK );
You probably want to flip these CCM regs only if CONFIG_CI_UDC is enabled or something along those lines, right ?
Best regards,
Marek Vasut
PATCH v3 7/7 colibri_vf: Enable USB support for Colibri Vybrid
Hello,
Quoted 10 lines · Marek Vasut
Quoted 9 lines · Sanchayan Maity
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by Sanchayan Maity <[email protected]>--- board/toradex/colibri_vf/colibri_vf.c | 25 +++++++++++++++++++++-- include/configs/colibri_vf.h | 37+++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 2 deletions(-)
Quoted 14 lines
board/toradex/colibri_vf/colibri_vf.c static void clock_init(void) · line 201
Quoted 11 lines
(quoted diff) +0
-0
b/board/toradex/colibri_vf/colibri_vf.cindex e7bc6c1..054e6f9 100644board/toradex/colibri_vf/colibri_vf.c +2
-1@@ -197,7 +197,8 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr0,CCM_REG_CTRL_MASK ,CCM_CCGR0_UART0_CTRL_MASK );clrsetbits_le32 (&ccm->ccgr1,CCM_REG_CTRL_MASK , -CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK ); +CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK | +CCM_CCGR1_USBC0_CTRL_MASK );You probably want to flip these CCM regs only if
CONFIG_CI_UDCis enabled or something along those lines, right ?
Yes, that would be be better. Will send a new corrected patch for this. I assume since there are no issues with the rest of the patchset so sending a respin of this last patch would do?!
Thanks for the feedback and catching this.
Quoted 3 lines
Best regards,
Marek Vasut
- Sanchayan.
PATCH v3 7/7 colibri_vf: Enable USB support for Colibri Vybrid
Quoted 34 lines · maitysanchayan at gmail.com
Hello,
Quoted 22 lines · Marek Vasut
Quoted 21 lines · Sanchayan Maity
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by Sanchayan Maity <[email protected]>---
board/toradex/colibri_vf/colibri_vf.c | 25 +++++++++++++++++++++-- include/configs/colibri_vf.h | 37+++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 2 deletions(-)
(quoted diff) +0
-0
b/board/toradex/colibri_vf/colibri_vf.cindex e7bc6c1..054e6f9 100644board/toradex/colibri_vf/colibri_vf.c +0
-0@@ -197,7 +197,8 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr0,CCM_REG_CTRL_MASK ,CCM_CCGR0_UART0_CTRL_MASK );Quoted 8 lines
board/toradex/colibri_vf/colibri_vf.c static void clock_init(void) · line 201
Quoted 5 lines
board/toradex/colibri_vf/colibri_vf.c +2
-1clrsetbits_le32 (&ccm->ccgr1,CCM_REG_CTRL_MASK , -CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK ); +CCM_CCGR1_PIT_CTRL_MASK |CCM_CCGR1_WDOGA5_CTRL_MASK | +CCM_CCGR1_USBC0_CTRL_MASK );You probably want to flip these CCM regs only if
CONFIG_CI_UDCis enabled or something along those lines, right ?
Quoted 5 lines
Yes, that would be be better. Will send a new corrected patch for this. I assume since there are no issues with the rest of the patchset so sending a respin of this last patch would do?!
Thanks for the feedback and catching this.
Yup, resending just the last patch is fine :)
Best regards,
Marek Vasut
PATCH v4 7/7 colibri_vf: Enable USB support for Colibri Vybrid
Enable USB support on Toradex Colibri Vybrid Modules.
--- board/toradex/colibri_vf/colibri_vf.c | 24 +++++++++++++++++++++++ include/configs/colibri_vf.h | 37 +++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)
board/toradex/colibri_vf/colibri_vf.c +24 -0
@@ -216,6 +216,14 @@ static void clock_init(void)clrsetbits_le32 (&ccm->ccgr10,CCM_REG_CTRL_MASK ,CCM_CCGR10_NFC_CTRL_MASK ); +#ifdef CONFIG_CI_UDC +setbits_le32 (&ccm->ccgr1,CCM_CCGR1_USBC0_CTRL_MASK ); +#endif + +#ifdef CONFIG_USB_EHCI +setbits_le32 (&ccm->ccgr7,CCM_CCGR7_USBC1_CTRL_MASK ); +#endif +clrsetbits_le32 (&anadig->pll5_ctrl,ANADIG_PLL5_CTRL_BYPASS |ANADIG_PLL5_CTRL_POWERDOWN ,ANADIG_PLL5_CTRL_ENABLE |ANADIG_PLL5_CTRL_DIV_SELECT );
@@ -359,3 +367,19 @@ int checkboard(void)return 0 ; } + +int g_dnl_bind_fixup (struct usb_device_descriptor *dev,const char *name) +{ +unsigned short usb_pid; + +put_unaligned (CONFIG_TRDX_VID , &dev->idVendor); + +if (is_colibri_vf61 ()) + usb_pid =CONFIG_TRDX_PID_COLIBRI_VF61IT ; +else + usb_pid =CONFIG_TRDX_PID_COLIBRI_VF50IT ; + +put_unaligned (usb_pid, &dev->idProduct); + +return 0 ; +}
include/configs/colibri_vf.h +37 -0
@@ -146,6 +146,8 @@#define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" +#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" +#define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x82000000\0" \ "fdt_addr_r=0x84000000\0" \
@@ -165,6 +167,7 @@"source ${loadaddr}\0" \"setupdate=run setsdupdate || run setusbupdate\0" \"mtdparts=" MTDPARTS_DEFAULT "\0" \ +"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \SD_BOOTCMD \NFS_BOOTCMD \UBI_BOOTCMD
@@ -231,4 +234,38 @@#define CONFIG_SYS_CACHELINE_SIZE 32 +/* USB Host Support */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_VF +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET + +/* USB Client Support */ +#define CONFIG_USB_GADGET +#define CONFIG_CI_UDC +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_TRDX_VID 0x1B67 +#define CONFIG_TRDX_PID_COLIBRI_VF50 0x0016 +#define CONFIG_TRDX_PID_COLIBRI_VF61 0x0017 +#define CONFIG_TRDX_PID_COLIBRI_VF61IT 0x0018 +#define CONFIG_TRDX_PID_COLIBRI_VF50IT 0x0019 +#define CONFIG_G_DNL_MANUFACTURER "Toradex" +#define CONFIG_G_DNL_VENDOR_NUM CONFIG_TRDX_VID +#define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_VF50 + +/* USB DFU */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_CMD_DFU +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_NAND +#define CONFIG_DFU_MMC +#define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) + +/* USB Storage */ +#define CONFIG_USB_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_CMD_USB_MASS_STORAGE +#endif /* __CONFIG_H */
Signature · 1 line
2.3.5
PATCH v4 7/7 colibri_vf: Enable USB support for Colibri Vybrid
Quoted 3 lines · Sanchayan Maity
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by Sanchayan Maity <[email protected]>
Best regards,
Marek Vasut
PATCH v4 7/7 colibri_vf: Enable USB support for Colibri Vybrid
In reply to Sanchayan MaityQuoted 4 lines · Sanchayan Maity
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by Sanchayan Maity <[email protected]>Acked-by Marek Vasut <[email protected]>
Applied to u-boot/master, thanks!
Signature · 8 lines
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v3 cover Add support for Colibri Vybrid Modules
In reply to Sanchayan MaityHello,
Quoted 67 lines · Sanchayan Maity
Hello,
This is the third version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART. Compile tested for
vf610twr_defconfigandvf610twr_nand_defconfigas well.First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. Both host and client modes are working and DFU has also been tested with client. Currently, we restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till now.
The patchset is based and tested on the latest master branch as of this writing.
Discussion on the version 2 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168727.htmlDiscussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.htmlChanges since v2:
- Rework the USB driver to use register + offset method in light of discussion which Fabio Estevam pointed out instead of the regular struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2- Reorder the patchset, putting the USB support in the end and add an additional patch for adding USB support to Colibri modules. By chance if more discussions happen on the USB support, this allows picking up of atleast the first patches on which no issues have been reported so far.
- The register definitions have been moved under
arch/arm/include/asm/imx-common in theregs-usbphy.hfile. This was agreed on after discussion with Marek and some input from Peter Chen. Since it is not clear if SoC's other than Freescale's use the Sigmatel Phy's which seem to be use in iMX/VF/MXS, put the USH PHY register definitions in imx-common rather thaninclude/usbin a chipidea specific file.- Remove setting of a PLL divisor select which was added for USB but is actually not required considering default value. It also seems to break USB after my latest rebase. The file in question concerning the change is
colibri_vf.c. PLL divisor selects the PLL Multiplication factor which by default is 0, setting Fout = Fref * 20 giving 480MHz. The earlier patch set this to 1 giving Fout = Fref * 22 where Fref = 24MHz.- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method
Quoted 5 lines
- Some cleanups and fixes in the sixth patch for the
colibri_vf.hfile which takes care of environment variables in uboot- Purge some useless defines in the fifth and sixth patch which were related to USB.
Ping!?
Anything preventing this patch from getting applied?
- Sanchayan.
Quoted 48 lines
- Sanchayan.
Sanchayan Maity (5):
ARM: vf610: Move DDR3 initialization to imx-common
ARM: vf610: Add SoC and CPU type detection
ARM: vf610: Initial integration for Colibri VF50/VF61
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
colibri_vf: Enable USB support for Colibri VybridStefan Agner (2):
ARM: vf610: Enable external 32KHz oscillator
ARM: vf610: Enable cachesarch/arm/Kconfig | 5 + arch/arm/cpu/armv7/vf610/generic.c | 45 ++- arch/arm/imx-common/Makefile | 3 + arch/arm/imx-common/ddrmc-vf610.c | 278 +++++++++++++++++++ arch/arm/include/asm/arch-vf610/crm_regs.h | 11 + arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 72 +++++ arch/arm/include/asm/arch-vf610/imx-regs.h | 36 ++- arch/arm/include/asm/imx-common/regs-usbphy.h | 26 ++ board/freescale/vf610twr/vf610twr.c | 295 +++++--------------- board/toradex/colibri_vf/Kconfig | 18 ++ board/toradex/colibri_vf/MAINTAINERS | 6 + board/toradex/colibri_vf/Makefile | 7 + board/toradex/colibri_vf/colibri_vf.c | 382 ++++++++++++++++++++++++++ board/toradex/colibri_vf/imximage.cfg | 17 ++ configs/colibri_vf_defconfig | 3 + drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-vf.c | 164 +++++++++++ include/configs/colibri_vf.h | 271 ++++++++++++++++++ 18 files changed, 1405 insertions(+), 235 deletions(-) create mode 100644 arch/arm/imx-common/ddrmc-vf610.c create mode 100644 arch/arm/include/asm/arch-vf610/ddrmc-vf610.h create mode 100644 arch/arm/include/asm/imx-common/regs-usbphy.h create mode 100644 board/toradex/colibri_vf/Kconfig create mode 100644 board/toradex/colibri_vf/MAINTAINERS create mode 100644 board/toradex/colibri_vf/Makefile create mode 100644 board/toradex/colibri_vf/colibri_vf.c create mode 100644 board/toradex/colibri_vf/imximage.cfg create mode 100644 configs/colibri_vf_defconfig create mode 100644 drivers/usb/host/ehci-vf.c create mode 100644 include/configs/colibri_vf.hSignature · 1 line
2.3.5
v3 cover Add support for Colibri Vybrid Modules
Quoted 73 lines · maitysanchayan at gmail.com
Hello,
Quoted 70 lines · Sanchayan Maity
Hello,
This is the third version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART. Compile tested for
vf610twr_defconfigandvf610twr_nand_defconfigas well.First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. Both host and client modes are working and DFU has also been tested with client. Currently, we restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till now.
The patchset is based and tested on the latest master branch as of this writing.
Discussion on the version 2 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168727.htmlDiscussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.htmlChanges since v2:
- Rework the USB driver to use register + offset method in light of discussion which Fabio Estevam pointed out instead of the regular struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2- Reorder the patchset, putting the USB support in the end and add an additional patch for adding USB support to Colibri modules. By chance if more discussions happen on the USB support, this allows picking up of atleast the first patches on which no issues have been reported so far.
- The register definitions have been moved under
arch/arm/include/asm/imx-common in theregs-usbphy.hfile. This was agreed on after discussion with Marek and some input from Peter Chen. Since it is not clear if SoC's other than Freescale's use the Sigmatel Phy's which seem to be use in iMX/VF/MXS, put the USH PHY register definitions in imx-common rather thaninclude/usbin a chipidea specific file.- Remove setting of a PLL divisor select which was added for USB but is actually not required considering default value. It also seems to break USB after my latest rebase. The file in question concerning the change is
colibri_vf.c. PLL divisor selects the PLL Multiplication factor which by default is 0, setting Fout = Fref * 20 giving 480MHz. The earlier patch set this to 1 giving Fout = Fref * 22 where Fref = 24MHz.- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method- Some cleanups and fixes in the sixth patch for the
colibri_vf.hfile which takes care of environment variables in uboot
Quoted 6 lines
Quoted 2 lines
- Purge some useless defines in the fifth and sixth patch which were related to USB.
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150423/229f3be7/attachment.sig>
v3 cover Add support for Colibri Vybrid Modules
Quoted 75 lines · Tom Rini
Quoted 74 lines · maitysanchayan at gmail.com
Hello,
Quoted 71 lines · Sanchayan Maity
Hello,
This is the third version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART. Compile tested for
vf610twr_defconfigandvf610twr_nand_defconfigas well.First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. Both host and client modes are working and DFU has also been tested with client. Currently, we restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till now.
The patchset is based and tested on the latest master branch as of this writing.
Discussion on the version 2 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168727.htmlDiscussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.htmlChanges since v2:
- Rework the USB driver to use register + offset method in light of discussion which Fabio Estevam pointed out instead of the regular struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2- Reorder the patchset, putting the USB support in the end and add an additional patch for adding USB support to Colibri modules. By chance if more discussions happen on the USB support, this allows picking up of atleast the first patches on which no issues have been reported so far.
- The register definitions have been moved under
arch/arm/include/asm/imx-common in theregs-usbphy.hfile. This was agreed on after discussion with Marek and some input from Peter Chen. Since it is not clear if SoC's other than Freescale's use the Sigmatel Phy's which seem to be use in iMX/VF/MXS, put the USH PHY register definitions in imx-common rather thaninclude/usbin a chipidea specific file.- Remove setting of a PLL divisor select which was added for USB but is actually not required considering default value. It also seems to break USB after my latest rebase. The file in question concerning the change is
colibri_vf.c. PLL divisor selects the PLL Multiplication factor which by default is 0, setting Fout = Fref * 20 giving 480MHz. The earlier patch set this to 1 giving Fout = Fref * 22 where Fref = 24MHz.- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method- Some cleanups and fixes in the sixth patch for the
colibri_vf.hfile which takes care of environment variables in uboot
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
- Purge some useless defines in the fifth and sixth patch which were related to USB.
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
v3 cover Add support for Colibri Vybrid Modules
Quoted 79 lines · Marek Vasut
Quoted 78 lines · Tom Rini
Quoted 77 lines · maitysanchayan at gmail.com
Hello,
Quoted 73 lines · Sanchayan Maity
Hello,
This is the third version of the patchset which adds support for the Toradex Colibri Vybrid VF50 and VF61 modules. Boot up has been tested using the serial loader over UART. Compile tested for
vf610twr_defconfigandvf610twr_nand_defconfigas well.First patch in the series refactors the DDR related code for use by both the tower board and colibri modules. It also introduces a DDR3 based JEDEC timing structure.
Second third and fourth patch in this series are improvement patches related to RTC, SoC/CPU detection and caches.
Fifth patch introduces USB support for Vybrid modules. Much of the code is similar to the ehci-mx6 driver. Both host and client modes are working and DFU has also been tested with client. Currently, we restrict the ports to be in one of host and client mode.
Sixth patch adds the actual support for the Colibri modules.
Comments and feedback are most welcome. Thanks for the feedback till now.
The patchset is based and tested on the latest master branch as of this writing.
Discussion on the version 2 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168727.htmlDiscussion on the version 1 of the patchset can be found at the below link:
https://www.mail-archive.com/u-boot at lists.denx.de/msg168136.htmlChanges since v2:
- Rework the USB driver to use register + offset method in light of discussion which Fabio Estevam pointed out instead of the regular struct{} method which v2 used. The discussion is at the below link:
https://www.marc.info/?l=u-boot&m=142609602127309&w=2- Reorder the patchset, putting the USB support in the end and add an additional patch for adding USB support to Colibri modules. By chance if more discussions happen on the USB support, this allows picking up of atleast the first patches on which no issues have been reported so far.
- The register definitions have been moved under
arch/arm/include/asm/imx-common in theregs-usbphy.hfile. This was agreed on after discussion with Marek and some input from Peter Chen. Since it is not clear if SoC's other than Freescale's use the Sigmatel Phy's which seem to be use in iMX/VF/MXS, put the USH PHY register definitions in imx-common rather thaninclude/usbin a chipidea specific file.- Remove setting of a PLL divisor select which was added for USB but is actually not required considering default value. It also seems to break USB after my latest rebase. The file in question concerning the change is
colibri_vf.c. PLL divisor selects the PLL Multiplication factor which by default is 0, setting Fout = Fref * 20 giving 480MHz. The earlier patch set this to 1 giving Fout = Fref * 22 where Fref = 24MHz.- Rebased on the latest master branch.
Changes since v1:
- Rework the USB driver to use register offsets using the regular struct {} method- Some cleanups and fixes in the sixth patch for the
colibri_vf.hfile which takes care of environment variables in uboot- Purge some useless defines in the fifth and sixth patch which were related to USB.
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks!
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: <http://lists.denx.de/pipermail/u-boot/attachments/20150427/ad51fef1/attachment.sig>
v3 cover Add support for Colibri Vybrid Modules
On Monday, April 27, 2015 at 07:54:15 PM, Tom Rini wrote:
[...]
Quoted 11 lines
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks!
How are those not imx platform ? They look imx inside out ... it's just the naming which is weird.
Best regards,
Marek Vasut
v3 cover Add support for Colibri Vybrid Modules
Quoted 10 lines · Marek Vasut
On Monday, April 27, 2015 at 07:54:15 PM, Tom Rini wrote:
[...]
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
Quoted 3 lines
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
Quoted 8 lines
Quoted 5 lines
Quoted 1 line
This should go through u-boot-imx though ;-)
For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks!
How are those not imx platform ? They look imx inside out ... it's just the naming which is weird.
I agree; this is very close to i.MX and can go through the imx tree.
Signature · 3 lines
Otavio Salvador O.S. Systems http://www.ossystems.com.br http://code.ossystems.com.br Mobile: +55 (53) 9981-7854 Mobile: +1 (347) 903-9750
v3 cover Add support for Colibri Vybrid Modules
Quoted 13 lines · Otavio Salvador
Quoted 12 lines · Marek Vasut
On Monday, April 27, 2015 at 07:54:15 PM, Tom Rini wrote:
[...]
Quoted 8 lines
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Ping!?
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks!
How are those not imx platform ? They look imx inside out ... it's just the naming which is weird.
I agree; this is very close to i.MX and can go through the imx tree.
I'm having second thoughts :b
Best regards,
Marek Vasut
v3 cover Add support for Colibri Vybrid Modules
In reply to Tom RiniHi Tom,
Quoted 9 lines · Tom Rini
Quoted 5 lines
Quoted 3 lines
Quoted 1 line
Anything preventing this patch from getting applied?
I'll pick this up soon, thanks!
This should go through u-boot-imx though ;-)
For the record, since they aren't quite imx platforms I didn't want to throw another SoC on someone elses plate. Stefano, do you want to handle all the Vybrid stuf in the future? Thanks!
Yes, I'll do - put in my queue to be merged.
Regards,
Stefano
Signature · 5 lines
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