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drm/i915: cope with large i2c transfers

PATCH Applied Dmitry Torokhov 4 participants 4 messages Apr 21, 2015 – Apr 23, 2015

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PATCH v2 1/1 drm/i915: cope with large i2c transfers

The hardware, according to the specs, is limited to 256 byte transfers, and current driver has no protections in case users attempt to do larger transfers. The code will just stomp over status register and mayhem ensues.

Let's split larger transfers into digestable chunks. Doing this allows Atmel MXT driver on Pixel 1 function properly (it hasn't since commit 9d8dc3e529a19e427fd379118acd132520935c5d "Input: atmel_mxt_ts - implement T44 message handling" which tries to consume multiple touchscreen/touchpad reports in a single transaction).

---

V2: reduced the limit from 511 to 256, added stable designation.

 drivers/gpu/drm/i915/i915_reg.h  |  1 +
 drivers/gpu/drm/i915/intel_i2c.c | 66 ++++++++++++++++++++++++++++++++++------
 2 files changed, 57 insertions(+), 10 deletions(-)
drivers/gpu/drm/i915/i915_reg.h +1 -0
index b522eb6..3da1af4 100644
@@ -1807,6 +1807,7 @@ enum skl_disp_power_wells {
 #define   GMBUS_CYCLE_INDEX	(2<<25)
 #define   GMBUS_CYCLE_STOP	(4<<25)
 #define   GMBUS_BYTE_COUNT_SHIFT 16
+#define   GMBUS_BYTE_COUNT_MAX   256U
 #define   GMBUS_SLAVE_INDEX_SHIFT 8
 #define   GMBUS_SLAVE_ADDR_SHIFT 1
 #define   GMBUS_SLAVE_READ	(1<<0)
drivers/gpu/drm/i915/intel_i2c.c +56 -10

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Signature · 4 lines
2.2.0.rc0.207.ga3a616c

-- 
Dmitry
#1 lore raw
Quoted 4 lines · Dmitry Torokhov

The hardware, according to the specs, is limited to 256 byte transfers, and current driver has no protections in case users attempt to do larger transfers. The code will just stomp over status register and mayhem ensues.

Thanks, looks good.

David/Daniel - should I take this directly, or can I expect to just get it from the drm tree?

Linus
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#2 lore raw
Quoted 11 lines · Linus Torvalds
Quoted 4 lines · Dmitry Torokhov

The hardware, according to the specs, is limited to 256 byte transfers, and current driver has no protections in case users attempt to do larger transfers. The code will just stomp over status register and mayhem ensues.

Thanks, looks good.

David/Daniel - should I take this directly, or can I expect to just get it from the drm tree?

I asked Jani to pick this up. I'm horribly jetlagged and just repacking for my vacation so probably shouldn't touch git branches right now ;-) -Daniel

Signature · 7 lines
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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maintainer Applied
#3 lore raw
Quoted 8 lines · Daniel Vetter
Quoted 7 lines · Linus Torvalds
Quoted 4 lines · Dmitry Torokhov

The hardware, according to the specs, is limited to 256 byte transfers, and current driver has no protections in case users attempt to do larger transfers. The code will just stomp over status register and mayhem ensues.

Quoted 7 lines
Quoted 4 lines

Thanks, looks good.

David/Daniel - should I take this directly, or can I expect to just get it from the drm tree?

I asked Jani to pick this up. I'm horribly jetlagged and just repacking for my vacation so probably shouldn't touch git branches right now ;-)

Pushed to drm-intel-next-fixes, thanks for the patch and review. I'll gather a few more fixes and send the pull req to Dave later.

BR,
Jani.

Quoted 9 lines

-Daniel

Signature · 7 lines
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Signature · 1 line
Jani Nikula, Intel Open Source Technology Center