include:configs:ls1021atwr: Enable USB IP support
PATCH v2 3/4 include:configs:ls1021atwr: Enable USB IP support
Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform
--- include/configs/ls1021atwr.h | 36 ++++++++++++++++++++++++++++++++++++ include/linux/usb/xhci-fsl.h | 5 +++++ 2 files changed, 41 insertions(+)
include/configs/ls1021atwr.h +36 -0
@@ -28,6 +28,42 @@#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE/* +* USB +*/ + +/* EHCI Support - disbaled by default as +* there is no signal coming out of soc on +* this board for this controller. However, +* the silicon still has this controller, +* and anyone can use this controller by +* taking signals out on their board. +*/ +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB ) || defined(CONFIG_HAS_FSL_XHCI_USB ) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000
include/linux/usb/xhci-fsl.h +5 -0
@@ -46,6 +46,11 @@#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) +#ifdef CONFIG_LS102XA +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#endif +struct fsl_xhci {struct xhci_hccr *hcd;struct dwc3 *dwc3_reg;
Signature · 1 line
1.8.3.1
PATCH v2 3/4 include:configs:ls1021atwr: Enable USB IP support
Quoted 17 lines · Ramneek Mehresh
Enable USB IP support for both EHCI and XHCI for
ls1021atwr platformSigned-off-by Ramneek Mehresh <[email protected]>--- include/configs/ls1021atwr.h | 36 ++++++++++++++++++++++++++++++++++++ include/linux/usb/xhci-fsl.h | 5 +++++ 2 files changed, 41 insertions(+)include/configs/ls1021atwr.h +0
-0@@ -28,6 +28,42 @@#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE/*
include/configs/ls1021atwr.h line 40
Quoted 10 lines
include/configs/ls1021atwr.h +10
-0+* USB +*/ + +/* EHCI Support - disbaled by default as +* there is no signal coming out of soc on +* this board for this controller. However, +* the silicon still has this controller, +* and anyone can use this controller by +* taking signals out on their board. +*/
Multiline comment again ;-)
Quoted 34 lines
include/configs/ls1021atwr.h +26
-0+/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB ) || defined(CONFIG_HAS_FSL_XHCI_USB ) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000include/linux/usb/xhci-fsl.h +0
-0
include/linux/usb/xhci-fsl.h line 51
Quoted 6 lines
include/linux/usb/xhci-fsl.h +3
-0@@ -46,6 +46,11 @@#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) +#ifdef CONFIG_LS102XA +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0
Do you need to define this _bogus_ address at all? If so, then the driver which depends on this is broken. Why can't you just define a list of addresses instead ? You would be able to use ARRAY_SIZE() in the driver to determine how many controllers there are then. This is how it would look like:
#define CONFIG_FOO_BAR_ADDRS { USB1_ADDR, USB2_ADDR, ..., USBn_ADDR }
In the driver, there'd be:
<type> addrs[] = CONFIG_FOO_BAR_ADDRS;
Quoted 5 lines
include/linux/usb/xhci-fsl.h +2
-0+#endif +struct fsl_xhci {struct xhci_hccr *hcd;struct dwc3 *dwc3_reg;
PATCH v2 3/4 include:configs:ls1021atwr: Enable USB IP support
Quoted 86 lines
-----Original Message-----
From: Marek Vasut [mailto:marex at denx.de]
Sent: Friday, April 24, 2015 9:00 AM
To: Mehresh Ramneek-B31383
Cc: u-boot at lists.denx.de
Subject: Re: [PATCH 3/4][v2]include:configs:ls1021atwr: Enable USB IP supportQuoted 17 lines · Ramneek Mehresh
Enable USB IP support for both EHCI and XHCI for ls1021atwr platform
Signed-off-by Ramneek Mehresh <[email protected]>--- include/configs/ls1021atwr.h | 36 ++++++++++++++++++++++++++++++++++++ include/linux/usb/xhci-fsl.h | 5 +++++ 2 files changed, 41 insertions(+)(quoted diff) +0
-0
b/include/configs/ls1021atwr.hindex a13876b..f208638 100644include/configs/ls1021atwr.h +0
-0@@ -28,6 +28,42 @@#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE/* include/configs/ls1021atwr.h line 40
Quoted 10 lines
include/configs/ls1021atwr.h +10
-0+* USB +*/ + +/* EHCI Support - disbaled by default as +* there is no signal coming out of soc on +* this board for this controller. However, +* the silicon still has this controller, +* and anyone can use this controller by +* taking signals out on their board. +*/ Multiline comment again ;-)
Quoted 10 lines
include/configs/ls1021atwr.h +10
-0+/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif + +/* XHCI Support - enabled by default */ #define +CONFIG_HAS_FSL_XHCI_USB +include/configs/ls1021atwr.h
Quoted 10 lines
include/configs/ls1021atwr.h +10
-0+#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB ) || +defined(CONFIG_HAS_FSL_XHCI_USB) #define CONFIG_CMD_USB#define
Quoted 11 lines
include/configs/ls1021atwr.h +3
-0+CONFIG_USB_STORAGE #define CONFIG_CMD_EXT2 #endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000(quoted diff) +0
-0
b/include/linux/usb/xhci-fsl.hindex 8eaab2c..329abf7 100644include/linux/usb/xhci-fsl.h line 52
Quoted 7 lines
include/linux/usb/xhci-fsl.h +4
-0@@ -46,6 +46,11 @@#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) +#ifdef CONFIG_LS102XA +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR +CONFIG_SYS_LS102XA_XHCI_USB1_ADDR #define +CONFIG_SYS_FSL_XHCI_USB2_ADDR 0Do you need to define this _bogus_ address at all? If so, then the driver which depends on this is broken. Why can't you just define a list of addresses instead ? You would be able to use
ARRAY_SIZE()in the driver to determine how many controllers there are then. This is how it would look like:
Quoted 7 lines
#define
CONFIG_FOO_BAR_ADDRS{USB1_ADDR,USB2_ADDR, ...,USBn_ADDR}In the driver, there'd be:
<type> addrs[] =
CONFIG_FOO_BAR_ADDRS;
I agree to use an array for defining list of controller addresses. However, the no.
of controller(s) to be initialized on a particular platform is determined by CONFIG_USB_MAX_CONTROLLER_COUNT used in usb_init() function. This macro is defined in each platform file, and defines the index argument passed on to xhci_hcd_init(). There may be some platform on which we can have more than one controller in soc, but only one is used (exposed via external connector). Hence, CONFIG_USB_MAX_CONTROLLER_COUNT is defined by platform header file.
Hence, I can assign controller address on the basis of address:
struct fsl_xhci *ctx = &fsl_xhci;ctx->hcd = addrs[index];
Quoted 5 lines
Quoted 5 lines
include/linux/usb/xhci-fsl.h +2
-0+#endif +struct fsl_xhci {struct xhci_hccr *hcd;struct dwc3 *dwc3_reg;
PATCH v2 3/4 include:configs:ls1021atwr: Enable USB IP support
On Monday, April 27, 2015 at 07:44:15 AM, Ramneek Mehresh wrote:
[...]
Quoted 27 lines
Quoted 20 lines
include/linux/usb/xhci-fsl.h line 53
Quoted 13 lines
(quoted diff) +0
-0
b/include/linux/usb/xhci-fsl.hindex 8eaab2c..329abf7 100644include/linux/usb/xhci-fsl.h +4
-0@@ -46,6 +46,11 @@#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16)#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) +#ifdef CONFIG_LS102XA +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR +CONFIG_SYS_LS102XA_XHCI_USB1_ADDR #define +CONFIG_SYS_FSL_XHCI_USB2_ADDR 0Do you need to define this _bogus_ address at all? If so, then the driver which depends on this is broken. Why can't you just define a list of addresses instead ? You would be able to use
ARRAY_SIZE()in the driver to determine how many controllers there are then. This is how it would look like:Quoted 6 lines
#define
CONFIG_FOO_BAR_ADDRS{USB1_ADDR,USB2_ADDR, ...,USBn_ADDR}In the driver, there'd be:
<type> addrs[] =
CONFIG_FOO_BAR_ADDRS;
Quoted 8 lines
I agree to use an array for defining list of controller addresses. However, the no. of controller(s) to be initialized on a particular platform is determined by
CONFIG_USB_MAX_CONTROLLER_COUNTused inusb_init()function. This macro is defined in each platform file, and defines the index argument passed on toxhci_hcd_init(). There may be some platform on which we can have more than one controller in soc, but only one is used (exposed via external connector). Hence,CONFIG_USB_MAX_CONTROLLER_COUNTis defined by platform header file.
Ah right, sorry. Keep the CONFIG_USB_MAX_CONTROLLER_COUNT macro then.
Quoted 3 lines
Hence, I can assign controller address on the basis of address:
structfsl_xhci*ctx =&fsl_xhci;ctx->hcd= addrs[index];
Yeah
Best regards,
Marek Vasut