Skip to contentSkip to conversation

ARM: dts: imx6qdl-hummingboard: Add PCIe support

PATCH New Fabio Estevam 5 participants 7 messages Apr 9, 2015 – May 7, 2015

Subsystems (2)
Device tree bindings Arm i.MX and Layerscape
lore
Share & tools
lore

Fabio Estevam

author reviewer
#0 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

From: Fabio Estevam <[email protected]>

Add PCIe support. Based on a patch from Rabeeh Khoury from the solid-run tree.

Signed-off-by Fabio Estevam <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi +13 -0
index 151a3db..ccdfcfa 100644
@@ -192,6 +192,12 @@
 			>;
 		};
 
+		pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
+			>;
+		};
+
 		pinctrl_hummingboard_pwm1: pwm1grp {
 			fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1>;
 		};

@@ -245,6 +251,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hummingboard_pcie_reset>;
+	reset-gpio = <&gpio3 4 0>;
+	status = "okay";
+};
+
 &pwm1 {
 	 pinctrl-names = "default";
 	 pinctrl-0 = <&pinctrl_hummingboard_pwm1>;
Signature · 1 line
1.9.1
#1 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

Quoted 6 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Add PCIe support. Based on a patch from Rabeeh Khoury from the solid-run tree.

Signed-off-by Fabio Estevam <[email protected]>

Russell,

Are you fine with this patch?

Shawn

Quoted 38 lines
---
 arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi +13 -0
index 151a3db..ccdfcfa 100644
@@ -192,6 +192,12 @@
 			>;
 		};
 
+		pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
+			>;
+		};
+
 		pinctrl_hummingboard_pwm1: pwm1grp {
 			fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1>;
 		};

@@ -245,6 +251,13 @@
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hummingboard_pcie_reset>;
+	reset-gpio = <&gpio3 4 0>;
+	status = "okay";
+};
+
 &pwm1 {
 	 pinctrl-names = "default";
 	 pinctrl-0 = <&pinctrl_hummingboard_pwm1>;
Signature · 1 line
1.9.1
#2 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

Quoted 11 lines · Shawn Guo
Quoted 6 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Add PCIe support. Based on a patch from Rabeeh Khoury from the solid-run tree.

Signed-off-by Fabio Estevam <[email protected]>

Russell,

Are you fine with this patch?

I don't have a view on this because I don't have any experience of PCIe. However, I don't see anything obviously wrong with the patch.

Signature · 2 lines
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
#3 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Shawn Guo
Quoted 5 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Add PCIe support. Based on a patch from Rabeeh Khoury from the solid-run tree.

Quoted 9 lines
Quoted 5 lines
Quoted 1 line
Signed-off-by Fabio Estevam <[email protected]>

Russell,

Are you fine with this patch?

I don't have a view on this because I don't have any experience of PCIe. However, I don't see anything obviously wrong with the patch.

That patch is fine. In the SolidRun kernel we are actually using 0x80000000 as our pin strength to accept the default value, but I have previously tested with 0x1b0b1 and it works as expected.

I have not tested this with the upstream kernel but previously MSI was not working properly on the iMX6 pcie implementation. This was worked around by either disabling the kernel config option, or add pci=nomsi to the kernel commandline. I currently have a patch that takes a nomsi device-tree option to workaround this bug.

Is pcie working with MSI now on the iMX6 hardware?

-Jon

#4 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

Hi Jon,

Am Mittwoch, den 06.05.2015, 13:04 +0200 schrieb Jon Nettleton:

Quoted 30 lines
Quoted 8 lines · Russell King - ARM Linux
Quoted 6 lines · Shawn Guo
Quoted 5 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Add PCIe support. Based on a patch from Rabeeh Khoury from the solid-run tree.

Quoted 9 lines
Quoted 5 lines
Quoted 1 line
Signed-off-by Fabio Estevam <[email protected]>

Russell,

Are you fine with this patch?

I don't have a view on this because I don't have any experience of PCIe. However, I don't see anything obviously wrong with the patch.

That patch is fine. In the SolidRun kernel we are actually using 0x80000000 as our pin strength to accept the default value, but I have previously tested with 0x1b0b1 and it works as expected.

I have not tested this with the upstream kernel but previously MSI was not working properly on the iMX6 pcie implementation. This was worked around by either disabling the kernel config option, or add pci=nomsi to the kernel commandline. I currently have a patch that takes a nomsi device-tree option to workaround this bug.

Quoted 4 lines

Is pcie working with MSI now on the iMX6 hardware?

-Jon

MSI is working properly on i.MX6 with all devices I had a chance to test. If you've got some specific devices where it doesn't work with a mainline kernel I would be interested in receiving bug reports.

It is certainly no hardware limitation, so please don't push a workaround into DT.

Regards,
Lucas

Signature · 2 lines
Pengutronix e.K.             | Lucas Stach                 |
Industrial Linux Solutions   | http://www.pengutronix.de/  |
author reviewer
#5 lore raw

PATCH 1/1 ARM: dts: imx6qdl-hummingboard: Add PCIe support

In reply to Jon Nettleton

Hi Jon,

Quoted 3 lines · Jon Nettleton

That patch is fine. In the SolidRun kernel we are actually using 0x80000000 as our pin strength to accept the default value, but I have previously tested with 0x1b0b1 and it works as expected.

Yes, putting 0x80000000 or 0x1b0b1 has the same effect as 0x1b0b1 is the default PAD configuration that comes out of reset. I prefer to pass the value explicitly though.

I tested it with an Intel 7260HMW Wifi card and it worked well.

Regards,

Fabio Estevam