ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
PATCH v2 1/1 ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree.
This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader.
---
Hi,
The only change for this patch is the spell fixes and it was also rebased onto v4.1-rc1. Unless there is any objection I will apply it on mvebu/fixes for 4.1.
Thanks,
Gregroy
arch/arm/boot/dts/armada-375.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
arch/arm/boot/dts/armada-375.dtsi +1 -1
@@ -69,7 +69,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */ refclk: oscillator {
arch/arm/boot/dts/armada-38x.dtsi +1 -1
@@ -585,7 +585,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */
arch/arm/boot/dts/armada-39x.dtsi +1 -1
@@ -502,7 +502,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; }; };
Signature · 1 line
2.1.0
PATCH v2 1/1 ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
Quoted 12 lines · Gregory CLEMENT
Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree.
This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader.
Quoted 7 lines
Signed-off-by Gregory CLEMENT <[email protected]>---
Hi,The only change for this patch is the spell fixes and it was also rebased onto v4.1-rc1. Unless there is any objection I will apply it on mvebu/fixes for 4.1.
Hi Gregory
No objection. Without access to the data sheet or hardware, there is little any of us can say against this.
Andrew
Quoted 52 lines
Thanks,
Gregroy
arch/arm/boot/dts/armada-375.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)arch/arm/boot/dts/armada-375.dtsi +1
-1@@ -69,7 +69,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */ refclk: oscillator {arch/arm/boot/dts/armada-38x.dtsi +1
-1@@ -585,7 +585,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */arch/arm/boot/dts/armada-39x.dtsi +1
-1@@ -502,7 +502,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; }; };Signature · 1 line
2.1.0
PATCH v2 1/1 ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
2015-04-27 13:28 GMT+02:00 Andrew Lunn <[email protected]>:
Quoted 21 lines · Gregory CLEMENT
Quoted 12 lines
Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree.
This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader.
Quoted 7 lines
Signed-off-by Gregory CLEMENT <[email protected]>---
Hi,The only change for this patch is the spell fixes and it was also rebased onto v4.1-rc1. Unless there is any objection I will apply it on mvebu/fixes for 4.1.
Quoted 9 lines
Hi Gregory
No objection. Without access to the data sheet or hardware, there is little any of us can say against this.
Acked-by Andrew Lunn <[email protected]>Andrew
Hi Gregory,
Having an access to both HW and the spec, I can confirm the change is needed.
Best regards,
Marcin
PATCH v2 1/1 ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs
In reply to Gregory CLEMENTQuoted 5 lines · Gregory CLEMENT
Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree.
Quoted 8 lines
This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader.
Signed-off-by Gregory CLEMENT <[email protected]>
applied on mvebu/fixes with Andrew and Marcin Acked-by.
Thanks,
Gregory
Quoted 56 lines
---
Hi,The only change for this patch is the spell fixes and it was also rebased onto v4.1-rc1. Unless there is any objection I will apply it on mvebu/fixes for 4.1.
Thanks,
Gregroy
arch/arm/boot/dts/armada-375.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)arch/arm/boot/dts/armada-375.dtsi +1
-1@@ -69,7 +69,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */ refclk: oscillator {arch/arm/boot/dts/armada-38x.dtsi +1
-1@@ -585,7 +585,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */arch/arm/boot/dts/armada-39x.dtsi +1
-1@@ -502,7 +502,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; }; };
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com