Basic support to ZTE ZX296702
Subsystems (6)
v3 cover Basic support to ZTE ZX296702
Rebase patches of v2 to 4.0-rc1. Ready for merge.
Jun Nie (9):
ARM: zx: add basic support for ZTE ZX296702
MAINTAINERS: add entry for ARM ZTE architecture
ARM: zx: add low level debug support for zx296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
ARM: zx: enable SMP and hotplug for zx296702
ARM: zx: Add basic defconfig support for ZX296702
uart: pl011: support registers offset with LUT
uart: pl011: Add support to ZTE uart
Documentation/devicetree/bindings/arm/zte.txt | 15 + .../devicetree/bindings/clock/zx296702-clk.txt | 35 ++ Documentation/devicetree/bindings/serial/pl011.txt | 2 +- .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 9 + arch/arm/Kconfig | 2 + arch/arm/Kconfig.debug | 14 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zx296702-ad1.dts | 48 ++ arch/arm/boot/dts/zx296702.dtsi | 139 +++++ arch/arm/configs/zx_defconfig | 130 ++++ arch/arm/include/debug/pl01x.S | 7 + arch/arm/mach-zx/Kconfig | 18 + arch/arm/mach-zx/Makefile | 2 + arch/arm/mach-zx/core.h | 19 + arch/arm/mach-zx/headsmp.S | 32 + arch/arm/mach-zx/platsmp.c | 189 ++++++ arch/arm/mach-zx/zx296702.c | 31 + drivers/clk/Makefile | 1 + drivers/clk/zte/Makefile | 2 + drivers/clk/zte/clk-pll.c | 180 ++++++ drivers/clk/zte/clk-zx296702.c | 658 +++++++++++++++++++++ drivers/clk/zte/clk.h | 30 + drivers/tty/serial/Kconfig | 4 +- drivers/tty/serial/amba-pl011.c | 527 ++++++++++++----- include/dt-bindings/clock/zx296702-clock.h | 162 +++++ include/linux/amba/serial.h | 18 + 28 files changed, 2140 insertions(+), 137 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/zte.txt create mode 100644 Documentation/devicetree/bindings/clock/zx296702-clk.txt create mode 100644 arch/arm/boot/dts/zx296702-ad1.dts create mode 100644 arch/arm/boot/dts/zx296702.dtsi create mode 100644 arch/arm/configs/zx_defconfig create mode 100644 arch/arm/mach-zx/Kconfig create mode 100644 arch/arm/mach-zx/Makefile create mode 100644 arch/arm/mach-zx/core.h create mode 100644 arch/arm/mach-zx/headsmp.S create mode 100644 arch/arm/mach-zx/platsmp.c create mode 100644 arch/arm/mach-zx/zx296702.c create mode 100644 drivers/clk/zte/Makefile create mode 100644 drivers/clk/zte/clk-pll.c create mode 100644 drivers/clk/zte/clk-zx296702.c create mode 100644 drivers/clk/zte/clk.h create mode 100644 include/dt-bindings/clock/zx296702-clock.h
Signature · 1 line
1.9.1
PATCH v3 1/9 ARM: zx: add basic support for ZTE ZX296702
Add basic code for ZTE ZX296702 platform.
Signed-off-by Jun Nie <[email protected]>
--- arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 1 + arch/arm/mach-zx/Kconfig | 18 ++++++++++++++++++ arch/arm/mach-zx/Makefile | 1 + arch/arm/mach-zx/zx296702.c | 31 +++++++++++++++++++++++++++++++ 5 files changed, 53 insertions(+) create mode 100644 arch/arm/mach-zx/Kconfig create mode 100644 arch/arm/mach-zx/Makefile create mode 100644 arch/arm/mach-zx/zx296702.c
arch/arm/Kconfig +2 -0
@@ -948,6 +948,8 @@ source "arch/arm/mach-vt8500/Kconfig" source "arch/arm/mach-w90x900/Kconfig" +source "arch/arm/mach-zx/Kconfig" + source "arch/arm/mach-zynq/Kconfig" # Definitions to make life easier
arch/arm/Makefile +1 -0
@@ -204,6 +204,7 @@ machine-$(CONFIG_ARCH_VERSATILE) += versatile machine-$(CONFIG_ARCH_VEXPRESS) += vexpress machine-$(CONFIG_ARCH_VT8500) += vt8500 machine-$(CONFIG_ARCH_W90X900) += w90x900 +machine-$(CONFIG_ARCH_ZX) += zx machine-$(CONFIG_ARCH_ZYNQ) += zynq machine-$(CONFIG_PLAT_SPEAR) += spear
arch/arm/mach-zx/Kconfig new file +18 -0
@@ -0,0 +1,18 @@ +menuconfig ARCH_ZX + bool "ZTE ZX family" if ARCH_MULTI_V7 + help + Support for ZTE ZX-based family of processors. TV + set-top-box processor is supported. More will be + added soon. + +if ARCH_ZX + +config SOC_ZX296702 + bool "Enable support for ZX296702 SoC" + select ARM_GIC + select ARM_GLOBAL_TIMER + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + help + Support for ZTE ZX296702 SoC which is a dual core CortexA9MP +endif
arch/arm/mach-zx/Makefile new file +1 -0
@@ -0,0 +1 @@ +obj-$(CONFIG_SOC_ZX296702) += zx296702.o
arch/arm/mach-zx/zx296702.c new file +31 -0
@@ -0,0 +1,31 @@ +/* +* Copyright 2014 Linaro Ltd. +* Copyright (C) 2014 ZTE Corporation. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <linux/of_address.h> +#include <linux/of_platform.h> + +static const char *zx296702_dt_compat[]__initconst = { +"zte,zx296702" , +NULL , +}; + +static void __init zx296702_init_machine (void ) +{ +of_platform_populate (NULL , of_default_bus_match_table,NULL ,NULL ); +} + +DT_MACHINE_START (ZX ,"ZTE ZX296702 (Device Tree)" ) + .init_machine = zx296702_init_machine, + .dt_compat = zx296702_dt_compat, + .l2c_aux_val = 0x30400000, + .l2c_aux_mask =0xfeffffff , +MACHINE_END
Signature · 1 line
1.9.1
PATCH v3 2/9 MAINTAINERS: add entry for ARM ZTE architecture
In reply to Jun NieAdd entry for ZTE ARM architecture
Signed-off-by Jun Nie <[email protected]>
--- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+)
MAINTAINERS +9 -0
@@ -1602,6 +1602,15 @@ S: Maintained F: arch/arm/mach-pxa/z2.c F: arch/arm/mach-pxa/include/mach/z2.h +ARM/ZTE ARCHITECTURE +M: Jun Nie <[email protected]> +L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers) +S: Maintained +F: arch/arm/mach-zx/ +F: drivers/clk/zte/ +F: Documentation/devicetree/bindings/arm/zte.txt +F: Documentation/devicetree/bindings/clock/zx296702-clk.txt + ARM/ZYNQ ARCHITECTURE M: Michal Simek <[email protected]> R: S?ren Brinkmann <[email protected]>
Signature · 1 line
1.9.1
PATCH v3 3/9 ARM: zx: add low level debug support for zx296702
In reply to Jun NieUse the UART0 peripheral for low level debug. Only the UART port 0 is currently supported.
Signed-off-by Jun Nie <[email protected]>
--- arch/arm/Kconfig.debug | 14 ++++++++++++++ arch/arm/include/debug/pl01x.S | 7 +++++++ 2 files changed, 21 insertions(+)
arch/arm/Kconfig.debug +14 -0
@@ -1157,6 +1157,18 @@ choice For more details about semihosting, please see chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. + config DEBUG_ZTE_ZX + bool "Use ZTE ZX UART" + select DEBUG_UART_PL01X + depends on ARCH_ZX + help + Say Y here if you are enabling ZTE ZX296702 SOC and need + debug uart support. + + This option is preferred over the platform specific + options; the platform specific options are deprecated + and will be soon removed. + config DEBUG_LL_UART_8250 bool "Kernel low-level debugging via 8250 UART" help
@@ -1337,6 +1349,7 @@ config DEBUG_UART_PHYS default 0x02531000 if DEBUG_KEYSTONE_UART1 default 0x03010fe0 if ARCH_RPC default 0x07000000 if DEBUG_SUN9I_UART0 + default 0x09405000 if DEBUG_ZTE_ZX default 0x10009000 if DEBUG_REALVIEW_STD_PORT || \ DEBUG_VEXPRESS_UART0_CA9 default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
@@ -1466,6 +1479,7 @@ config DEBUG_UART_VIRT default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT default 0xfc40ab00 if DEBUG_BRCMSTB_UART + default 0xfc705000 if DEBUG_ZTE_ZX default 0xfcfe8600 if DEBUG_UART_BCM63XX default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX default 0xfd000000 if ARCH_SPEAR13XX
arch/arm/include/debug/pl01x.S +7 -0
@@ -12,6 +12,13 @@ */ #include <linux/amba/serial.h> +#ifdef CONFIG_DEBUG_ZTE_ZX +#undef UART01x_DR +#undef UART01x_FR +#define UART01x_DR 0x04 +#define UART01x_FR 0x14 +#endif + #ifdef CONFIG_DEBUG_UART_PHYS .macro addruart, rp, rv, tmp ldr \rp, =CONFIG_DEBUG_UART_PHYS
Signature · 1 line
1.9.1
PATCH v3 4/9 ARM: dts: zx: add an initial zx296702 dts and doc
In reply to Jun NieAdd initial dts file and document for ZX296702 and board ZX296702-AD1. More peripherals will be added later.
Signed-off-by Jun Nie <[email protected]>
--- Documentation/devicetree/bindings/arm/zte.txt | 15 +++ .../devicetree/bindings/clock/zx296702-clk.txt | 35 ++++++ Documentation/devicetree/bindings/serial/pl011.txt | 2 +- .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zx296702-ad1.dts | 48 +++++++ arch/arm/boot/dts/zx296702.dtsi | 139 +++++++++++++++++++++ 7 files changed, 240 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/arm/zte.txt create mode 100644 Documentation/devicetree/bindings/clock/zx296702-clk.txt create mode 100644 arch/arm/boot/dts/zx296702-ad1.dts create mode 100644 arch/arm/boot/dts/zx296702.dtsi
Documentation/devicetree/bindings/arm/zte.txt new file +15 -0
@@ -0,0 +1,15 @@ +ZTE platforms device tree bindings +--------------------------------------- + +- ZX296702 board: + Required root node properties: + - compatible = "zte,zx296702-ad1", "zte,zx296702" + +System management required properties: + - compatible = "zte,sysctrl" + +Low power management required properties: + - compatible = "zte,zx296702-pcu" + +Bus matrix required properties: + - compatible = "zte,zx-bus-matrix"
Documentation/devicetree/bindings/clock/zx296702-clk.txt new file +35 -0
@@ -0,0 +1,35 @@ +Device Tree Clock bindings for ZTE zx296702 + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible : shall be one of the following: + "zte,zx296702-topcrm-clk": + zx296702 top clock selection, divider and gating + + "zte,zx296702-lsp0crpm-clk" and + "zte,zx296702-lsp1crpm-clk": + zx296702 device level clock selection and gating + +- reg: Address and length of the register set + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296702-clock.h +for the full list of zx296702 clock IDs. + + +topclk: topcrm at 0x09800000 { + compatible = "zte,zx296702-topcrm-clk"; + reg = <0x09800000 0x1000>; + #clock-cells = <1>; +}; + +uart0: serial at 0x09405000 { + compatible = "zte,zx296702-uart"; + reg = <0x09405000 0x1000>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&lsp1clk ZX296702_UART0_PCLK>; + status = "disabled"; +};
Documentation/devicetree/bindings/serial/pl011.txt +1 -1
@@ -1,7 +1,7 @@ * ARM AMBA Primecell PL011 serial UART Required properties: -- compatible: must be "arm,primecell", "arm,pl011" +- compatible: must be "arm,primecell", "arm,pl011", "zte,zx296702-uart" - reg: exactly one register range with length 0x1000 - interrupts: exactly one interrupt specifier
Documentation/devicetree/bindings/vendor-prefixes.txt +1 -0
@@ -211,3 +211,4 @@ xillybus Xillybus Ltd. xlnx Xilinx zyxel ZyXEL Communications Corp. zarlink Zarlink Semiconductor +zte ZTE Corp.
arch/arm/boot/dts/Makefile +1 -0
@@ -660,6 +660,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt6592-evb.dtb \ mt8127-moose.dtb \ mt8135-evbp1.dtb +dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb endif always := $(dtb-y)
arch/arm/boot/dts/zx296702-ad1.dts new file +48 -0
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arch/arm/boot/dts/zx296702.dtsi new file +139 -0
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Signature · 1 line
1.9.1
PATCH v3 5/9 clk: zx: add clock support to zx296702
In reply to Jun NieIt adds a clock driver for zx296702 SoC to register the clock tree to Common Clock Framework. All the clocks of bus topology and some the peripheral clocks are ready with this commit. Some missing leaf clocks for peripherals will be added later when needed.
Signed-off-by Jun Nie <[email protected]>
--- drivers/clk/Makefile | 1 + drivers/clk/zte/Makefile | 2 + drivers/clk/zte/clk-pll.c | 180 ++++++++ drivers/clk/zte/clk-zx296702.c | 658 +++++++++++++++++++++++++++++ drivers/clk/zte/clk.h | 30 ++ include/dt-bindings/clock/zx296702-clock.h | 162 +++++++ 6 files changed, 1033 insertions(+) create mode 100644 drivers/clk/zte/Makefile create mode 100644 drivers/clk/zte/clk-pll.c create mode 100644 drivers/clk/zte/clk-zx296702.c create mode 100644 drivers/clk/zte/clk.h create mode 100644 include/dt-bindings/clock/zx296702-clock.h
drivers/clk/Makefile +1 -0
@@ -72,4 +72,5 @@ obj-$(CONFIG_ARCH_OMAP2PLUS) += ti/ obj-$(CONFIG_ARCH_U8500) += ux500/ obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/ obj-$(CONFIG_X86) += x86/ +obj-$(CONFIG_ARCH_ZX) += zte/ obj-$(CONFIG_ARCH_ZYNQ) += zynq/
drivers/clk/zte/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +obj-y := clk-pll.o +obj-$(CONFIG_SOC_ZX296702) += clk-zx296702.o
drivers/clk/zte/clk-pll.c new file +180 -0
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drivers/clk/zte/clk-zx296702.c new file +658 -0
658 lines not on this page · raw message
drivers/clk/zte/clk.h new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Copyright 2014 Linaro Ltd. +* Copyright (C) 2014 ZTE Corporation. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#ifndef __ZTE_CLK_H +#define __ZTE_CLK_H + +struct zx_pll_config { +unsigned long rate; +u32 cfg0; +u32 cfg1; +}; + +struct clk_zx_pll { +struct clk_hw hw; +void __iomem *reg_base; +const struct zx_pll_config *lookup_table;/* order by rate asc */ +int count; +spinlock_t *lock; +}; + +struct clk *clk_register_zx_pll (const char *name,const char *parent_name, +unsigned long flags,void __iomem *reg_base, +const struct zx_pll_config *lookup_table,int count,spinlock_t *lock); +#endif
include/dt-bindings/clock/zx296702-clock.h new file +162 -0
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Signature · 1 line
1.9.1
PATCH v3 6/9 ARM: zx: enable SMP and hotplug for zx296702
In reply to Jun NieBring up the secondary core. Enable hotplug with supporting powering off secondary core.
Signed-off-by Jun Nie <[email protected]>
--- arch/arm/mach-zx/Makefile | 1 + arch/arm/mach-zx/core.h | 19 +++++ arch/arm/mach-zx/headsmp.S | 32 ++++++++ arch/arm/mach-zx/platsmp.c | 189 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 241 insertions(+) create mode 100644 arch/arm/mach-zx/core.h create mode 100644 arch/arm/mach-zx/headsmp.S create mode 100644 arch/arm/mach-zx/platsmp.c
arch/arm/mach-zx/Makefile +1 -0
@@ -1 +1,2 @@ obj-$(CONFIG_SOC_ZX296702) += zx296702.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o
arch/arm/mach-zx/core.h new file +19 -0
@@ -0,0 +1,19 @@ +/* +* Copyright 2014 Linaro Ltd. +* Copyright (C) 2014 ZTE Corporation. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#ifndef __MACH_ZX_CORE_H +#define __MACH_ZX_CORE_H + +extern void zx_resume_jump (void ); +extern size_t zx_suspend_iram_sz; +extern unsigned long zx_secondary_startup_pa; + +void zx_secondary_startup (void ); + +#endif /* __MACH_ZX_CORE_H */
arch/arm/mach-zx/headsmp.S new file +32 -0
@@ -0,0 +1,32 @@ +/* + * Copyright 2014 Linaro Ltd. + * Copyright (C) 2014 ZTE Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> + + .align 3 + +/* It runs from physical address */ +ENTRY(zx_resume_jump) + adr r1, zx_secondary_startup_pa + ldr r0, [r1] + bx r0 +ENDPROC(zx_resume_jump) + +ENTRY(zx_secondary_startup_pa) + .word zx_secondary_startup_pa + +ENTRY(zx_suspend_iram_sz) + .word . - zx_resume_jump +ENDPROC(zx_secondary_startup_pa) + + +ENTRY(zx_secondary_startup) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(zx_secondary_startup)
arch/arm/mach-zx/platsmp.c new file +189 -0
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Signature · 1 line
1.9.1
PATCH v3 7/9 ARM: zx: Add basic defconfig support for ZX296702
In reply to Jun NieAdd basic defconfig support to zx SOC, including uart, mmc
and other common config
Signed-off-by Jun Nie <[email protected]>
--- arch/arm/configs/zx_defconfig | 130 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 arch/arm/configs/zx_defconfig
arch/arm/configs/zx_defconfig new file +130 -0
@@ -0,0 +1,130 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="/home/niej/git/linux/initramfs.cpio.gz" +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_ARCH_ZX=y +CONFIG_SOC_ZX296702=y +# CONFIG_SWP_EMULATE is not set +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_KSM=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HIBERNATION=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_SUSPEND_TIME=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAMA0,115200 debug earlyprintk root=/dev/ram rw rootwait" +#CONFIG_NET is not set +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=192 +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_UID_STAT=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_VERITY=y +CONFIG_NETDEVICES=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SPI=y +CONFIG_LOGO=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_CONSOLE_POLL=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_DW=y +CONFIG_MMC_DW_IDMAC=y +CONFIG_EXT2_FS=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_DEBUG=y +CONFIG_FUSE_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +#CONFIG_NFS_FS is not set +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_WARN=4096 +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_PANIC_TIMEOUT=5 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_FTRACE is not set +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STACKTRACE=y +CONFIG_DEBUG_ZTE_ZX=y +CONFIG_EARLY_PRINTK=y +CONFIG_CRYPTO_LZO=y +CONFIG_GPIOLIB=y
Signature · 1 line
1.9.1
PATCH v3 7/9 ARM: zx: Add basic defconfig support for ZX296702
Quoted 21 lines · Jun Nie
Add basic defconfig support to zx SOC, including uart, mmc
and other common configSigned-off-by Jun Nie <[email protected]>--- arch/arm/configs/zx_defconfig | 130 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 arch/arm/configs/zx_defconfigarch/arm/configs/zx_defconfig new file +6
-0@@ -0,0 +1,130 @@ +CONFIG_EXPERIMENTAL=y +CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y
arch/arm/configs/zx_defconfig line 16
Quoted 10 lines
arch/arm/configs/zx_defconfig new file +10
-0+CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="/home/niej/git/linux/initramfs.cpio.gz"
This is improper to be in the defconfig.
Shawn
Quoted 117 lines
arch/arm/configs/zx_defconfig new file +114
-0+CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +CONFIG_PERF_EVENTS=y +CONFIG_SLAB=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_ARCH_ZX=y +CONFIG_SOC_ZX296702=y +# CONFIG_SWP_EMULATE is not set +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_KSM=y +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_HIBERNATION=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_SUSPEND_TIME=y +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyAMA0,115200 debug earlyprintk root=/dev/ram rw rootwait" +#CONFIG_NET is not set +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=192 +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=1 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_UID_STAT=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_VERITY=y +CONFIG_NETDEVICES=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_SERIO=y +CONFIG_SERIO_LIBPS2=y +CONFIG_SPI=y +CONFIG_LOGO=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_CONSOLE_POLL=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_BLOCK_MINORS=16 +CONFIG_MMC_DW=y +CONFIG_MMC_DW_IDMAC=y +CONFIG_EXT2_FS=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_DEBUG=y +CONFIG_FUSE_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +#CONFIG_NFS_FS is not set +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_INFO=y +CONFIG_FRAME_WARN=4096 +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_PANIC_TIMEOUT=5 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_FTRACE is not set +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y +# CONFIG_ARM_UNWIND is not set +CONFIG_DEBUG_PREEMPT=y +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_LL=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STACKTRACE=y +CONFIG_DEBUG_ZTE_ZX=y +CONFIG_EARLY_PRINTK=y +CONFIG_CRYPTO_LZO=y +CONFIG_GPIOLIB=ySignature · 1 line
1.9.1